Commit graph

5 commits

Author SHA1 Message Date
Andy CA6JAU ab929d2bd2 Full memory optimization for ring buffer 2018-07-16 17:20:26 -04:00
Andy CA6JAU 71ca6e13d2 Changing 2 slot RX to 1 slot RX only in DMR duplex mode 2017-05-06 20:19:08 -03:00
Andy CA6JAU 0c22c47d5c Adding second ADF7021 support and fixing some mistakes 2017-05-01 01:02:47 -03:00
Andy CA6JAU e86e1bfdd2 Adapting original duplex DMR code to MMDVM_HS 2017-04-29 23:05:03 -03:00
Andy CA6JAU ba44cf9f66 Adding original MMDVM duplex DMR files 2017-04-29 11:58:41 -03:00