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https://github.com/juribeparada/MMDVM_HS.git
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More support for NXDN
This commit is contained in:
Andy CA6JAU
parent
ae4431c884
commit
bc0f7bcc87
57
ADF7021.cpp
57
ADF7021.cpp
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@ -1,6 +1,6 @@
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/*
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* Copyright (C) 2016 by Jim McLaughlin KI6ZUM
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* Copyright (C) 2016,2017 by Andy Uribe CA6JAU
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* Copyright (C) 2016,2017,2018 by Andy Uribe CA6JAU
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* Copyright (C) 2017 by Danilo DB4PLE
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*
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* Some of the code is based on work of Guus Van Dooren PE1PLM:
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@ -232,6 +232,9 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
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case STATE_P25:
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AFC_OFFSET = AFC_OFFSET_P25;
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break;
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case STATE_NXDN:
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AFC_OFFSET = AFC_OFFSET_NXDN;
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break;
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default:
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break;
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}
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@ -409,6 +412,33 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
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#endif
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break;
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case STATE_NXDN:
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// Dev: +1 symb 600 Hz, symb rate = 4800
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ADF7021_REG3 = ADF7021_REG3_NXDN;
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ADF7021_REG10 = ADF7021_REG10_NXDN;
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// K=32
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ADF7021_REG4 = (uint32_t) 0b0100 << 0; // register 4
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ADF7021_REG4 |= (uint32_t) 0b011 << 4; // mode, 4FSK
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ADF7021_REG4 |= (uint32_t) 0b0 << 7;
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ADF7021_REG4 |= (uint32_t) 0b11 << 8;
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ADF7021_REG4 |= (uint32_t) ADF7021_DISC_BW_NXDN << 10; // Disc BW
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ADF7021_REG4 |= (uint32_t) ADF7021_POST_BW_NXDN << 20; // Post dem BW
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ADF7021_REG4 |= (uint32_t) 0b00 << 30; // IF filter (12.5 kHz)
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ADF7021_REG13 = (uint32_t) 0b1101 << 0; // register 13
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ADF7021_REG13 |= (uint32_t) ADF7021_SLICER_TH_NXDN << 4; // slicer threshold
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ADF7021_REG2 = (uint32_t) 0b10 << 28; // invert data (and RC alpha = 0.5)
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ADF7021_REG2 |= (uint32_t) (ADF7021_DEV_NXDN / div2) << 19; // deviation
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#if defined(ADF7021_DISABLE_RC_4FSK)
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ADF7021_REG2 |= (uint32_t) 0b011 << 4; // modulation (4FSK)
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#else
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ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK)
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#endif
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break;
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default:
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break;
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}
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@ -593,7 +623,30 @@ void CIO::ifConf2(MMDVM_STATE modemState)
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ADF7021_REG2 |= (uint32_t) (ADF7021_DEV_P25 / div2) << 19; // deviation
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ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK)
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break;
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case STATE_NXDN:
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// Dev: +1 symb 600 Hz, symb rate = 4800
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ADF7021_REG3 = ADF7021_REG3_NXDN;
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ADF7021_REG10 = ADF7021_REG10_NXDN;
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// K=32
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ADF7021_REG4 = (uint32_t) 0b0100 << 0; // register 4
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ADF7021_REG4 |= (uint32_t) 0b011 << 4; // mode, 4FSK
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ADF7021_REG4 |= (uint32_t) 0b0 << 7;
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ADF7021_REG4 |= (uint32_t) 0b11 << 8;
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ADF7021_REG4 |= (uint32_t) ADF7021_DISC_BW_NXDN << 10; // Disc BW
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ADF7021_REG4 |= (uint32_t) ADF7021_POST_BW_NXDN << 20; // Post dem BW
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ADF7021_REG4 |= (uint32_t) 0b00 << 30; // IF filter (12.5 kHz)
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ADF7021_REG13 = (uint32_t) 0b1101 << 0; // register 13
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ADF7021_REG13 |= (uint32_t) ADF7021_SLICER_TH_NXDN << 4; // slicer threshold
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ADF7021_REG2 = (uint32_t) 0b10 << 28; // invert data (and RC alpha = 0.5)
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ADF7021_REG2 |= (uint32_t) (ADF7021_DEV_NXDN / div2) << 19; // deviation
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ADF7021_REG2 |= (uint32_t) 0b111 << 4; // modulation (RC 4FSK)
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break;
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default:
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break;
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}
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16
IO.cpp
16
IO.cpp
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@ -1,6 +1,6 @@
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/*
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* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
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* Copyright (C) 2016,2017 by Andy Uribe CA6JAU
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* Copyright (C) 2016,2017,2018 by Andy Uribe CA6JAU
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* Copyright (C) 2017 by Danilo DB4PLE
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* This program is free software; you can redistribute it and/or modify
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@ -47,6 +47,7 @@ m_watchdog(0U)
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DMR_pin(LOW);
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YSF_pin(LOW);
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P25_pin(LOW);
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NXDN_pin(LOW);
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COS_pin(LOW);
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DEB_pin(LOW);
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@ -83,6 +84,7 @@ void CIO::selfTest()
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DMR_pin(ledValue);
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YSF_pin(ledValue);
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P25_pin(ledValue);
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NXDN_pin(ledValue);
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COS_pin(ledValue);
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blinks++;
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@ -104,7 +106,7 @@ void CIO::process()
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if (m_started) {
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// Two seconds timeout
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if (m_watchdog >= 19200U) {
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if (m_modemState == STATE_DSTAR || m_modemState == STATE_DMR || m_modemState == STATE_YSF || m_modemState == STATE_P25) {
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if (m_modemState == STATE_DSTAR || m_modemState == STATE_DMR || m_modemState == STATE_YSF || m_modemState == STATE_P25 || m_modemState == STATE_NXDN) {
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m_modemState = STATE_IDLE;
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setMode(m_modemState);
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}
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@ -144,6 +146,8 @@ void CIO::process()
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scantime = SCAN_TIME;
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else if(m_modemState_prev == STATE_P25)
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scantime = SCAN_TIME;
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else if(m_modemState_prev == STATE_NXDN)
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scantime = SCAN_TIME;
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else
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scantime = SCAN_TIME;
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@ -184,6 +188,9 @@ void CIO::process()
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case STATE_P25:
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p25RX.databit(bit);
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break;
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case STATE_NXDN:
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nxdnRX.databit(bit);
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break;
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default:
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break;
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}
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@ -211,6 +218,10 @@ void CIO::start()
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m_Modes[m_TotalModes] = STATE_P25;
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m_TotalModes++;
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}
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if(m_nxdnEnable) {
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m_Modes[m_TotalModes] = STATE_NXDN;
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m_TotalModes++;
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}
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#if defined(ENABLE_SCAN_MODE)
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if(m_TotalModes > 1)
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@ -291,6 +302,7 @@ void CIO::setMode(MMDVM_STATE modemState)
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DMR_pin(modemState == STATE_DMR);
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YSF_pin(modemState == STATE_YSF);
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P25_pin(modemState == STATE_P25);
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NXDN_pin(modemState == STATE_NXDN);
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}
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void CIO::setDecode(bool dcd)
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