Adding CE pin control, for ADF7021 reset.

This commit is contained in:
Andy CA6JAU 2017-02-14 08:49:22 -03:00
parent 9d292fa809
commit 932f5e244e
5 changed files with 30 additions and 0 deletions

View file

@ -36,6 +36,9 @@
#define PIN_SLE GPIO_Pin_8
#define PORT_SLE GPIOB
#define PIN_CE GPIO_Pin_14
#define PORT_CE GPIOC
#define PIN_RXD GPIO_Pin_4
#define PORT_RXD GPIOB
@ -180,6 +183,12 @@ void CIO::Init()
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(PORT_SLE, &GPIO_InitStruct);
// Pin CE
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStruct.GPIO_Pin = PIN_CE;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(PORT_CE, &GPIO_InitStruct);
// Pin RXD
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStruct.GPIO_Pin = PIN_RXD;
@ -327,6 +336,11 @@ void CIO::SLE_pin(bool on)
GPIO_WriteBit(PORT_SLE, PIN_SLE, on ? Bit_SET : Bit_RESET);
}
void CIO::CE_pin(bool on)
{
GPIO_WriteBit(PORT_CE, PIN_CE, on ? Bit_SET : Bit_RESET);
}
bool CIO::RXD_pin()
{
return GPIO_ReadInputDataBit(PORT_RXD, PIN_RXD) == Bit_SET;