mirror of
https://github.com/juribeparada/MMDVM_HS.git
synced 2026-01-18 06:09:59 +01:00
some formatting
This commit is contained in:
Gerad Munsch
parent
5ce9e11a08
commit
38ea910e0c
104
Makefile
104
Makefile
|
|
@ -16,22 +16,22 @@
|
|||
# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
|
||||
# MMDVM source files
|
||||
MMDVM_HS_PATH=.
|
||||
MMDVM_HS_PATH = .
|
||||
|
||||
# STM32 library paths
|
||||
F1_LIB_PATH=./STM32F10X_Lib
|
||||
F4_LIB_PATH=./STM32F4XX_Lib
|
||||
F7_LIB_PATH=./STM32F7XX_Lib
|
||||
F1_LIB_PATH = ./STM32F10X_Lib
|
||||
F4_LIB_PATH = ./STM32F4XX_Lib
|
||||
F7_LIB_PATH = ./STM32F7XX_Lib
|
||||
|
||||
# MCU external clock frequency (Hz)
|
||||
CLK_PI_F4=12000000
|
||||
CLK_DEF=8000000
|
||||
CLK_PI_F4 = 12000000
|
||||
CLK_DEF = 8000000
|
||||
|
||||
# Directory Structure
|
||||
BINDIR=bin
|
||||
OBJDIR_F1=obj_f1
|
||||
OBJDIR_F4=obj_f4
|
||||
OBJDIR_F7=obj_f7
|
||||
BINDIR = bin
|
||||
OBJDIR_F1 = obj_f1
|
||||
OBJDIR_F4 = obj_f4
|
||||
OBJDIR_F7 = obj_f7
|
||||
|
||||
# Output files
|
||||
BINELF_F1=mmdvm_f1.elf
|
||||
|
|
@ -51,33 +51,33 @@ BINHEX_F7=mmdvm_f7.hex
|
|||
BINBIN_F7=mmdvm_f7.bin
|
||||
|
||||
# Header directories
|
||||
INC_F1= . $(F1_LIB_PATH)/CMSIS/ $(F1_LIB_PATH)/Device/ $(F1_LIB_PATH)/STM32F10x_StdPeriph_Driver/inc/ $(F1_LIB_PATH)/usb/inc/
|
||||
INCLUDES_F1=$(INC_F1:%=-I%)
|
||||
INC_F4= . $(F4_LIB_PATH)/CMSIS/Include/ $(F4_LIB_PATH)/Device/ $(F4_LIB_PATH)/STM32F4xx_StdPeriph_Driver/include/
|
||||
INCLUDES_F4=$(INC_F4:%=-I%)
|
||||
INC_F7= . $(F7_LIB_PATH)/CMSIS/Include/ $(F7_LIB_PATH)/Device/ $(F7_LIB_PATH)/STM32F7xx_StdPeriph_Driver/inc/
|
||||
INCLUDES_F7=$(INC_F7:%=-I%)
|
||||
INC_F1 = . $(F1_LIB_PATH)/CMSIS/ $(F1_LIB_PATH)/Device/ $(F1_LIB_PATH)/STM32F10x_StdPeriph_Driver/inc/ $(F1_LIB_PATH)/usb/inc/
|
||||
INCLUDES_F1 = $(INC_F1:%=-I%)
|
||||
INC_F4 = . $(F4_LIB_PATH)/CMSIS/Include/ $(F4_LIB_PATH)/Device/ $(F4_LIB_PATH)/STM32F4xx_StdPeriph_Driver/include/
|
||||
INCLUDES_F4 = $(INC_F4:%=-I%)
|
||||
INC_F7 = . $(F7_LIB_PATH)/CMSIS/Include/ $(F7_LIB_PATH)/Device/ $(F7_LIB_PATH)/STM32F7xx_StdPeriph_Driver/inc/
|
||||
INCLUDES_F7 = $(INC_F7:%=-I%)
|
||||
|
||||
# CMSIS libraries
|
||||
INCLUDES_LIBS_F1=
|
||||
INCLUDES_LIBS_F4=$(F4_LIB_PATH)/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a
|
||||
INCLUDES_LIBS_F7=$(F7_LIB_PATH)/CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a
|
||||
INCLUDES_LIBS_F1 =
|
||||
INCLUDES_LIBS_F4 = $(F4_LIB_PATH)/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a
|
||||
INCLUDES_LIBS_F7 = $(F7_LIB_PATH)/CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a
|
||||
|
||||
# STM32F1 Standard Peripheral Libraries source path
|
||||
STD_LIB_F1=$(F1_LIB_PATH)/STM32F10x_StdPeriph_Driver/src
|
||||
STD_LIB_F1 = $(F1_LIB_PATH)/STM32F10x_StdPeriph_Driver/src
|
||||
|
||||
# STM32F1 USB support source path
|
||||
USB_F1=$(F1_LIB_PATH)/usb
|
||||
USB_F1 = $(F1_LIB_PATH)/usb
|
||||
|
||||
# STM32F4 Standard Peripheral Libraries source path
|
||||
STD_LIB_F4=$(F4_LIB_PATH)/STM32F4xx_StdPeriph_Driver/source
|
||||
STD_LIB_F4 = $(F4_LIB_PATH)/STM32F4xx_StdPeriph_Driver/source
|
||||
|
||||
# STM32F7 Standard Peripheral Libraries source path
|
||||
STD_LIB_F7=$(F7_LIB_PATH)/STM32F7xx_StdPeriph_Driver/src
|
||||
STD_LIB_F7 = $(F7_LIB_PATH)/STM32F7xx_StdPeriph_Driver/src
|
||||
|
||||
# STM32F1 system source path
|
||||
SYS_DIR_F1=$(F1_LIB_PATH)/Device
|
||||
STARTUP_DIR_F1=$(F1_LIB_PATH)/Device/startup
|
||||
SYS_DIR_F1 = $(F1_LIB_PATH)/Device
|
||||
STARTUP_DIR_F1 = $(F1_LIB_PATH)/Device/startup
|
||||
|
||||
# STM32F4 system source path
|
||||
SYS_DIR_F4=$(F4_LIB_PATH)/Device
|
||||
|
|
@ -88,16 +88,18 @@ SYS_DIR_F7=$(F7_LIB_PATH)/Device
|
|||
STARTUP_DIR_F7=$(F7_LIB_PATH)/Device/startup
|
||||
|
||||
# GNU ARM Embedded Toolchain
|
||||
CC=arm-none-eabi-gcc
|
||||
CXX=arm-none-eabi-g++
|
||||
LD=arm-none-eabi-ld
|
||||
AR=arm-none-eabi-ar
|
||||
AS=arm-none-eabi-as
|
||||
CP=arm-none-eabi-objcopy
|
||||
OD=arm-none-eabi-objdump
|
||||
NM=arm-none-eabi-nm
|
||||
SIZE=arm-none-eabi-size
|
||||
A2L=arm-none-eabi-addr2line
|
||||
CROSS := arm-none-eabi-
|
||||
|
||||
CC := $(CROSS)gcc
|
||||
CXX := $(CROSS)g++
|
||||
LD := arm-none-eabi-ld
|
||||
AR := arm-none-eabi-ar
|
||||
AS := arm-none-eabi-as
|
||||
CP := arm-none-eabi-objcopy
|
||||
OD := arm-none-eabi-objdump
|
||||
NM := arm-none-eabi-nm
|
||||
SIZE := arm-none-eabi-size
|
||||
A2L := arm-none-eabi-addr2line
|
||||
|
||||
# Configure vars depending on OS
|
||||
ifeq ($(OS),Windows_NT)
|
||||
|
|
@ -185,9 +187,9 @@ OBJ_F4=$(CXXSRC:$(MMDVM_HS_PATH)/%.cpp=$(OBJDIR_F4)/%.o) $(CSRC_STD_F4:$(STD_LIB
|
|||
OBJ_F7=$(CXXSRC:$(MMDVM_HS_PATH)/%.cpp=$(OBJDIR_F7)/%.o) $(CSRC_STD_F7:$(STD_LIB_F7)/%.c=$(OBJDIR_F7)/%.o) $(SYS_F7:$(SYS_DIR_F7)/%.c=$(OBJDIR_F7)/%.o) $(STARTUP_F7:$(STARTUP_DIR_F7)/%.c=$(OBJDIR_F7)/%.o)
|
||||
|
||||
# MCU flags
|
||||
MCFLAGS_F1=-mcpu=cortex-m3 -march=armv7-m -mthumb -Wall -Wextra
|
||||
MCFLAGS_F4=-mcpu=cortex-m4 -mthumb -mlittle-endian -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb-interwork
|
||||
MCFLAGS_F7=-mcpu=cortex-m7 -mthumb -mlittle-endian -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb-interwork
|
||||
MCFLAGS_F1 = -mcpu=cortex-m3 -march=armv7-m -mthumb -Wall -Wextra
|
||||
MCFLAGS_F4 = -mcpu=cortex-m4 -mthumb -mlittle-endian -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb-interwork
|
||||
MCFLAGS_F7 = -mcpu=cortex-m7 -mthumb -mlittle-endian -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb-interwork
|
||||
|
||||
# Compile flags
|
||||
DEFS_F1_HS=-DUSE_STDPERIPH_DRIVER -DSTM32F10X_MD -DHSE_VALUE=$(OSC) -DVECT_TAB_OFFSET=0x0 -DMADEBYMAKEFILE
|
||||
|
|
@ -200,23 +202,23 @@ DEFS_F446=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_NUCLEO -DHS
|
|||
DEFS_F767=-DUSE_HAL_DRIVER -DSTM32F767xx -DSTM32F7XX -DSTM32F7_NUCLEO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
|
||||
# Build compiler flags
|
||||
CFLAGS_F1=-c $(MCFLAGS_F1) $(INCLUDES_F1)
|
||||
CXXFLAGS_F1=-c $(MCFLAGS_F1) $(INCLUDES_F1)
|
||||
CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
|
||||
CXXFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
|
||||
CFLAGS_F7=-c $(MCFLAGS_F7) $(INCLUDES_F7)
|
||||
CXXFLAGS_F7=-c $(MCFLAGS_F7) $(INCLUDES_F7)
|
||||
CFLAGS_F1 = -c $(MCFLAGS_F1) $(INCLUDES_F1)
|
||||
CXXFLAGS_F1 = -c $(MCFLAGS_F1) $(INCLUDES_F1)
|
||||
CFLAGS_F4 = -c $(MCFLAGS_F4) $(INCLUDES_F4)
|
||||
CXXFLAGS_F4 = -c $(MCFLAGS_F4) $(INCLUDES_F4)
|
||||
CFLAGS_F7 = -c $(MCFLAGS_F7) $(INCLUDES_F7)
|
||||
CXXFLAGS_F7 = -c $(MCFLAGS_F7) $(INCLUDES_F7)
|
||||
|
||||
# Linker flags
|
||||
LDFLAGS_F1_N =-T normal.ld $(MCFLAGS_F1) $(INCLUDES_LIBS_F1)
|
||||
LDFLAGS_F1_BL =-T bootloader.ld $(MCFLAGS_F1) $(INCLUDES_LIBS_F1)
|
||||
LDFLAGS_F4 =-T stm32f4xx_link.ld $(MCFLAGS_F4) $(INCLUDES_LIBS_F4)
|
||||
LDFLAGS_F7 =-T stm32f7xx_link.ld $(MCFLAGS_F7) $(INCLUDES_LIBS_F7)
|
||||
LDFLAGS_F1_N = -T normal.ld $(MCFLAGS_F1) $(INCLUDES_LIBS_F1)
|
||||
LDFLAGS_F1_BL = -T bootloader.ld $(MCFLAGS_F1) $(INCLUDES_LIBS_F1)
|
||||
LDFLAGS_F4 = -T stm32f4xx_link.ld $(MCFLAGS_F4) $(INCLUDES_LIBS_F4)
|
||||
LDFLAGS_F7 = -T stm32f7xx_link.ld $(MCFLAGS_F7) $(INCLUDES_LIBS_F7)
|
||||
|
||||
# Common flags
|
||||
CFLAGS=-Os -ffunction-sections -fdata-sections -nostdlib -DCUSTOM_NEW -DNO_EXCEPTIONS -Wno-unused-parameter -nostdlib
|
||||
CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -nostdlib -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS -Wno-unused-parameter
|
||||
LDFLAGS=-Os --specs=nano.specs --specs=nosys.specs
|
||||
CFLAGS = -Os -ffunction-sections -fdata-sections -nostdlib -DCUSTOM_NEW -DNO_EXCEPTIONS -Wno-unused-parameter -nostdlib
|
||||
CXXFLAGS = -Os -fno-exceptions -ffunction-sections -fdata-sections -nostdlib -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS -Wno-unused-parameter
|
||||
LDFLAGS = -Os --specs=nano.specs --specs=nosys.specs
|
||||
|
||||
# Build Rules
|
||||
.PHONY: all release_f1 release_f4 release_f7 hs bl nobl pi-f4 f446 f767 clean
|
||||
|
|
|
|||
|
|
@ -17,11 +17,13 @@
|
|||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#if !defined(POCSAGDEFINES_H)
|
||||
#define POCSAGDEFINES_H
|
||||
#if !defined(POCSAGDEFINES_H_)
|
||||
#define POCSAGDEFINES_H_
|
||||
|
||||
|
||||
const uint16_t POCSAG_PREAMBLE_LENGTH_BYTES = 18U * sizeof(uint32_t);
|
||||
const uint16_t POCSAG_FRAME_LENGTH_BYTES = 17U * sizeof(uint32_t);
|
||||
const uint8_t POCSAG_SYNC = 0xAAU;
|
||||
const uint8_t POCSAG_SYNC = 0xAAU;
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* !POCSAGDEFINES_H_ */
|
||||
|
|
|
|||
187
POCSAGTX.cpp
187
POCSAGTX.cpp
|
|
@ -23,132 +23,129 @@
|
|||
#include "POCSAGTX.h"
|
||||
#include "POCSAGDefines.h"
|
||||
|
||||
CPOCSAGTX::CPOCSAGTX() :
|
||||
m_buffer(1000U),
|
||||
m_poBuffer(),
|
||||
m_poLen(0U),
|
||||
m_poPtr(0U),
|
||||
m_txDelay(POCSAG_PREAMBLE_LENGTH_BYTES),
|
||||
m_delay(false),
|
||||
m_cal(false)
|
||||
{
|
||||
|
||||
|
||||
CPOCSAGTX::CPOCSAGTX(): m_buffer(1000U),
|
||||
m_poBuffer(),
|
||||
m_poLen(0U),
|
||||
m_poPtr(0U),
|
||||
m_txDelay(POCSAG_PREAMBLE_LENGTH_BYTES),
|
||||
m_delay(false),
|
||||
m_cal(false) {
|
||||
}
|
||||
|
||||
void CPOCSAGTX::process()
|
||||
{
|
||||
if (m_cal) {
|
||||
m_delay = false;
|
||||
createCal();
|
||||
}
|
||||
void CPOCSAGTX::process() {
|
||||
if (m_cal) {
|
||||
m_delay = false;
|
||||
createCal();
|
||||
}
|
||||
|
||||
if (m_poLen == 0U && m_buffer.getData() > 0U) {
|
||||
if (!m_tx) {
|
||||
m_delay = true;
|
||||
m_poLen = m_txDelay;
|
||||
} else {
|
||||
m_delay = false;
|
||||
for (uint8_t i = 0U; i < POCSAG_FRAME_LENGTH_BYTES; i++)
|
||||
m_poBuffer[i] = m_buffer.get();
|
||||
if (m_poLen == 0U && m_buffer.getData() > 0U) {
|
||||
if (!m_tx) {
|
||||
m_delay = true;
|
||||
m_poLen = m_txDelay;
|
||||
} else {
|
||||
m_delay = false;
|
||||
for (uint8_t i = 0U; i < POCSAG_FRAME_LENGTH_BYTES; i++) {
|
||||
m_poBuffer[i] = m_buffer.get();
|
||||
}
|
||||
|
||||
m_poLen = POCSAG_FRAME_LENGTH_BYTES;
|
||||
}
|
||||
m_poPtr = 0U;
|
||||
}
|
||||
m_poLen = POCSAG_FRAME_LENGTH_BYTES;
|
||||
}
|
||||
m_poPtr = 0U;
|
||||
}
|
||||
|
||||
if (m_poLen > 0U) {
|
||||
uint16_t space = io.getSpace();
|
||||
if (m_poLen > 0U) {
|
||||
uint16_t space = io.getSpace();
|
||||
|
||||
while (space > 8U) {
|
||||
if (m_delay) {
|
||||
m_poPtr++;
|
||||
writeByte(POCSAG_SYNC);
|
||||
} else
|
||||
writeByte(m_poBuffer[m_poPtr++]);
|
||||
while (space > 8U) {
|
||||
if (m_delay) {
|
||||
m_poPtr++;
|
||||
writeByte(POCSAG_SYNC);
|
||||
} else {
|
||||
writeByte(m_poBuffer[m_poPtr++]);
|
||||
}
|
||||
|
||||
space -= 8U;
|
||||
space -= 8U;
|
||||
|
||||
if (m_poPtr >= m_poLen) {
|
||||
m_poPtr = 0U;
|
||||
m_poLen = 0U;
|
||||
m_delay = false;
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (m_poPtr >= m_poLen) {
|
||||
m_poPtr = 0U;
|
||||
m_poLen = 0U;
|
||||
m_delay = false;
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
bool CPOCSAGTX::busy()
|
||||
{
|
||||
if (m_poLen > 0U || m_buffer.getData() > 0U)
|
||||
return true;
|
||||
else
|
||||
return false;
|
||||
bool CPOCSAGTX::busy() {
|
||||
if (m_poLen > 0U || m_buffer.getData() > 0U) {
|
||||
return true;
|
||||
} else {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t CPOCSAGTX::writeData(const uint8_t* data, uint8_t length)
|
||||
{
|
||||
if (length != POCSAG_FRAME_LENGTH_BYTES)
|
||||
return 4U;
|
||||
uint8_t CPOCSAGTX::writeData(const uint8_t* data, uint8_t length) {
|
||||
if (length != POCSAG_FRAME_LENGTH_BYTES)
|
||||
return 4U;
|
||||
|
||||
uint16_t space = m_buffer.getSpace();
|
||||
if (space < POCSAG_FRAME_LENGTH_BYTES)
|
||||
return 5U;
|
||||
uint16_t space = m_buffer.getSpace();
|
||||
if (space < POCSAG_FRAME_LENGTH_BYTES)
|
||||
return 5U;
|
||||
|
||||
for (uint8_t i = 0U; i < POCSAG_FRAME_LENGTH_BYTES; i++)
|
||||
m_buffer.put(data[i]);
|
||||
for (uint8_t i = 0U; i < POCSAG_FRAME_LENGTH_BYTES; i++)
|
||||
m_buffer.put(data[i]);
|
||||
|
||||
return 0U;
|
||||
return 0U;
|
||||
}
|
||||
|
||||
void CPOCSAGTX::writeByte(uint8_t c)
|
||||
{
|
||||
uint8_t bit;
|
||||
uint8_t mask = 0x80U;
|
||||
void CPOCSAGTX::writeByte(uint8_t c) {
|
||||
uint8_t bit;
|
||||
uint8_t mask = 0x80U;
|
||||
|
||||
for (uint8_t i = 0U; i < 8U; i++, c <<= 1) {
|
||||
if ((c & mask) == mask)
|
||||
bit = 1U;
|
||||
else
|
||||
bit = 0U;
|
||||
for (uint8_t i = 0U; i < 8U; i++, c <<= 1) {
|
||||
if ((c & mask) == mask) {
|
||||
bit = 1U;
|
||||
} else {
|
||||
bit = 0U;
|
||||
}
|
||||
|
||||
io.write(&bit, 1);
|
||||
}
|
||||
io.write(&bit, 1);
|
||||
}
|
||||
}
|
||||
|
||||
void CPOCSAGTX::setTXDelay(uint8_t delay)
|
||||
{
|
||||
m_txDelay = POCSAG_PREAMBLE_LENGTH_BYTES + (delay * 3U) / 2U;
|
||||
void CPOCSAGTX::setTXDelay(uint8_t delay) {
|
||||
m_txDelay = POCSAG_PREAMBLE_LENGTH_BYTES + (delay * 3U) / 2U;
|
||||
|
||||
if (m_txDelay > 150U)
|
||||
m_txDelay = 150U;
|
||||
if (m_txDelay > 150U) {
|
||||
m_txDelay = 150U;
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t CPOCSAGTX::getSpace() const
|
||||
{
|
||||
return m_buffer.getSpace() / POCSAG_FRAME_LENGTH_BYTES;
|
||||
uint8_t CPOCSAGTX::getSpace() const {
|
||||
return m_buffer.getSpace() / POCSAG_FRAME_LENGTH_BYTES;
|
||||
}
|
||||
|
||||
uint8_t CPOCSAGTX::setCal(const uint8_t* data, uint8_t length)
|
||||
{
|
||||
if (length != 1U)
|
||||
return 4U;
|
||||
uint8_t CPOCSAGTX::setCal(const uint8_t* data, uint8_t length) {
|
||||
if (length != 1U)
|
||||
return 4U;
|
||||
|
||||
m_cal = data[0U] == 1U;
|
||||
m_cal = data[0U] == 1U;
|
||||
|
||||
if (m_cal)
|
||||
io.ifConf(STATE_POCSAG, true);
|
||||
if (m_cal)
|
||||
io.ifConf(STATE_POCSAG, true);
|
||||
|
||||
return 0U;
|
||||
return 0U;
|
||||
}
|
||||
|
||||
void CPOCSAGTX::createCal()
|
||||
{
|
||||
// 600 Hz square wave generation
|
||||
for (unsigned int i = 0U; i < POCSAG_FRAME_LENGTH_BYTES; i++) {
|
||||
m_poBuffer[i] = 0xAAU;
|
||||
}
|
||||
void CPOCSAGTX::createCal() {
|
||||
// 600 Hz square wave generation
|
||||
for (unsigned int i = 0U; i < POCSAG_FRAME_LENGTH_BYTES; i++) {
|
||||
m_poBuffer[i] = 0xAAU;
|
||||
}
|
||||
|
||||
m_poLen = POCSAG_FRAME_LENGTH_BYTES;
|
||||
m_poLen = POCSAG_FRAME_LENGTH_BYTES;
|
||||
|
||||
m_poPtr = 0U;
|
||||
m_poPtr = 0U;
|
||||
}
|
||||
|
|
|
|||
40
POCSAGTX.h
40
POCSAGTX.h
|
|
@ -18,37 +18,39 @@
|
|||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#if !defined(POCSAGTX_H)
|
||||
#define POCSAGTX_H
|
||||
#if !defined(POCSAGTX_H_)
|
||||
#define POCSAGTX_H_
|
||||
|
||||
|
||||
class CPOCSAGTX {
|
||||
public:
|
||||
CPOCSAGTX();
|
||||
CPOCSAGTX();
|
||||
|
||||
uint8_t writeData(const uint8_t* data, uint8_t length);
|
||||
uint8_t writeData(const uint8_t *data, uint8_t length);
|
||||
|
||||
void setTXDelay(uint8_t delay);
|
||||
void setTXDelay(uint8_t delay);
|
||||
|
||||
uint8_t setCal(const uint8_t* data, uint8_t length);
|
||||
uint8_t setCal(const uint8_t *data, uint8_t length);
|
||||
|
||||
void createCal();
|
||||
void createCal();
|
||||
|
||||
uint8_t getSpace() const;
|
||||
uint8_t getSpace() const;
|
||||
|
||||
void process();
|
||||
void process();
|
||||
|
||||
bool busy();
|
||||
bool busy();
|
||||
|
||||
private:
|
||||
CSerialRB m_buffer;
|
||||
uint8_t m_poBuffer[200U];
|
||||
uint16_t m_poLen;
|
||||
uint16_t m_poPtr;
|
||||
uint16_t m_txDelay;
|
||||
bool m_delay;
|
||||
bool m_cal;
|
||||
CSerialRB m_buffer;
|
||||
uint8_t m_poBuffer[200U];
|
||||
uint16_t m_poLen;
|
||||
uint16_t m_poPtr;
|
||||
uint16_t m_txDelay;
|
||||
bool m_delay;
|
||||
bool m_cal;
|
||||
|
||||
void writeByte(uint8_t c);
|
||||
|
||||
void writeByte(uint8_t c);
|
||||
};
|
||||
|
||||
#endif
|
||||
#endif /* !POCSAGTX_H_ */
|
||||
|
|
|
|||
|
|
@ -17,10 +17,9 @@
|
|||
*/
|
||||
|
||||
/* Memory areas */
|
||||
MEMORY
|
||||
{
|
||||
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 128K /* FLASH */
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K /* Main RAM */
|
||||
MEMORY {
|
||||
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 128K /* FLASH */
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K /* Main RAM */
|
||||
}
|
||||
|
||||
INCLUDE stm32f10x_link.ld
|
||||
INCLUDE stm32f10x_link.ld
|
||||
|
|
|
|||
|
|
@ -26,10 +26,9 @@ ENTRY(Reset_Handler)
|
|||
/* Stack start address (end of 20K RAM) */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
|
||||
SECTIONS {
|
||||
.text : {
|
||||
/* The interrupt vector table */
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector .isr_vector.*))
|
||||
|
|
@ -65,10 +64,9 @@ SECTIONS
|
|||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
__fini_array_end = .;
|
||||
|
||||
} > ROM
|
||||
|
||||
/* ARM sections containing exception unwinding information */
|
||||
/* ARM sections containing exception unwinding information */
|
||||
.ARM.extab : {
|
||||
__extab_start = .;
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
|
|
@ -86,19 +84,17 @@ SECTIONS
|
|||
_sidata = .;
|
||||
|
||||
/* The .data section (initialized data) */
|
||||
.data : AT ( _sidata )
|
||||
{
|
||||
.data : AT(_sidata) {
|
||||
. = ALIGN(4);
|
||||
_sdata = . ; /* Start address for the .data section */
|
||||
_sdata = .; /* Start address for the .data section */
|
||||
*(.data .data*)
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = . ; /* End address for the .data section */
|
||||
_edata = .; /* End address for the .data section */
|
||||
} > RAM
|
||||
|
||||
/* The .bss section (uninitialized data) */
|
||||
.bss :
|
||||
{
|
||||
.bss : {
|
||||
. = ALIGN(4);
|
||||
_sbss = .; /* Start address for the .bss section */
|
||||
__bss_start__ = _sbss;
|
||||
|
|
@ -108,23 +104,21 @@ SECTIONS
|
|||
|
||||
. = ALIGN(4);
|
||||
_ebss = . ; /* End address for the .bss section */
|
||||
__bss_end__ = _ebss;
|
||||
__bss_end__ = _ebss;
|
||||
} > RAM
|
||||
|
||||
/* Space for heap and stack */
|
||||
.heap_stack :
|
||||
{
|
||||
end = . ; /* 'end' symbol defines heap location */
|
||||
_end = end ;
|
||||
.heap_stack : {
|
||||
end = .; /* 'end' symbol defines heap location */
|
||||
_end = end;
|
||||
. = . + _min_heap_size; /* Additional space for heap and stack */
|
||||
. = . + _min_stack_size;
|
||||
} > RAM
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
/DISCARD/ : {
|
||||
libc.a(*)
|
||||
libm.a(*)
|
||||
libgcc.a(*)
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue