LibreVNA/Hardware/Kicad/VNA.kicad_pro
nateof8 af26764539 Mar 2024 KiCad PWB as-built w/ fixes
Includes all updates made to Mar 2024 version of KiCad PWB plus fixes found during assembly.  Update board version to Feb 2025.
2025-02-26 20:56:34 -05:00

1270 lines
28 KiB
Plaintext

{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"apply_defaults_to_fp_fields": false,
"apply_defaults_to_fp_shapes": false,
"apply_defaults_to_fp_text": false,
"board_outline_line_width": 0.05,
"copper_line_width": 0.2,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.05,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.1,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.15,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
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"height": 1.308,
"width": 2.616
},
"silk_line_width": 0.15,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"min_clearance": 0.15
}
},
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [
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],
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""
],
[
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],
[
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],
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],
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],
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],
[
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[
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],
[
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[
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],
[
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],
[
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],
[
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],
[
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],
[
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],
[
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],
[
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],
[
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],
[
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[
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],
[
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""
]
],
"meta": {
"filename": "board_design_settings.json",
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "ignore",
"creepage": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_filters_mismatch": "ignore",
"footprint_symbol_mismatch": "warning",
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
"hole_near_hole": "error",
"hole_to_hole": "error",
"holes_co_located": "warning",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "ignore",
"microvia_drill_out_of_range": "error",
"mirrored_text_on_front_layer": "warning",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"nonmirrored_text_on_back_layer": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "warning",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "ignore",
"silk_over_copper": "ignore",
"silk_overlap": "ignore",
"skew_out_of_range": "error",
"solder_mask_bridge": "warning",
"starved_thermal": "warning",
"text_height": "ignore",
"text_thickness": "ignore",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_angle": "error",
"track_dangling": "warning",
"track_segment_length": "error",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zones_intersect": "error"
},
"rules": {
"max_error": 0.005,
"min_clearance": 0.09,
"min_connection": 0.09,
"min_copper_edge_clearance": 0.2,
"min_groove_width": 0.0,
"min_hole_clearance": 0.254,
"min_hole_to_hole": 0.254,
"min_microvia_diameter": 0.0,
"min_microvia_drill": 0.2,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.15,
"min_text_height": 1.0,
"min_text_thickness": 0.15,
"min_through_hole_diameter": 0.2,
"min_track_width": 0.09,
"min_via_annular_width": 0.075,
"min_via_diameter": 0.35,
"solder_mask_to_copper_clearance": 0.005,
"use_height_for_length_calcs": true
},
"teardrop_options": [
{
"td_onpthpad": true,
"td_onroundshapesonly": false,
"td_onsmdpad": true,
"td_ontrackend": false,
"td_onvia": true
}
],
"teardrop_parameters": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
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"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [
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0.1,
0.2,
0.25,
0.5,
0.75,
1.0,
2.0
],
"tuning_pattern_settings": {
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"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 1.0
},
"diff_pair_skew_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
},
"single_track_defaults": {
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"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
}
},
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
},
{
"diameter": 0.35,
"drill": 0.2
},
{
"diameter": 0.45,
"drill": 0.25
},
{
"diameter": 0.6,
"drill": 0.4
}
],
"zones_allow_external_fillets": false
},
"ipc2581": {
"dist": "",
"distpn": "",
"internal_id": "",
"mfg": "",
"mpn": ""
},
"layer_pairs": [],
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
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},
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],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"conflicting_netclasses": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"endpoint_off_grid": "warning",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
"missing_unit": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "error",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"simulation_model_issue": "ignore",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "VNA.kicad_pro",
"version": 3
},
"net_settings": {
"classes": [
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"clearance": 0.15,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
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"wire_width": 6
},
{
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"name": "3V3",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 0,
"schematic_color": "rgba(0, 0, 0, 0.000)",
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"wire_width": 6
},
{
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"name": "5V",
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"priority": 1,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
"via_diameter": 0.6,
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"wire_width": 6
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{
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"name": "RF",
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"wire_width": 6
},
{
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"name": "VCCINT",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 3,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
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"via_drill": 0.3,
"wire_width": 6
}
],
"meta": {
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},
"net_colors": null,
"netclass_assignments": {
"/2.LO + Ref Clock/CLKIN": [
"RF"
],
"/2.LO + Ref Clock/CLKOUT": [
"RF"
],
"/2.LO + Ref Clock/CLK_CLKIN": [
"RF"
],
"/2.LO + Ref Clock/CLK_CLKOUT": [
"RF"
],
"/2.LO + Ref Clock/CLK_PORT1LO2": [
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],
"/2.LO + Ref Clock/CLK_PORT2_LO2": [
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],
"/2.LO + Ref Clock/CLK_REFLO2": [
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],
"/2.LO + Ref Clock/CLK_SOURCE_LB": [
"RF"
],
"/HF Source/SRC_FILT_IN_ANT": [
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],
"/HF Source/SRC_FILT_IN_RF1": [
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],
"/HF Source/SRC_FILT_IN_RF3": [
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],
"/HF Source/SRC_FILT_IN_RF4": [
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],
"/HF Source/SRC_FILT_OUT_ANT": [
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"/HF Source/SRC_FILT_OUT_RF1": [
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"/HF Source/SRC_FILT_OUT_RF2": [
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"/HF Source/SRC_FILT_OUT_RF4": [
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],
"/HF Source/SRC_FILT_THRU": [
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"/HF Source/SRC_REF_IN": [
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],
"/HF Source/SRC_RFOUTA_N": [
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],
"/HF Source/SRC_RFOUTA_P": [
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],
"FPGA_CLK": [
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],
"LO1_REF": [
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],
"Net-(C112-Pad2)": [
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],
"Net-(C113-Pad1)": [
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"Net-(C120-Pad2)": [
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],
"Net-(C121-Pad1)": [
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"Net-(C121-Pad2)": [
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"Net-(C123-Pad2)": [
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],
"Net-(C128-Pad1)": [
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"Net-(C128-Pad2)": [
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"Net-(C130-Pad1)": [
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"Net-(C130-Pad2)": [
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"Net-(C136-Pad1)": [
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"Net-(C149-Pad2)": [
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"Net-(C150-Pad1)": [
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"Net-(C157-Pad2)": [
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],
"Net-(C158-Pad1)": [
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"Net-(C158-Pad2)": [
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"Net-(C160-Pad2)": [
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],
"Net-(C165-Pad1)": [
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],
"Net-(C165-Pad2)": [
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],
"Net-(C167-Pad1)": [
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],
"Net-(C167-Pad2)": [
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],
"Net-(C173-Pad2)": [
"RF"
],
"Net-(C174-Pad1)": [
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],
"Net-(C183-Pad1)": [
"RF"
],
"Net-(C184-Pad1)": [
"RF"
],
"Net-(C184-Pad2)": [
"RF"
],
"Net-(C191-Pad2)": [
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],
"Net-(C192-Pad2)": [
"RF"
],
"Net-(C196-Pad1)": [
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],
"Net-(C196-Pad2)": [
"RF"
],
"Net-(C270-Pad2)": [
"RF"
],
"Net-(C96-Pad2)": [
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