mirror of
https://github.com/jankae/LibreVNA.git
synced 2025-12-06 07:12:10 +01:00
a4faeb28b0
- Bugfixes: - improve SPI timing in FPGA - fix markers and reduce CPU load when using markers with fast traces - New features: - dwell time configurable in acquisition toolbar - PLL settling delay in device configuration - device configuration persistent across power cycles
56 lines
1.1 KiB
C++
56 lines
1.1 KiB
C++
#include "stm.hpp"
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#define LOG_LEVEL LOG_LEVEL_INFO
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#define LOG_MODULE "STM"
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#include "Log.h"
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using Callback = void(*)(void);
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static constexpr uint8_t numCallbacks = 10;
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static Callback callbacks[numCallbacks];
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uint8_t read_index, write_index;
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static void increment(uint8_t &index) {
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if(index < numCallbacks - 1) {
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index++;
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} else {
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index = 0;
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}
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}
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static uint8_t callbackFifoLevel() {
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int8_t level = (int8_t) write_index - (int8_t) read_index;
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if(level < 0) {
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level += numCallbacks;
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}
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return (uint8_t) level;
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}
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void STM::Init() {
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read_index = write_index = 0;
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HAL_NVIC_SetPriority(COMP4_IRQn, 6, 0);
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HAL_NVIC_EnableIRQ(COMP4_IRQn);
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}
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bool STM::DispatchToInterrupt(void (*cb)(void)) {
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if(callbackFifoLevel() < numCallbacks - 1) {
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callbacks[write_index] = cb;
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increment(write_index);
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HAL_NVIC_SetPendingIRQ(COMP4_IRQn);
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return true;
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} else {
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// already at limit
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LOG_ERR("Interrupt dispatch queue full");
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return false;
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}
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}
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extern "C" {
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void COMP4_IRQHandler() {
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while(callbackFifoLevel() > 0) {
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if (callbacks[read_index]) {
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callbacks[read_index]();
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}
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increment(read_index);
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}
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}
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}
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