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display error flags in statusbar (overload/unlock/unlevel)

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This commit is contained in:
Jan Käberich 2021-02-11 22:49:47 +01:00
parent 6d6f0843e9
commit e3f072b307
15 changed files with 89 additions and 13 deletions
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2
Software/VNA_embedded/Application/Communication/Protocol.cpp
View file

@ -252,6 +252,7 @@ static Protocol::DeviceInfo DecodeDeviceInfo(uint8_t *buf) {
d.source_locked = e.getBits(1);
d.LO1_locked = e.getBits(1);
d.ADC_overload = e.getBits(1);
d.unlevel = e.getBits(1);
e.get(d.temp_source);
e.get(d.temp_LO1);
e.get(d.temp_MCU);
@ -283,6 +284,7 @@ static int16_t EncodeDeviceInfo(Protocol::DeviceInfo d, uint8_t *buf,
e.addBits(d.source_locked, 1);
e.addBits(d.LO1_locked, 1);
e.addBits(d.ADC_overload, 1);
e.addBits(d.unlevel, 1);
e.add(d.temp_source);
e.add(d.temp_LO1);
e.add(d.temp_MCU);

1
Software/VNA_embedded/Application/Communication/Protocol.hpp
View file

@ -53,6 +53,7 @@ using DeviceInfo = struct _deviceInfo {
uint8_t source_locked:1;
uint8_t LO1_locked:1;
uint8_t ADC_overload:1;
uint8_t unlevel:1;
uint8_t temp_source;
uint8_t temp_LO1;
uint8_t temp_MCU;

1
Software/VNA_embedded/Application/Generator.cpp
View file

@ -44,6 +44,7 @@ void Generator::Setup(Protocol::GeneratorSettings g) {
}
}
auto amplitude = HW::GetAmplitudeSettings(g.cdbm_level, g.frequency, g.applyAmplitudeCorrection, g.activePort == 2);
HW::SetOutputUnlevel(amplitude.unlevel);
// Select correct source
if(g.frequency < HW::BandSwitchFrequency) {
m.SourceLowEN = 1;

8
Software/VNA_embedded/Application/Hardware.cpp
View file

@ -16,6 +16,7 @@
static uint32_t extOutFreq = 0;
static bool extRefInUse = false;
HW::Mode activeMode;
static bool unlevel = false;
static Protocol::ReferenceSettings ref;
static uint32_t lastISR;
@ -186,6 +187,7 @@ void HW::SetMode(Mode mode) {
// already the correct mode
return;
}
unlevel = false;
switch(activeMode) {
case Mode::Manual:
Manual::Stop();
@ -215,6 +217,7 @@ bool HW::GetTemps(uint8_t *source, uint8_t *lo) {
}
void HW::SetIdle() {
unlevel = false;
FPGA::AbortSweep();
FPGA::SetMode(FPGA::Mode::FPGA);
FPGA::Enable(FPGA::Periphery::SourceChip, false);
@ -283,6 +286,10 @@ bool HW::TimedOut() {
}
}
void HW::SetOutputUnlevel(bool unlev) {
unlevel = unlev;
}
void HW::fillDeviceInfo(Protocol::DeviceInfo *info, bool updateEvenWhenBusy) {
// copy constant default values
memcpy(info, &HW::Info, sizeof(HW::Info));
@ -311,6 +318,7 @@ void HW::fillDeviceInfo(Protocol::DeviceInfo *info, bool updateEvenWhenBusy) {
info->source_locked = (status & (int) FPGA::Interrupt::SourceUnlock) ? 0 : 1;
info->extRefAvailable = Ref::available();
info->extRefInUse = extRefInUse;
info->unlevel = unlevel;
info->temp_LO1 = tempLO;
info->temp_source = tempSource;
FPGA::ResetADCLimits();

3
Software/VNA_embedded/Application/Hardware.hpp
View file

@ -60,6 +60,7 @@ static constexpr Protocol::DeviceInfo Info = {
.source_locked = 0,
.LO1_locked = 0,
.ADC_overload = 0,
.unlevel = 0,
.temp_source = 0,
.temp_LO1 = 0,
.temp_MCU = 0,
@ -89,6 +90,8 @@ void SetIdle();
void Work();
bool TimedOut();
void SetOutputUnlevel(bool unlev);
using AmplitudeSettings = struct _amplitudeSettings {
uint8_t attenuator;
union {

21
Software/VNA_embedded/Application/SpectrumAnalyzer.cpp
View file

@ -64,6 +64,10 @@ static void StartNextSample() {
if(trackingFreq > 0 && trackingFreq <= (int64_t) HW::Info.limits_maxFreq) {
// tracking frequency is valid, calculate required settings and select band
auto amplitude = HW::GetAmplitudeSettings(s.trackingPower, trackingFreq, s.applySourceCorrection, s.trackingGeneratorPort);
// only set the flag here, it is reset at the beginning of each sweep (this makes sure it is set if any of the points are not reached by the TG)
if(amplitude.unlevel) {
HW::SetOutputUnlevel(true);
}
attenuator = amplitude.attenuator;
if(trackingFreq < HW::BandSwitchFrequency) {
Si5351.SetCLK(SiChannel::LowbandSource, trackingFreq, Si5351C::PLL::B, amplitude.lowBandPower);
@ -161,6 +165,7 @@ static void StartNextSample() {
void SA::Setup(Protocol::SpectrumAnalyzerSettings settings) {
LOG_DEBUG("Setting up...");
HW::SetOutputUnlevel(false);
SA::Stop();
vTaskDelay(5);
s = settings;
@ -369,11 +374,9 @@ void SA::Work() {
}
// setup for next step
signalIDstep = 0;
if(pointCnt < points - DFTpoints) {
pointCnt += DFTpoints;
} else {
pointCnt = 0;
// sweep finished, extract device info
if(pointCnt % 10 == 0) {
// send device info every nth point
FPGA::Enable(FPGA::Periphery::SourceChip); // needs to enable the chip to get a valid temperature reading
Protocol::PacketInfo packet;
packet.type = Protocol::PacketType::DeviceInfo;
@ -381,6 +384,14 @@ void SA::Work() {
FPGA::Disable(FPGA::Periphery::SourceChip);
Communication::Send(packet);
}
if(pointCnt < points - DFTpoints) {
pointCnt += DFTpoints;
} else {
pointCnt = 0;
// reset possibly active unlevel flag before next sweep
HW::SetOutputUnlevel(false);
}
} else {
// more measurements required for signal ID
signalIDstep++;