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Change ADC samplerate for points at which LO feedthrough would alias
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4 changed files with 48 additions and 6 deletions
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@ -127,8 +127,9 @@ bool HW::Init() {
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}
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// Set default ADC samplerate
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FPGA::WriteRegister(FPGA::Reg::ADCPrescaler, 128);
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FPGA::WriteRegister(FPGA::Reg::PhaseIncrement, 1280);
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FPGA::WriteRegister(FPGA::Reg::ADCPrescaler, HW::ADCprescaler);
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// Set phase increment according to
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FPGA::WriteRegister(FPGA::Reg::PhaseIncrement, HW::DFTphaseInc);
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// Enable new data and sweep halt interrupt
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FPGA::EnableInterrupt(FPGA::Interrupt::NewData);
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