diff --git a/FPGA/VNA/Sweep.vhd b/FPGA/VNA/Sweep.vhd
index 5e08670..59f100b 100644
--- a/FPGA/VNA/Sweep.vhd
+++ b/FPGA/VNA/Sweep.vhd
@@ -196,6 +196,7 @@ begin
end if;
end if;
when Settling =>
+ NEW_DATA <= '0';
source_active <= '0';
if std_logic_vector(stage_cnt) = PORT1_STAGE then
PORT1_ACTIVE <= '1';
@@ -232,7 +233,6 @@ begin
-- wait for sampling to finish
START_SAMPLING <= '0';
if SAMPLING_BUSY = '0' then
- NEW_DATA <= '1';
RESULT_INDEX <= std_logic_vector(stage_cnt) & std_logic_vector(point_cnt);
state <= WaitTriggerLow;
end if;
@@ -246,7 +246,7 @@ begin
state <= SamplingDone;
end if;
when SamplingDone =>
- NEW_DATA <= '0';
+ NEW_DATA <= '1';
if stage_cnt < unsigned(STAGES) then
stage_cnt <= stage_cnt + 1;
-- can go directly to preperation for next stage
@@ -256,6 +256,7 @@ begin
end if;
settling_cnt <= settling_time;
when NextPoint =>
+ NEW_DATA <= '0';
if point_cnt < unsigned(NPOINTS) then
point_cnt <= point_cnt + 1;
stage_cnt <= (others => '0');
diff --git a/FPGA/VNA/VNA.gise b/FPGA/VNA/VNA.gise
index e406c7a..1f5ac1e 100644
--- a/FPGA/VNA/VNA.gise
+++ b/FPGA/VNA/VNA.gise
@@ -224,7 +224,7 @@
-
+
@@ -253,7 +253,7 @@
-
+
@@ -275,7 +275,7 @@
-
+
@@ -284,7 +284,7 @@
-
+
@@ -298,7 +298,7 @@
-
+
@@ -312,7 +312,7 @@
-
+
@@ -366,7 +366,7 @@
-
+
diff --git a/FPGA/VNA/top.bin b/FPGA/VNA/top.bin
index 6117ec7..d847476 100644
Binary files a/FPGA/VNA/top.bin and b/FPGA/VNA/top.bin differ
diff --git a/Software/PC_Application/Device/device.cpp b/Software/PC_Application/Device/device.cpp
index e355a8b..7ae0426 100644
--- a/Software/PC_Application/Device/device.cpp
+++ b/Software/PC_Application/Device/device.cpp
@@ -581,16 +581,16 @@ void Device::transmissionFinished(TransmissionResult result)
// remove transmitted packet
// qDebug() << "Transmission finsished (" << result << "), queue at " << transmissionQueue.size() << " Outstanding ACKs:"< callback;
diff --git a/Software/VNA_embedded/Application/App.cpp b/Software/VNA_embedded/Application/App.cpp
index adfd421..7e72a20 100644
--- a/Software/VNA_embedded/Application/App.cpp
+++ b/Software/VNA_embedded/Application/App.cpp
@@ -119,6 +119,7 @@ inline void App_Init() {
inline void App_Process() {
while(1) {
uint32_t notification;
+ LED::Toggle();
if(xTaskNotifyWait(0x00, UINT32_MAX, ¬ification, 100) == pdPASS) {
// something happened
if(notification & FLAG_USB_PACKET) {
diff --git a/Software/VNA_embedded/Application/Communication/Communication.cpp b/Software/VNA_embedded/Application/Communication/Communication.cpp
index bd9f0ff..725f1bb 100644
--- a/Software/VNA_embedded/Application/Communication/Communication.cpp
+++ b/Software/VNA_embedded/Application/Communication/Communication.cpp
@@ -7,7 +7,6 @@
static uint8_t inputBuffer[1024];
uint16_t inputCnt = 0;
-static uint8_t outputBuffer[1024];
static Communication::Callback callback = nullptr;
static uint8_t blockAcks = 0;
@@ -45,6 +44,7 @@ void Communication::Input(const uint8_t *buf, uint16_t len) {
#include "Hardware.hpp"
bool Communication::Send(const Protocol::PacketInfo &packet) {
// DEBUG1_HIGH();
+ uint8_t outputBuffer[512];
uint16_t len = Protocol::EncodePacket(packet, outputBuffer,
sizeof(outputBuffer));
// DEBUG1_LOW();
diff --git a/Software/VNA_embedded/Application/Communication/Protocol.cpp b/Software/VNA_embedded/Application/Communication/Protocol.cpp
index 3b1aa15..bfc8912 100644
--- a/Software/VNA_embedded/Application/Communication/Protocol.cpp
+++ b/Software/VNA_embedded/Application/Communication/Protocol.cpp
@@ -59,6 +59,12 @@ uint16_t Protocol::DecodeBuffer(uint8_t *buf, uint16_t len, PacketInfo *info) {
return data - buf;
}
+ if(length > sizeof(PacketInfo) * 2) {
+ // larger than twice the maximum expected packet size, probably an error, ignore
+ info->type = PacketType::None;
+ return 1;
+ }
+
/* The complete frame has been received, check checksum */
auto type = (PacketType) data[3];
uint32_t crc = *(uint32_t*) &data[length - 4];
diff --git a/Software/VNA_embedded/Application/Drivers/USB/usb.c b/Software/VNA_embedded/Application/Drivers/USB/usb.c
index 165d677..4428c42 100644
--- a/Software/VNA_embedded/Application/Drivers/USB/usb.c
+++ b/Software/VNA_embedded/Application/Drivers/USB/usb.c
@@ -230,7 +230,6 @@ bool usb_transmit(const uint8_t *data, uint16_t length) {
// grab pointer to write position
__disable_irq();
uint16_t write_index = usb_transmit_read_index + usb_transmit_fifo_level;
- __enable_irq();
write_index %= sizeof(usb_transmit_fifo);
// copy the data to the fifo
uint16_t continous_length = sizeof(usb_transmit_fifo) - write_index;
@@ -243,21 +242,19 @@ bool usb_transmit(const uint8_t *data, uint16_t length) {
memcpy(&usb_transmit_fifo[0], data + continous_length, length - continous_length);
}
// increment fifo level
- __disable_irq();
usb_transmit_fifo_level += length;
- __enable_irq();
static bool first = true;
if(first) {
log_transmission_active = false;
first = false;
}
+ bool ret = true;
if(!data_transmission_active) {
- return trigger_next_fifo_transmission();
- } else {
- // still transmitting, no need to trigger
- return true;
+ ret = trigger_next_fifo_transmission();
}
+ __enable_irq();
+ return ret;
}
void usb_log(const char *log, uint16_t length) {
diff --git a/Software/VNA_embedded/Inc/main.h b/Software/VNA_embedded/Inc/main.h
index 082fbbe..046add0 100644
--- a/Software/VNA_embedded/Inc/main.h
+++ b/Software/VNA_embedded/Inc/main.h
@@ -61,8 +61,6 @@ extern "C" {
/* USER CODE END EM */
-void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
-
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
diff --git a/Software/VNA_embedded/Src/main.c b/Software/VNA_embedded/Src/main.c
index 1ab5992..6221d9e 100644
--- a/Software/VNA_embedded/Src/main.c
+++ b/Software/VNA_embedded/Src/main.c
@@ -466,7 +466,6 @@ static void MX_TIM2_Init(void)
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
- TIM_OC_InitTypeDef sConfigOC = {0};
/* USER CODE BEGIN TIM2_Init 1 */
@@ -486,28 +485,15 @@ static void MX_TIM2_Init(void)
{
Error_Handler();
}
- if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
- {
- Error_Handler();
- }
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
- sConfigOC.OCMode = TIM_OCMODE_PWM2;
- sConfigOC.Pulse = 0;
- sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
- {
- Error_Handler();
- }
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
- HAL_TIM_MspPostInit(&htim2);
}
@@ -715,7 +701,7 @@ static void MX_GPIO_Init(void)
__HAL_RCC_GPIOB_CLK_ENABLE();
/*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOA, FPGA_AUX1_Pin|FPGA_AUX3_Pin|FPGA_AUX2_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(GPIOA, FPGA_AUX1_Pin|FPGA_AUX3_Pin|FPGA_AUX2_Pin|GPIO_PIN_15, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(FPGA_CS_GPIO_Port, FPGA_CS_Pin, GPIO_PIN_SET);
@@ -759,6 +745,13 @@ static void MX_GPIO_Init(void)
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ /*Configure GPIO pin : PA15 */
+ GPIO_InitStruct.Pin = GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
/*Configure GPIO pin : FPGA_TRIGGER_OUT_Pin */
GPIO_InitStruct.Pin = FPGA_TRIGGER_OUT_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
diff --git a/Software/VNA_embedded/Src/stm32g4xx_hal_msp.c b/Software/VNA_embedded/Src/stm32g4xx_hal_msp.c
index ae1f1e5..06d3d18 100644
--- a/Software/VNA_embedded/Src/stm32g4xx_hal_msp.c
+++ b/Software/VNA_embedded/Src/stm32g4xx_hal_msp.c
@@ -60,9 +60,7 @@ extern DMA_HandleTypeDef hdma_spi1_tx;
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
-
-void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
- /**
+/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
@@ -404,32 +402,6 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
}
-void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
-{
- GPIO_InitTypeDef GPIO_InitStruct = {0};
- if(htim->Instance==TIM2)
- {
- /* USER CODE BEGIN TIM2_MspPostInit 0 */
-
- /* USER CODE END TIM2_MspPostInit 0 */
-
- __HAL_RCC_GPIOA_CLK_ENABLE();
- /**TIM2 GPIO Configuration
- PA15 ------> TIM2_CH1
- */
- GPIO_InitStruct.Pin = GPIO_PIN_15;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- /* USER CODE BEGIN TIM2_MspPostInit 1 */
-
- /* USER CODE END TIM2_MspPostInit 1 */
- }
-
-}
/**
* @brief TIM_Base MSP De-Initialization
* This function freeze the hardware resources used in this example
diff --git a/Software/VNA_embedded/VNA_embedded.ioc b/Software/VNA_embedded/VNA_embedded.ioc
index be31ef2..50d1583 100644
--- a/Software/VNA_embedded/VNA_embedded.ioc
+++ b/Software/VNA_embedded/VNA_embedded.ioc
@@ -204,7 +204,7 @@ PA14.Locked=true
PA14.Mode=Serial_Wire
PA14.Signal=SYS_JTCK-SWCLK
PA15.Locked=true
-PA15.Signal=S_TIM2_CH1
+PA15.Signal=GPIO_Output
PA2.GPIOParameters=GPIO_Speed,GPIO_Label
PA2.GPIO_Label=FPGA_AUX3
PA2.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
@@ -386,8 +386,6 @@ RCC.VCOInputFreq_Value=4000000
RCC.VCOOutputFreq_Value=320000000
SH.GPXTI1.0=GPIO_EXTI1
SH.GPXTI1.ConfNb=1
-SH.S_TIM2_CH1.0=TIM2_CH1,PWM Generation1 CH1
-SH.S_TIM2_CH1.ConfNb=1
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_4
SPI1.CalculateBaudRate=40.0 MBits/s
SPI1.DataSize=SPI_DATASIZE_8BIT
@@ -404,9 +402,7 @@ SPI2.Mode=SPI_MODE_MASTER
SPI2.VirtualType=VM_MASTER
TIM1.IPParameters=Prescaler
TIM1.Prescaler=159
-TIM2.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
-TIM2.IPParameters=Prescaler,PeriodNoDither,Channel-PWM Generation1 CH1,OCMode_PWM-PWM Generation1 CH1
-TIM2.OCMode_PWM-PWM\ Generation1\ CH1=TIM_OCMODE_PWM2
+TIM2.IPParameters=Prescaler,PeriodNoDither
TIM2.PeriodNoDither=99
TIM2.Prescaler=143
USART3.IPParameters=WordLength,VirtualMode-Asynchronous