From a4b1978098549b0d0da21794007551e7aa1ccd34 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jan=20K=C3=A4berich?= <j.kaeberich@gmx.de>
Date: Thu, 17 Nov 2022 12:05:52 +0100
Subject: [PATCH] wait for lock on Si5351C

---
 .../VNA_embedded/Application/Drivers/Si5351C.cpp     | 12 +++++++++++-
 .../VNA_embedded/Application/Drivers/Si5351C.hpp     |  1 +
 Software/VNA_embedded/Application/Hardware.cpp       |  4 +++-
 Software/VNA_embedded/Application/VNA.cpp            |  7 +++++--
 4 files changed, 20 insertions(+), 4 deletions(-)

diff --git a/Software/VNA_embedded/Application/Drivers/Si5351C.cpp b/Software/VNA_embedded/Application/Drivers/Si5351C.cpp
index 58f869d..fa46182 100644
--- a/Software/VNA_embedded/Application/Drivers/Si5351C.cpp
+++ b/Software/VNA_embedded/Application/Drivers/Si5351C.cpp
@@ -175,6 +175,17 @@ bool Si5351C::Locked(PLL pll) {
 	}
 }
 
+bool Si5351C::WaitForLock(PLL pll, uint32_t timeout) {
+	uint32_t start = HAL_GetTick();
+	while(HAL_GetTick() - start <= timeout) {
+		if(Locked(pll)) {
+			return true;
+		}
+	}
+	LOG_WARN("Failed to lock");
+	return false;
+}
+
 bool Si5351C::WritePLLConfig(PLLConfig config, PLL pll) {
 	uint8_t PllData[8];
 	// See register map in https://www.silabs.com/documents/public/application-notes/AN619.pdf (page 11)
@@ -372,4 +383,3 @@ bool Si5351C::ReadRawCLKConfig(uint8_t clknum, uint8_t *config) {
 	auto reg = (Reg) ((int) Reg::MS0_CONFIG + 8 * clknum);
 	return ReadRegisterRange(reg, config, 8);
 }
-
diff --git a/Software/VNA_embedded/Application/Drivers/Si5351C.hpp b/Software/VNA_embedded/Application/Drivers/Si5351C.hpp
index c20a861..62eca24 100644
--- a/Software/VNA_embedded/Application/Drivers/Si5351C.hpp
+++ b/Software/VNA_embedded/Application/Drivers/Si5351C.hpp
@@ -39,6 +39,7 @@ public:
 	bool Enable(uint8_t clknum);
 	bool Disable(uint8_t clknum);
 	bool Locked(PLL pll);
+	bool WaitForLock(PLL pll, uint32_t timeout);
 	bool ResetPLL(PLL pll);
 	bool ExtCLKAvailable();
 
diff --git a/Software/VNA_embedded/Application/Hardware.cpp b/Software/VNA_embedded/Application/Hardware.cpp
index 9f4fa8f..3858b72 100644
--- a/Software/VNA_embedded/Application/Hardware.cpp
+++ b/Software/VNA_embedded/Application/Hardware.cpp
@@ -133,7 +133,9 @@ bool HW::Init() {
 	// PLL reset appears to realign phases of clock signals
 	Si5351.ResetPLL(Si5351C::PLL::B);
 
-	LOG_DEBUG("Si5351 locked");
+	if(Si5351.WaitForLock(Si5351C::PLL::B, 10)) {
+		LOG_DEBUG("Si5351 locked");
+	}
 
 	// FPGA clock is now present, can initialize
 	if (!FPGA::Init(HaltedCallback)) {
diff --git a/Software/VNA_embedded/Application/VNA.cpp b/Software/VNA_embedded/Application/VNA.cpp
index 9b146ea..cb6fe80 100644
--- a/Software/VNA_embedded/Application/VNA.cpp
+++ b/Software/VNA_embedded/Application/VNA.cpp
@@ -135,6 +135,7 @@ bool VNA::Setup(Protocol::SweepSettings s) {
 	Si5351.SetCLK(SiChannel::Port2LO2, last_LO2, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
 	Si5351.SetCLK(SiChannel::RefLO2, last_LO2, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
 	Si5351.ResetPLL(Si5351C::PLL::B);
+	Si5351.WaitForLock(Si5351C::PLL::B, 10);
 
 	IFTableIndexCnt = 0;
 
@@ -269,6 +270,7 @@ bool VNA::Setup(Protocol::SweepSettings s) {
 	// revert clk configuration to previous value (might have been changed in sweep calculation)
 	Si5351.SetCLK(SiChannel::RefLO2, HW::getIF1() - HW::getIF2(), Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
 	Si5351.ResetPLL(Si5351C::PLL::B);
+	Si5351.WaitForLock(Si5351C::PLL::B, 10);
 	// Enable mixers/amplifier/PLLs
 	FPGA::SetWindow(FPGA::Window::Kaiser);
 	FPGA::Enable(FPGA::Periphery::Port1Mixer);
@@ -381,8 +383,9 @@ void VNA::SweepHalted() {
 			Si5351.WriteRawCLKConfig(SiChannel::RefLO2, IFTable[IFTableIndexCnt].clkconfig);
 			Si5351.ResetPLL(Si5351C::PLL::B);
 			IFTableIndexCnt++;
+			Si5351.WaitForLock(Si5351C::PLL::B, 10);
 			// PLL reset causes the 2.LO to turn off briefly and then ramp on back, needs delay before next point
-			Delay::us(1300);
+			Delay::us(1500);
 		}
 		uint64_t frequency = getPointFrequency(pointCnt);
 		int16_t power = settings.cdbm_excitation_start
@@ -408,7 +411,7 @@ void VNA::SweepHalted() {
 			if(lowbandDisabled && freqSuccess) {
 				// frequency is valid, can enable lowband source now
 				Si5351.Enable(SiChannel::LowbandSource);
-				Delay::us(1300);
+				Delay::ms(10);
 				lowbandDisabled = false;
 			}