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https://github.com/jankae/LibreVNA.git
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Protocol adjustment + exposing settings for DFT
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parent
ce475fa042
commit
a2389fca13
19 changed files with 314 additions and 205 deletions
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@ -7,6 +7,7 @@
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#include "VNA.hpp"
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#include "Manual.hpp"
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#include "SpectrumAnalyzer.hpp"
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#include <cstring>
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#define LOG_LEVEL LOG_LEVEL_INFO
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#define LOG_MODULE "HW"
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@ -222,33 +223,39 @@ void HW::SetIdle() {
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FPGA::Enable(FPGA::Periphery::PortSwitch, false);
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}
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void HW::fillDeviceInfo(Protocol::DeviceInfo *info) {
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// read PLL temperatures
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uint8_t tempSource, tempLO;
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GetTemps(&tempSource, &tempLO);
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LOG_INFO("PLL temperatures: %u/%u", tempSource, tempLO);
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// Read ADC min/max
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auto limits = FPGA::GetADCLimits();
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LOG_INFO("ADC limits: P1: %d/%d P2: %d/%d R: %d/%d",
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limits.P1min, limits.P1max, limits.P2min, limits.P2max,
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limits.Rmin, limits.Rmax);
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#define ADC_LIMIT 30000
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if(limits.P1min < -ADC_LIMIT || limits.P1max > ADC_LIMIT
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|| limits.P2min < -ADC_LIMIT || limits.P2max > ADC_LIMIT
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|| limits.Rmin < -ADC_LIMIT || limits.Rmax > ADC_LIMIT) {
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info->ADC_overload = true;
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} else {
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info->ADC_overload = false;
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void HW::fillDeviceInfo(Protocol::DeviceInfo *info, bool updateEvenWhenBusy) {
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// copy constant default values
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memcpy(info, &HW::Info, sizeof(HW::Info));
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if(activeMode == Mode::Idle || updateEvenWhenBusy) {
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// updating values from FPGA allowed
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// read PLL temperatures
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uint8_t tempSource, tempLO;
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GetTemps(&tempSource, &tempLO);
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LOG_INFO("PLL temperatures: %u/%u", tempSource, tempLO);
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// Read ADC min/max
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auto limits = FPGA::GetADCLimits();
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LOG_INFO("ADC limits: P1: %d/%d P2: %d/%d R: %d/%d",
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limits.P1min, limits.P1max, limits.P2min, limits.P2max,
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limits.Rmin, limits.Rmax);
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#define ADC_LIMIT 30000
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if(limits.P1min < -ADC_LIMIT || limits.P1max > ADC_LIMIT
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|| limits.P2min < -ADC_LIMIT || limits.P2max > ADC_LIMIT
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|| limits.Rmin < -ADC_LIMIT || limits.Rmax > ADC_LIMIT) {
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info->ADC_overload = true;
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} else {
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info->ADC_overload = false;
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}
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auto status = FPGA::GetStatus();
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info->LO1_locked = (status & (int) FPGA::Interrupt::LO1Unlock) ? 0 : 1;
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info->source_locked = (status & (int) FPGA::Interrupt::SourceUnlock) ? 0 : 1;
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info->extRefAvailable = Ref::available();
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info->extRefInUse = extRefInUse;
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info->temp_LO1 = tempLO;
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info->temp_source = tempSource;
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FPGA::ResetADCLimits();
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}
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auto status = FPGA::GetStatus();
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info->LO1_locked = (status & (int) FPGA::Interrupt::LO1Unlock) ? 0 : 1;
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info->source_locked = (status & (int) FPGA::Interrupt::SourceUnlock) ? 0 : 1;
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info->extRefAvailable = Ref::available();
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info->extRefInUse = extRefInUse;
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info->temperatures.LO1 = tempLO;
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info->temperatures.source = tempSource;
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info->temperatures.MCU = STM::getTemperature();
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FPGA::ResetADCLimits();
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info->temp_MCU = STM::getTemperature();
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}
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bool HW::Ref::available() {
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