jankae/LibreVNA
1
0
Fork 0
mirror of https://github.com/jankae/LibreVNA.git synced 2026-04-04 14:07:30 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

Renaming packet types, implementing different packet contents per hardware version

Browse source
This commit is contained in:
Jan Käberich 2023-02-20 13:08:31 +01:00
parent 83dbfadf20
commit 9b4865dceb
34 changed files with 2184 additions and 500 deletions
Download patch file Download diff file Expand all files Collapse all files

20
Software/VNA_embedded/Application/App.cpp
View file

@ -129,7 +129,7 @@ inline void App_Process() {
sweepActive = VNA::Setup(recv_packet.settings);
Communication::SendWithoutPayload(Protocol::PacketType::Ack);
break;
case Protocol::PacketType::ManualControlV1:
case Protocol::PacketType::ManualControl:
sweepActive = false;
last_measure_packet = recv_packet;
Manual::Setup(recv_packet.manual);
@ -168,8 +168,8 @@ inline void App_Process() {
case Protocol::PacketType::RequestDeviceStatus: {
Communication::SendWithoutPayload(Protocol::PacketType::Ack);
Protocol::PacketInfo p;
p.type = Protocol::PacketType::DeviceStatusV1;
HW::getDeviceStatus(&p.statusV1);
p.type = Protocol::PacketType::DeviceStatus;
HW::getDeviceStatus(&p.status);
Communication::Send(p);
}
break;
@ -263,19 +263,19 @@ inline void App_Process() {
Cal::setFrequencyCal(recv_packet.frequencyCorrection.ppm);
Communication::SendWithoutPayload(Protocol::PacketType::Ack);
break;
case Protocol::PacketType::RequestAcquisitionFrequencySettings:
case Protocol::PacketType::RequestDeviceConfiguration:
Communication::SendWithoutPayload(Protocol::PacketType::Ack);
{
Protocol::PacketInfo send;
send.type = Protocol::PacketType::AcquisitionFrequencySettings;
send.acquisitionFrequencySettings.IF1 = HW::getIF1();
send.acquisitionFrequencySettings.ADCprescaler = HW::getADCPrescaler();
send.acquisitionFrequencySettings.DFTphaseInc = HW::getDFTPhaseInc();
send.type = Protocol::PacketType::DeviceConfiguration;
send.deviceConfig.V1.IF1 = HW::getIF1();
send.deviceConfig.V1.ADCprescaler = HW::getADCPrescaler();
send.deviceConfig.V1.DFTphaseInc = HW::getDFTPhaseInc();
Communication::Send(send);
}
break;
case Protocol::PacketType::AcquisitionFrequencySettings:
HW::setAcquisitionFrequencies(recv_packet.acquisitionFrequencySettings);
case Protocol::PacketType::DeviceConfiguration:
HW::setAcquisitionFrequencies(recv_packet.deviceConfig);
Communication::SendWithoutPayload(Protocol::PacketType::Ack);
break;
case Protocol::PacketType::SetTrigger:

10
Software/VNA_embedded/Application/Communication/Protocol.cpp
View file

@ -99,9 +99,9 @@ uint16_t Protocol::EncodePacket(const PacketInfo &packet, uint8_t *dest, uint16_
case PacketType::SweepSettings: payload_size = sizeof(packet.settings); break;
case PacketType::Reference: payload_size = sizeof(packet.reference); break;
case PacketType::DeviceInfo: payload_size = sizeof(packet.info); break;
case PacketType::DeviceStatusV1: payload_size = sizeof(packet.statusV1); break;
case PacketType::ManualStatusV1: payload_size = sizeof(packet.manualStatusV1); break;
case PacketType::ManualControlV1: payload_size = sizeof(packet.manual); break;
case PacketType::DeviceStatus: payload_size = sizeof(packet.status); break;
case PacketType::ManualStatus: payload_size = sizeof(packet.manualStatus); break;
case PacketType::ManualControl: payload_size = sizeof(packet.manual); break;
case PacketType::FirmwarePacket: payload_size = sizeof(packet.firmware); break;
case PacketType::Generator: payload_size = sizeof(packet.generator); break;
case PacketType::SpectrumAnalyzerSettings: payload_size = sizeof(packet.spectrumSettings); break;
@ -109,7 +109,7 @@ uint16_t Protocol::EncodePacket(const PacketInfo &packet, uint8_t *dest, uint16_
case PacketType::SourceCalPoint:
case PacketType::ReceiverCalPoint: payload_size = sizeof(packet.amplitudePoint); break;
case PacketType::FrequencyCorrection: payload_size = sizeof(packet.frequencyCorrection); break;
case PacketType::AcquisitionFrequencySettings: payload_size = sizeof(packet.acquisitionFrequencySettings); break;
case PacketType::DeviceConfiguration: payload_size = sizeof(packet.deviceConfig); break;
case PacketType::Ack:
case PacketType::PerformFirmwareUpdate:
case PacketType::ClearFlash:
@ -119,7 +119,7 @@ uint16_t Protocol::EncodePacket(const PacketInfo &packet, uint8_t *dest, uint16_
case PacketType::RequestReceiverCal:
case PacketType::SetIdle:
case PacketType::RequestFrequencyCorrection:
case PacketType::RequestAcquisitionFrequencySettings:
case PacketType::RequestDeviceConfiguration:
case PacketType::RequestDeviceStatus:
case PacketType::SetTrigger:
case PacketType::ClearTrigger:

189
Software/VNA_embedded/Application/Communication/Protocol.hpp
View file

@ -1,6 +1,5 @@
#pragma once
#include <cstdint>
#include <cstring>
#include <limits>
@ -210,62 +209,112 @@ using DeviceInfo = struct _deviceInfo {
uint64_t limits_maxFreqHarmonic;
};
using DeviceStatusV1 = struct _deviceStatusV1 {
uint8_t extRefAvailable:1;
uint8_t extRefInUse:1;
uint8_t FPGA_configured:1;
uint8_t source_locked:1;
uint8_t LO1_locked:1;
uint8_t ADC_overload:1;
uint8_t unlevel:1;
uint8_t temp_source;
uint8_t temp_LO1;
uint8_t temp_MCU;
using DeviceStatus = struct _deviceStatus {
union {
struct {
uint8_t extRefAvailable:1;
uint8_t extRefInUse:1;
uint8_t FPGA_configured:1;
uint8_t source_locked:1;
uint8_t LO1_locked:1;
uint8_t ADC_overload:1;
uint8_t unlevel:1;
uint8_t temp_source;
uint8_t temp_LO1;
uint8_t temp_MCU;
} V1;
struct {
uint8_t source_locked:1;
uint8_t LO_locked:1;
uint8_t ADC_overload:1;
uint8_t unlevel:1;
uint8_t temp_MCU;
} VFF;
};
};
using ManualStatusV1 = struct _manualstatusV1 {
int16_t port1min, port1max;
int16_t port2min, port2max;
int16_t refmin, refmax;
float port1real, port1imag;
float port2real, port2imag;
float refreal, refimag;
uint8_t temp_source;
uint8_t temp_LO;
uint8_t source_locked :1;
uint8_t LO_locked :1;
using ManualStatus = struct _manualstatus {
union {
struct {
int16_t port1min, port1max;
int16_t port2min, port2max;
int16_t refmin, refmax;
float port1real, port1imag;
float port2real, port2imag;
float refreal, refimag;
uint8_t temp_source;
uint8_t temp_LO;
uint8_t source_locked :1;
uint8_t LO_locked :1;
} V1;
struct {
int16_t portmin, portmax;
int16_t refmin, refmax;
float portreal, portimag;
float refreal, refimag;
uint8_t source_locked :1;
uint8_t LO_locked :1;
} VFF;
};
};
using ManualControlV1 = struct _manualControlV1 {
// Highband Source
uint8_t SourceHighCE :1;
uint8_t SourceHighRFEN :1;
uint8_t SourceHighPower :2;
uint8_t SourceHighLowpass :2;
uint64_t SourceHighFrequency;
// Lowband Source
uint8_t SourceLowEN :1;
uint8_t SourceLowPower :2;
uint32_t SourceLowFrequency;
// Source signal path
uint8_t attenuator :7;
uint8_t SourceHighband :1;
uint8_t AmplifierEN :1;
uint8_t PortSwitch :1;
// LO1
uint8_t LO1CE :1;
uint8_t LO1RFEN :1;
uint64_t LO1Frequency;
// LO2
uint8_t LO2EN :1;
uint32_t LO2Frequency;
// Acquisition
uint8_t Port1EN :1;
uint8_t Port2EN :1;
uint8_t RefEN :1;
uint32_t Samples;
uint8_t WindowType :2;
using ManualControl = struct _manualControl {
union {
struct {
// Highband Source
uint8_t SourceHighCE :1;
uint8_t SourceHighRFEN :1;
uint8_t SourceHighPower :2;
uint8_t SourceHighLowpass :2;
uint64_t SourceHighFrequency;
// Lowband Source
uint8_t SourceLowEN :1;
uint8_t SourceLowPower :2;
uint32_t SourceLowFrequency;
// Source signal path
uint8_t attenuator :7;
uint8_t SourceHighband :1;
uint8_t AmplifierEN :1;
uint8_t PortSwitch :1;
// LO1
uint8_t LO1CE :1;
uint8_t LO1RFEN :1;
uint64_t LO1Frequency;
// LO2
uint8_t LO2EN :1;
uint32_t LO2Frequency;
// Acquisition
uint8_t Port1EN :1;
uint8_t Port2EN :1;
uint8_t RefEN :1;
uint32_t Samples;
uint8_t WindowType :2;
} V1;
struct {
// Source
uint8_t SourceCE :1;
uint8_t SourceRFEN :1;
uint8_t SourcePower :3;
uint64_t SourceFrequency;
// Source signal path
uint8_t attenuator :7;
uint8_t SourceAmplifierEN :1;
// LO
uint8_t LOCE :1;
uint8_t LORFEN :1;
uint8_t LOAmplifierEN :1;
uint8_t LOexternal :1;
uint64_t LOFrequency;
// Acquisition
uint8_t PortEN :1;
uint8_t RefEN :1;
uint8_t WindowType :2;
uint8_t PortGain :4;
uint8_t RefGain :4;
uint16_t Samples;
} VFF;
};
};
using SpectrumAnalyzerSettings = struct _spectrumAnalyzerSettings {
@ -327,18 +376,28 @@ using FrequencyCorrection = struct _frequencycorrection {
float ppm;
};
using AcquisitionFrequencySettings = struct _acquisitionfrequencysettigns {
uint32_t IF1;
uint8_t ADCprescaler;
uint16_t DFTphaseInc;
using DeviceConfig = struct _deviceconfig {
union {
struct {
uint32_t IF1;
uint8_t ADCprescaler;
uint16_t DFTphaseInc;
} V1;
struct {
uint32_t ip;
uint32_t mask;
uint32_t gw;
uint8_t dhcp :1;
} VFF;
};
};
enum class PacketType : uint8_t {
None = 0,
//Datapoint = 1, // Deprecated, replaced by VNADatapoint
SweepSettings = 2,
ManualStatusV1 = 3,
ManualControlV1 = 4,
ManualStatus = 3,
ManualControl = 4,
DeviceInfo = 5,
FirmwarePacket = 6,
Ack = 7,
@ -357,9 +416,9 @@ enum class PacketType : uint8_t {
SetIdle = 20,
RequestFrequencyCorrection = 21,
FrequencyCorrection = 22,
RequestAcquisitionFrequencySettings = 23,
AcquisitionFrequencySettings = 24,
DeviceStatusV1 = 25,
RequestDeviceConfiguration = 23,
DeviceConfiguration = 24,
DeviceStatus = 25,
RequestDeviceStatus = 26,
VNADatapoint = 27,
SetTrigger = 28,
@ -376,16 +435,16 @@ using PacketInfo = struct _packetinfo {
SweepSettings settings;
ReferenceSettings reference;
GeneratorSettings generator;
DeviceStatusV1 statusV1;
DeviceStatus status;
DeviceInfo info;
ManualControlV1 manual;
ManualControl manual;
FirmwarePacket firmware;
ManualStatusV1 manualStatusV1;
ManualStatus manualStatus;
SpectrumAnalyzerSettings spectrumSettings;
SpectrumAnalyzerResult spectrumResult;
AmplitudeCorrectionPoint amplitudePoint;
FrequencyCorrection frequencyCorrection;
AcquisitionFrequencySettings acquisitionFrequencySettings;
DeviceConfig deviceConfig;
/*
* When encoding: Pointer may go invalid after call to EncodePacket
* When decoding: VNADatapoint is created on heap by DecodeBuffer, freeing is up to the caller

34
Software/VNA_embedded/Application/Hardware.cpp
View file

@ -322,7 +322,7 @@ void HW::SetOutputUnlevel(bool unlev) {
unlevel = unlev;
}
void HW::getDeviceStatus(Protocol::DeviceStatusV1 *status, bool updateEvenWhenBusy) {
void HW::getDeviceStatus(Protocol::DeviceStatus *status, bool updateEvenWhenBusy) {
if(activeMode == Mode::Idle || updateEvenWhenBusy) {
// updating values from FPGA allowed
@ -339,21 +339,21 @@ void HW::getDeviceStatus(Protocol::DeviceStatusV1 *status, bool updateEvenWhenBu
if(limits.P1min < -ADC_LIMIT || limits.P1max > ADC_LIMIT
|| limits.P2min < -ADC_LIMIT || limits.P2max > ADC_LIMIT
|| limits.Rmin < -ADC_LIMIT || limits.Rmax > ADC_LIMIT) {
status->ADC_overload = true;
status->V1.ADC_overload = true;
} else {
status->ADC_overload = false;
status->V1.ADC_overload = false;
}
auto FPGA_status = FPGA::GetStatus();
status->LO1_locked = (FPGA_status & (int) FPGA::Interrupt::LO1Unlock) ? 0 : 1;
status->source_locked = (FPGA_status & (int) FPGA::Interrupt::SourceUnlock) ? 0 : 1;
status->extRefAvailable = Ref::available();
status->extRefInUse = extRefInUse;
status->unlevel = unlevel;
status->temp_LO1 = tempLO;
status->temp_source = tempSource;
status->V1.LO1_locked = (FPGA_status & (int) FPGA::Interrupt::LO1Unlock) ? 0 : 1;
status->V1.source_locked = (FPGA_status & (int) FPGA::Interrupt::SourceUnlock) ? 0 : 1;
status->V1.extRefAvailable = Ref::available();
status->V1.extRefInUse = extRefInUse;
status->V1.unlevel = unlevel;
status->V1.temp_LO1 = tempLO;
status->V1.temp_source = tempSource;
FPGA::ResetADCLimits();
}
status->temp_MCU = STM::getTemperature();
status->V1.temp_MCU = STM::getTemperature();
}
bool HW::Ref::available() {
@ -413,10 +413,10 @@ void HW::Ref::update() {
}
}
void HW::setAcquisitionFrequencies(Protocol::AcquisitionFrequencySettings s) {
IF1 = s.IF1;
ADCprescaler = s.ADCprescaler;
DFTphaseInc = s.DFTphaseInc;
void HW::setAcquisitionFrequencies(Protocol::DeviceConfig s) {
IF1 = s.V1.IF1;
ADCprescaler = s.V1.ADCprescaler;
DFTphaseInc = s.V1.DFTphaseInc;
float ADCrate = (float) FPGA::Clockrate / ADCprescaler;
IF2 = ADCrate * DFTphaseInc / 4096;
ADCsamplerate = ADCrate;
@ -457,13 +457,13 @@ void HW::updateDeviceStatus() {
last_update = HAL_GetTick();
HW::Ref::update();
Protocol::PacketInfo packet;
packet.type = Protocol::PacketType::DeviceStatusV1;
packet.type = Protocol::PacketType::DeviceStatus;
// Enable PLL chips for temperature reading
bool srcEn = FPGA::IsEnabled(FPGA::Periphery::SourceChip);
bool LOEn = FPGA::IsEnabled(FPGA::Periphery::LO1Chip);
FPGA::Enable(FPGA::Periphery::SourceChip);
FPGA::Enable(FPGA::Periphery::LO1Chip);
HW::getDeviceStatus(&packet.statusV1, true);
HW::getDeviceStatus(&packet.status, true);
// restore PLL state
FPGA::Enable(FPGA::Periphery::SourceChip, srcEn);
FPGA::Enable(FPGA::Periphery::LO1Chip, LOEn);

4
Software/VNA_embedded/Application/Hardware.hpp
View file

@ -119,7 +119,7 @@ using AmplitudeSettings = struct _amplitudeSettings {
AmplitudeSettings GetAmplitudeSettings(int16_t cdbm, uint64_t freq = 0, bool applyCorrections = false, bool port2 = false);
bool GetTemps(uint8_t *source, uint8_t *lo);
void getDeviceStatus(Protocol::DeviceStatusV1 *status, bool updateEvenWhenBusy = false);
void getDeviceStatus(Protocol::DeviceStatus *status, bool updateEvenWhenBusy = false);
namespace Ref {
bool available();
bool usingExternal();
@ -129,7 +129,7 @@ namespace Ref {
}
// Acquisition frequency settings
void setAcquisitionFrequencies(Protocol::AcquisitionFrequencySettings s);
void setAcquisitionFrequencies(Protocol::DeviceConfig s);
uint32_t getIF1();
uint32_t getIF2();
uint32_t getADCRate();

96
Software/VNA_embedded/Application/Manual.cpp
View file

@ -6,37 +6,37 @@
static bool active = false;
static uint32_t samples;
static Protocol::ManualStatusV1 status;
static Protocol::ManualStatus status;
using namespace HWHAL;
void Manual::Setup(Protocol::ManualControlV1 m) {
void Manual::Setup(Protocol::ManualControl m) {
HW::SetMode(HW::Mode::Manual);
samples = m.Samples;
samples = m.V1.Samples;
FPGA::AbortSweep();
// Configure lowband source
if (m.SourceLowEN) {
Si5351.SetCLK(SiChannel::LowbandSource, m.SourceLowFrequency, Si5351C::PLL::B,
(Si5351C::DriveStrength) m.SourceLowPower);
if (m.V1.SourceLowEN) {
Si5351.SetCLK(SiChannel::LowbandSource, m.V1.SourceLowFrequency, Si5351C::PLL::B,
(Si5351C::DriveStrength) m.V1.SourceLowPower);
Si5351.Enable(SiChannel::LowbandSource);
} else {
Si5351.Disable(SiChannel::LowbandSource);
}
// Configure highband source
Source.SetFrequency(m.SourceHighFrequency);
Source.SetPowerOutA((MAX2871::Power) m.SourceHighPower);
Source.SetFrequency(m.V1.SourceHighFrequency);
Source.SetPowerOutA((MAX2871::Power) m.V1.SourceHighPower);
// Configure LO1
LO1.SetFrequency(m.LO1Frequency);
LO1.SetFrequency(m.V1.LO1Frequency);
// Configure LO2
if(m.LO2EN) {
if(m.V1.LO2EN) {
// Generate second LO with Si5351
Si5351.SetCLK(SiChannel::Port1LO2, m.LO2Frequency, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
Si5351.SetCLK(SiChannel::Port1LO2, m.V1.LO2Frequency, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
Si5351.Enable(SiChannel::Port1LO2);
Si5351.SetCLK(SiChannel::Port2LO2, m.LO2Frequency, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
Si5351.SetCLK(SiChannel::Port2LO2, m.V1.LO2Frequency, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
Si5351.Enable(SiChannel::Port2LO2);
Si5351.SetCLK(SiChannel::RefLO2, m.LO2Frequency, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
Si5351.SetCLK(SiChannel::RefLO2, m.V1.LO2Frequency, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
Si5351.Enable(SiChannel::RefLO2);
// PLL reset appears to realign phases of clock signals
@ -50,26 +50,26 @@ void Manual::Setup(Protocol::ManualControlV1 m) {
FPGA::WriteMAX2871Default(Source.GetRegisters());
FPGA::SetNumberOfPoints(1);
FPGA::SetSamplesPerPoint(m.Samples);
FPGA::SetSamplesPerPoint(m.V1.Samples);
// Configure single sweep point
FPGA::WriteSweepConfig(0, !m.SourceHighband, Source.GetRegisters(),
LO1.GetRegisters(), m.attenuator, 0, FPGA::SettlingTime::us60,
FPGA::WriteSweepConfig(0, !m.V1.SourceHighband, Source.GetRegisters(),
LO1.GetRegisters(), m.V1.attenuator, 0, FPGA::SettlingTime::us60,
FPGA::Samples::SPPRegister, 0,
(FPGA::LowpassFilter) m.SourceHighLowpass);
(FPGA::LowpassFilter) m.V1.SourceHighLowpass);
FPGA::SetWindow((FPGA::Window) m.WindowType);
FPGA::SetWindow((FPGA::Window) m.V1.WindowType);
// Enable/Disable periphery
FPGA::Enable(FPGA::Periphery::SourceChip, m.SourceHighCE);
FPGA::Enable(FPGA::Periphery::SourceRF, m.SourceHighRFEN);
FPGA::Enable(FPGA::Periphery::LO1Chip, m.LO1CE);
FPGA::Enable(FPGA::Periphery::LO1RF, m.LO1RFEN);
FPGA::Enable(FPGA::Periphery::Amplifier, m.AmplifierEN);
FPGA::Enable(FPGA::Periphery::Port1Mixer, m.Port1EN);
FPGA::Enable(FPGA::Periphery::Port2Mixer, m.Port2EN);
FPGA::Enable(FPGA::Periphery::RefMixer, m.RefEN);
FPGA::SetupSweep(0, m.PortSwitch == 1, m.PortSwitch == 0);
FPGA::Enable(FPGA::Periphery::SourceChip, m.V1.SourceHighCE);
FPGA::Enable(FPGA::Periphery::SourceRF, m.V1.SourceHighRFEN);
FPGA::Enable(FPGA::Periphery::LO1Chip, m.V1.LO1CE);
FPGA::Enable(FPGA::Periphery::LO1RF, m.V1.LO1RFEN);
FPGA::Enable(FPGA::Periphery::Amplifier, m.V1.AmplifierEN);
FPGA::Enable(FPGA::Periphery::Port1Mixer, m.V1.Port1EN);
FPGA::Enable(FPGA::Periphery::Port2Mixer, m.V1.Port2EN);
FPGA::Enable(FPGA::Periphery::RefMixer, m.V1.RefEN);
FPGA::SetupSweep(0, m.V1.PortSwitch == 1, m.V1.PortSwitch == 0);
FPGA::Enable(FPGA::Periphery::PortSwitch);
// Enable new data and sweep halt interrupt
@ -84,12 +84,12 @@ bool Manual::MeasurementDone(const FPGA::SamplingResult &result) {
return false;
}
// save measurement
status.port1real = (float) result.P1I / samples;
status.port1imag = (float) result.P1Q / samples;
status.port2real = (float) result.P2I / samples;
status.port2imag = (float) result.P2Q / samples;
status.refreal = (float) result.RefI / samples;
status.refimag = (float) result.RefQ / samples;
status.V1.port1real = (float) result.P1I / samples;
status.V1.port1imag = (float) result.P1Q / samples;
status.V1.port2real = (float) result.P2I / samples;
status.V1.port2imag = (float) result.P2Q / samples;
status.V1.refreal = (float) result.RefI / samples;
status.V1.refimag = (float) result.RefQ / samples;
return true;
}
@ -99,39 +99,39 @@ void Manual::Work() {
return;
}
Protocol::PacketInfo p;
p.type = Protocol::PacketType::ManualStatusV1;
p.manualStatusV1 = status;
p.type = Protocol::PacketType::ManualStatus;
p.manualStatus = status;
uint16_t isr_flags = FPGA::GetStatus();
if (!(isr_flags & 0x0002)) {
p.manualStatusV1.source_locked = 1;
p.manualStatus.V1.source_locked = 1;
} else {
p.manualStatusV1.source_locked = 0;
p.manualStatus.V1.source_locked = 0;
}
if (!(isr_flags & 0x0001)) {
p.manualStatusV1.LO_locked = 1;
p.manualStatus.V1.LO_locked = 1;
} else {
p.manualStatusV1.LO_locked = 0;
p.manualStatus.V1.LO_locked = 0;
}
auto limits = FPGA::GetADCLimits();
FPGA::ResetADCLimits();
p.manualStatusV1.port1min = limits.P1min;
p.manualStatusV1.port1max = limits.P1max;
p.manualStatusV1.port2min = limits.P2min;
p.manualStatusV1.port2max = limits.P2max;
p.manualStatusV1.refmin = limits.Rmin;
p.manualStatusV1.refmax = limits.Rmax;
HW::GetTemps(&p.manualStatusV1.temp_source, &p.manualStatusV1.temp_LO);
p.manualStatus.V1.port1min = limits.P1min;
p.manualStatus.V1.port1max = limits.P1max;
p.manualStatus.V1.port2min = limits.P2min;
p.manualStatus.V1.port2max = limits.P2max;
p.manualStatus.V1.refmin = limits.Rmin;
p.manualStatus.V1.refmax = limits.Rmax;
HW::GetTemps(&p.manualStatus.V1.temp_source, &p.manualStatus.V1.temp_LO);
Communication::Send(p);
HW::Ref::update();
if(HW::getStatusUpdateFlag()) {
Protocol::PacketInfo packet;
packet.type = Protocol::PacketType::DeviceStatusV1;
packet.type = Protocol::PacketType::DeviceStatus;
// Enable PLL chips for temperature reading
bool srcEn = FPGA::IsEnabled(FPGA::Periphery::SourceChip);
bool LOEn = FPGA::IsEnabled(FPGA::Periphery::LO1Chip);
FPGA::Enable(FPGA::Periphery::SourceChip);
FPGA::Enable(FPGA::Periphery::LO1Chip);
HW::getDeviceStatus(&packet.statusV1, true);
HW::getDeviceStatus(&packet.status, true);
// restore PLL state
FPGA::Enable(FPGA::Periphery::SourceChip, srcEn);
FPGA::Enable(FPGA::Periphery::LO1Chip, LOEn);

2
Software/VNA_embedded/Application/Manual.hpp
View file

@ -5,7 +5,7 @@
namespace Manual {
void Setup(Protocol::ManualControlV1 m);
void Setup(Protocol::ManualControl m);
bool MeasurementDone(const FPGA::SamplingResult &result);
void Work();
void Stop();

4
Software/VNA_embedded/Application/SpectrumAnalyzer.cpp
View file

@ -432,8 +432,8 @@ void SA::Work() {
// send device info every nth point
FPGA::Enable(FPGA::Periphery::SourceChip); // needs to enable the chip to get a valid temperature reading
Protocol::PacketInfo packet;
packet.type = Protocol::PacketType::DeviceStatusV1;
HW::getDeviceStatus(&packet.statusV1, true);
packet.type = Protocol::PacketType::DeviceStatus;
HW::getDeviceStatus(&packet.status, true);
FPGA::Disable(FPGA::Periphery::SourceChip);
Communication::Send(packet);
}

4
Software/VNA_embedded/Application/VNA.cpp
View file

@ -351,9 +351,9 @@ void VNA::Work() {
}
// Compile info packet
Protocol::PacketInfo packet;
packet.type = Protocol::PacketType::DeviceStatusV1;
packet.type = Protocol::PacketType::DeviceStatus;
if(HW::getStatusUpdateFlag()) {
HW::getDeviceStatus(&packet.statusV1, true);
HW::getDeviceStatus(&packet.status, true);
Communication::Send(packet);
}
// do not reset unlevel flag here, as it is calculated only once at the setup of the sweep