Bugfixes and speed improvements

This commit is contained in:
Jan Käberich 2020-09-26 23:34:31 +02:00
parent 199535450d
commit 926392e5b9
37 changed files with 873 additions and 566 deletions

View file

@ -48,7 +48,7 @@ static void ReadComplete(FPGA::SamplingResult result) {
break;
}
if(needs_work && requestWork) {
requestWork();
STM::DispatchToInterrupt(requestWork);
}
}
@ -120,8 +120,8 @@ bool HW::Init(WorkRequest wr) {
}
// Set default ADC samplerate
FPGA::WriteRegister(FPGA::Reg::ADCPrescaler, 112);
FPGA::WriteRegister(FPGA::Reg::PhaseIncrement, 1120);
FPGA::WriteRegister(FPGA::Reg::ADCPrescaler, 128);
FPGA::WriteRegister(FPGA::Reg::PhaseIncrement, 1280);
// Enable new data and sweep halt interrupt
FPGA::EnableInterrupt(FPGA::Interrupt::NewData);