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WIP: synchronization

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This commit is contained in:
Jan Käberich 2022-08-08 18:08:40 +02:00
parent 7b3aa6e158
commit 73e26a25c4
41 changed files with 439 additions and 163 deletions
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3
Software/VNA_embedded/Application/Drivers/FPGA/FPGA.cpp
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@ -130,7 +130,7 @@ void FPGA::SetSamplesPerPoint(uint32_t nsamples) {
WriteRegister(Reg::SamplesPerPoint, nsamples);
}
void FPGA::SetupSweep(uint8_t stages, uint8_t port1_stage, uint8_t port2_stage, bool synchronize) {
void FPGA::SetupSweep(uint8_t stages, uint8_t port1_stage, uint8_t port2_stage, bool synchronize, bool syncMaster) {
uint16_t value = 0x0000;
value |= (uint16_t) (stages & 0x07) << 13;
if(synchronize) {
@ -139,6 +139,7 @@ void FPGA::SetupSweep(uint8_t stages, uint8_t port1_stage, uint8_t port2_stage,
value |= (port1_stage & 0x07) << 3;
value |= (port2_stage & 0x07) << 0;
WriteRegister(Reg::SweepSetup, value);
Enable(Periphery::SyncMaster, syncMaster);
}
void FPGA::Enable(Periphery p, bool enable) {

4
Software/VNA_embedded/Application/Drivers/FPGA/FPGA.hpp
View file

@ -61,7 +61,7 @@ enum class Periphery {
DebugLED = 0x0080,
SourceChip = 0x0010,
LO1Chip = 0x0008,
SyncMaster = 0x0002,
PortSwitch = 0x0001,
};
@ -114,7 +114,7 @@ bool Init(HaltedCallback cb = nullptr);
void WriteRegister(FPGA::Reg reg, uint16_t value);
void SetNumberOfPoints(uint16_t npoints);
void SetSamplesPerPoint(uint32_t nsamples);
void SetupSweep(uint8_t stages, uint8_t port1_stage, uint8_t port2_stage, bool synchronize = false);
void SetupSweep(uint8_t stages, uint8_t port1_stage, uint8_t port2_stage, bool synchronize = false, bool syncMaster = false);
void Enable(Periphery p, bool enable = true);
void Disable(Periphery p);
bool IsEnabled(Periphery p);