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https://github.com/jankae/LibreVNA.git
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Tracking generator with offset + incomplete automatic source/receiver calibration
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parent
026fffd588
commit
5b771e2a86
18 changed files with 517 additions and 51 deletions
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@ -32,6 +32,9 @@ static float port1Measurement[FPGA::DFTbins], port2Measurement[FPGA::DFTbins];
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static uint8_t signalIDsteps;
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static std::array<uint8_t, 4> signalIDprescalers;
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static uint8_t attenuator;
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static int64_t trackingFreq;
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static bool trackingLowband;
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static void StartNextSample() {
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uint64_t freq = s.f_start + (s.f_stop - s.f_start) * pointCnt / (points - 1);
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@ -50,6 +53,34 @@ static void StartNextSample() {
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FPGA::WriteRegister(FPGA::Reg::ADCPrescaler, 112);
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FPGA::WriteRegister(FPGA::Reg::PhaseIncrement, 1120);
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negativeDFT = true;
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// set tracking generator to default values
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trackingFreq = 0;
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trackingLowband = false;
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attenuator = 0;
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// this is the first step in each point, update tracking generator if enabled
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if (s.trackingGenerator) {
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trackingFreq = freq - s.trackingGeneratorOffset;
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if(trackingFreq > 0 && trackingFreq <= (int64_t) HW::Info.limits_maxFreq) {
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// tracking frequency is valid, calculate required settings and select band
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auto amplitude = HW::GetAmplitudeSettings(s.trackingPower, trackingFreq, s.applySourceCorrection, s.trackingGeneratorPort);
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attenuator = amplitude.attenuator;
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if(trackingFreq < HW::BandSwitchFrequency) {
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Si5351.SetCLK(SiChannel::LowbandSource, trackingFreq, Si5351C::PLL::B, amplitude.lowBandPower);
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FPGA::Disable(FPGA::Periphery::SourceChip);
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FPGA::Disable(FPGA::Periphery::SourceRF);
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trackingLowband = true;
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} else {
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Source.SetFrequency(trackingFreq);
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Source.SetPowerOutA(amplitude.highBandPower, true);
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FPGA::Enable(FPGA::Periphery::SourceChip);
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FPGA::Enable(FPGA::Periphery::SourceRF);
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trackingLowband = false;
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// selected power potentially changed, update default registers
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FPGA::WriteMAX2871Default(Source.GetRegisters());
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}
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}
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}
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break;
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case 1:
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LO2freq = HW::IF1 - HW::IF2;
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@ -121,9 +152,9 @@ static void StartNextSample() {
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}
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// Configure the sampling in the FPGA
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FPGA::WriteSweepConfig(0, 0, Source.GetRegisters(), LO1.GetRegisters(), 0,
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0, FPGA::SettlingTime::us20, FPGA::Samples::SPPRegister, 0,
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FPGA::LowpassFilter::M947);
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FPGA::WriteSweepConfig(0, trackingLowband, Source.GetRegisters(), LO1.GetRegisters(), attenuator,
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trackingFreq, FPGA::SettlingTime::us20, FPGA::Samples::SPPRegister, 0,
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FPGA::LowpassFilter::Auto);
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FPGA::StartSweep();
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}
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@ -162,10 +193,18 @@ void SA::Setup(Protocol::SpectrumAnalyzerSettings settings) {
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// enable the required hardware resources
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Si5351.Enable(SiChannel::Port1LO2);
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Si5351.Enable(SiChannel::Port2LO2);
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if (s.trackingGenerator) {
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Si5351.Enable(SiChannel::LowbandSource);
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} else {
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Si5351.Disable(SiChannel::LowbandSource);
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}
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FPGA::SetWindow((FPGA::Window) s.WindowType);
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FPGA::Enable(FPGA::Periphery::LO1Chip);
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FPGA::Enable(FPGA::Periphery::LO1RF);
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FPGA::Enable(FPGA::Periphery::ExcitePort1);
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FPGA::Enable(FPGA::Periphery::ExcitePort1, s.trackingGeneratorPort == 0);
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FPGA::Enable(FPGA::Periphery::ExcitePort2, s.trackingGeneratorPort == 1);
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FPGA::Enable(FPGA::Periphery::PortSwitch, s.trackingGenerator);
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FPGA::Enable(FPGA::Periphery::Amplifier, s.trackingGenerator);
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FPGA::Enable(FPGA::Periphery::Port1Mixer);
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FPGA::Enable(FPGA::Periphery::Port2Mixer);
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