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mitigation for peaks caused by limited fractional divider in PLLs
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fc3ce7a828
commit
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23 changed files with 654 additions and 274 deletions
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@ -18,6 +18,7 @@ static uint32_t sampleNum;
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static Protocol::PacketInfo p;
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static bool active = false;
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static uint32_t lastLO2;
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static uint32_t actualRBW;
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static float port1Measurement, port2Measurement;
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@ -40,20 +41,42 @@ static void StartNextSample() {
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FPGA::WriteRegister(FPGA::Reg::PhaseIncrement, 1120);
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break;
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case 1:
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// Shift first LO to other side
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LO1freq = freq - HW::IF1;
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LO2freq = HW::IF1 - HW::IF2;
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break;
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// Shift first LO to other side
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// depending on the measurement frequency this is not possible or additive mixing has to be used
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if(freq >= HW::IF1 + HW::LO1_minFreq) {
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// frequency is high enough to shift 1.LO below measurement frequency
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LO1freq = freq - HW::IF1;
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break;
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} else if(freq <= HW::IF1 - HW::LO1_minFreq) {
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// frequency is low enough to add 1.LO to measurement frequency
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LO1freq = HW::IF1 - freq;
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break;
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}
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// unable to reach required frequency with 1.LO, skip this signal ID step
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signalIDstep++;
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/* no break */
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case 2:
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// Shift both LOs to other side
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LO1freq = freq + HW::IF1;
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LO2freq = HW::IF1 + HW::IF2;
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break;
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case 3:
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// Shift second LO to other side
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LO1freq = freq - HW::IF1;
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LO2freq = HW::IF1 + HW::IF2;
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break;
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// Shift second LO to other side
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// depending on the measurement frequency this is not possible or additive mixing has to be used
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if(freq >= HW::IF1 + HW::LO1_minFreq) {
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// frequency is high enough to shift 1.LO below measurement frequency
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LO1freq = freq - HW::IF1;
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break;
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} else if(freq <= HW::IF1 - HW::LO1_minFreq) {
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// frequency is low enough to add 1.LO to measurement frequency
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LO1freq = HW::IF1 - freq;
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break;
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}
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// unable to reach required frequency with 1.LO, skip this signal ID step
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signalIDstep++;
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/* no break */
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case 4:
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// Use default frequencies with different ADC samplerate to remove images in final IF
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LO1freq = freq + HW::IF1;
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@ -66,7 +89,7 @@ static void StartNextSample() {
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int32_t LO1deviation = (int64_t) LO1.GetActualFrequency() - LO1freq;
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LO2freq += LO1deviation;
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// only adjust LO2 PLL if necessary (if the deviation is significantly less than the RBW it does not matter)
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if((uint32_t) abs(LO2freq - lastLO2) > s.RBW / 2) {
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if((uint32_t) abs(LO2freq - lastLO2) > actualRBW / 2) {
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Si5351.SetCLK(SiChannel::Port1LO2, LO2freq, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
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Si5351.SetCLK(SiChannel::Port2LO2, LO2freq, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
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lastLO2 = LO2freq;
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@ -88,19 +111,23 @@ void SA::Setup(Protocol::SpectrumAnalyzerSettings settings) {
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// in almost all cases a full sweep requires more points than the FPGA can handle at a time
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// individually start each point and do the sweep in the uC
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FPGA::SetNumberOfPoints(1);
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// calculate amount of required points
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points = 2 * (s.f_stop - s.f_start) / s.RBW;
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// adjust to integer multiple of requested result points (in order to have the same amount of measurements in each bin)
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points += s.pointNum - points % s.pointNum;
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binSize = points / s.pointNum;
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LOG_DEBUG("%u displayed points, resulting in %lu points and bins of size %u", s.pointNum, points, binSize);
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// calculate required samples per measurement for requested RBW
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// see https://www.tek.com/blog/window-functions-spectrum-analyzers for window factors
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constexpr float window_factors[4] = {0.89f, 2.23f, 1.44f, 3.77f};
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sampleNum = HW::ADCSamplerate * window_factors[s.WindowType] / s.RBW;
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// round up to next multiple of 128
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sampleNum += 128 - sampleNum%128;
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if(sampleNum >= HW::MaxSamples) {
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sampleNum = HW::MaxSamples;
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}
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actualRBW = HW::ADCSamplerate * window_factors[s.WindowType] / sampleNum;
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FPGA::SetSamplesPerPoint(sampleNum);
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// calculate amount of required points
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points = 2 * (s.f_stop - s.f_start) / actualRBW;
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// adjust to integer multiple of requested result points (in order to have the same amount of measurements in each bin)
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points += s.pointNum - points % s.pointNum;
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binSize = points / s.pointNum;
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LOG_DEBUG("%u displayed points, resulting in %lu points and bins of size %u", s.pointNum, points, binSize);
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// set initial state
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pointCnt = 0;
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// enable the required hardware resources
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