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mitigation for peaks caused by limited fractional divider in PLLs

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This commit is contained in:
Jan Käberich 2020-09-20 10:13:06 +02:00
parent fc3ce7a828
commit 57b4ebfb26
23 changed files with 654 additions and 274 deletions
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2
Software/VNA_embedded/Application/Communication/Protocol.cpp
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@ -176,6 +176,7 @@ static Protocol::SweepSettings DecodeSweepSettings(uint8_t *buf) {
e.get<int16_t>(d.cdbm_excitation);
d.excitePort1 = e.getBits(1);
d.excitePort2 = e.getBits(1);
d.suppressPeaks = e.getBits(1);
return d;
}
static int16_t EncodeSweepSettings(Protocol::SweepSettings d, uint8_t *buf,
@ -188,6 +189,7 @@ static int16_t EncodeSweepSettings(Protocol::SweepSettings d, uint8_t *buf,
e.add<int16_t>(d.cdbm_excitation);
e.addBits(d.excitePort1, 1);
e.addBits(d.excitePort2, 1);
e.addBits(d.suppressPeaks, 1);
return e.getSize();
}