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force PLL turn on when assembling device status in VNA mode

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This commit is contained in:
Jan Käberich 2025-04-23 16:18:26 +02:00
parent 8a30f95aa7
commit 4f63a28b61
3 changed files with 11 additions and 2 deletions
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8
Software/VNA_embedded/Application/Drivers/FPGA/FPGA.cpp
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@ -331,15 +331,19 @@ void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi) {
}
}
void FPGA::StartSweep() {
void FPGA::StopSweep() {
Low(AUX3);
}
void FPGA::StartSweep() {
StopSweep();
Delay::us(1);
High(AUX3);
}
void FPGA::AbortSweep() {
// abort any FPGA operation by pulling sweep pin low
Low(AUX3);
StopSweep();
// data transfer of a datapoint might still be active, abort
HAL_SPI_DMAStop(&FPGA_SPI);
busy_reading = false;

1
Software/VNA_embedded/Application/Drivers/FPGA/FPGA.hpp
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@ -135,6 +135,7 @@ uint16_t GetStatus();
void OverwriteHardware(uint8_t attenuation, LowpassFilter filter, bool lowband, bool port1_enabled, bool port2_enabled);
void DisableHardwareOverwrite();
void StopSweep();
void StartSweep();
void AbortSweep();