diff --git a/Documentation/DeveloperInfo/.gitignore b/Documentation/DeveloperInfo/.gitignore
new file mode 100644
index 0000000..faeefb6
--- /dev/null
+++ b/Documentation/DeveloperInfo/.gitignore
@@ -0,0 +1,4 @@
+RFBlockdiagram.pdf
+DigitalBlockdiagram.pdf
+PowerBlockdiagram.pdf
+
diff --git a/Documentation/DeveloperInfo/DigitalBlockdiagram.pdf b/Documentation/DeveloperInfo/DigitalBlockdiagram.pdf
index 9ceb8ea..b67a330 100644
Binary files a/Documentation/DeveloperInfo/DigitalBlockdiagram.pdf and b/Documentation/DeveloperInfo/DigitalBlockdiagram.pdf differ
diff --git a/Documentation/DeveloperInfo/DigitalBlockdiagram.svg b/Documentation/DeveloperInfo/DigitalBlockdiagram.svg
new file mode 100644
index 0000000..5657bf8
--- /dev/null
+++ b/Documentation/DeveloperInfo/DigitalBlockdiagram.svg
@@ -0,0 +1,752 @@
+
+
diff --git a/Documentation/DeveloperInfo/PowerBlockdiagram.pdf b/Documentation/DeveloperInfo/PowerBlockdiagram.pdf
index ef9cce6..dda4dd2 100644
Binary files a/Documentation/DeveloperInfo/PowerBlockdiagram.pdf and b/Documentation/DeveloperInfo/PowerBlockdiagram.pdf differ
diff --git a/Documentation/DeveloperInfo/PowerBlockdiagram.svg b/Documentation/DeveloperInfo/PowerBlockdiagram.svg
new file mode 100644
index 0000000..b7386a4
--- /dev/null
+++ b/Documentation/DeveloperInfo/PowerBlockdiagram.svg
@@ -0,0 +1,977 @@
+
+
diff --git a/Documentation/DeveloperInfo/RFBlockdiagram.pdf b/Documentation/DeveloperInfo/RFBlockdiagram.pdf
index 798ba10..2393ccc 100644
Binary files a/Documentation/DeveloperInfo/RFBlockdiagram.pdf and b/Documentation/DeveloperInfo/RFBlockdiagram.pdf differ
diff --git a/Documentation/DeveloperInfo/RFBlockdiagram.svg b/Documentation/DeveloperInfo/RFBlockdiagram.svg
new file mode 100644
index 0000000..4f6c460
--- /dev/null
+++ b/Documentation/DeveloperInfo/RFBlockdiagram.svg
@@ -0,0 +1,1181 @@
+
+
diff --git a/Documentation/DeveloperInfo/RFBlockdiagram.tex b/Documentation/DeveloperInfo/RFBlockdiagram.tex
index b5226dc..ea2cf52 100644
--- a/Documentation/DeveloperInfo/RFBlockdiagram.tex
+++ b/Documentation/DeveloperInfo/RFBlockdiagram.tex
@@ -240,7 +240,7 @@ RLBinv/.style ={rectangle, draw, semithick, minimum height=25mm, minimum width=3
\draw (swfiltout.in) -- ++(0.5,0)
node[rotary switch <->=2 in 30 wiper -30, anchor=out 2, xscale = -1](bandselect){};
\node[above right=0.2cm and 0.3cm, rotate=90,font=\footnotesize] at (bandselect){QPC6324};
-\draw (Si5351.east)++(0,0.5)-|++(1,2)-|(bandselect.out 1) node[midway,above, anchor=south east,font=\footnotesize]{\SIrange{1}{25}{\mega\hertz}} ;
+\draw (Si5351.east)++(0,0.5)-|++(1,2) to[lowpass, l=\SI{40}{\mega\hertz}, font=\footnotesize] ++(4,0) -|(bandselect.out 1) node[midway,above, anchor=south east,font=\footnotesize]{\SIrange{1}{25}{\mega\hertz}} ;
%Attenuation and amplifier and splitter
\draw (bandselect.in) to[vpiattenuator,label={RFSA3714}, font=\footnotesize] ++(2,0) to[amp, font=\footnotesize, label={TRF37A73},n=amp]++(2,0) node[splitter, label={},anchor=west](s){};
@@ -265,17 +265,21 @@ RLBinv/.style ={rectangle, draw, semithick, minimum height=25mm, minimum width=3
\node[mixer, box,left = 3cm of mix11](mix12){};
\node[anchor=south, font=\footnotesize] at (mix12.north){LT5560};
-\draw(mix12.west)++(-1,0) to[lowpass, l_=\SI{300}{\kilo\hertz}, font=\footnotesize]++(-1,0);
+\draw(mix12.west)++(-2.5,0) to[lowpass, l_=\SI{300}{\kilo\hertz}, font=\footnotesize, n=lowpass1]++(-1,0);
\draw[-latex]([yshift=-2mm]mix12.west)--++(-1,0);
\draw[-latex]([yshift=2mm]mix12.west)--++(-1,0);
\draw[latex-]([yshift=-2mm]mix12.east)--++(1,0);
\draw[latex-]([yshift=2mm]mix12.east)--++(1,0);
-\node[dADC,left=4cm of mix12,xscale=-1] (ADC1) {};
+\draw(mix12.west)++(-1,0) to[amp, l_={THS4521}, font=\footnotesize, n=amp1]++(-1,0);
+
+\node[dADC,left=5.5cm of mix12,xscale=-1] (ADC1) {};
\node[font=\footnotesize] at (ADC1){ADC};
\node[anchor=south, font=\footnotesize] at (ADC1.north){MCP33131D-10};
-\draw[latex-](ADC1.in1)--([xshift=-2cm]ADC1.in1-|mix12.west);
-\draw[latex-](ADC1.in2)--([xshift=-2cm]ADC1.in2-|mix12.west);
+\draw[latex-](ADC1.in1)--(ADC1.in1-|lowpass1.east);
+\draw[latex-](ADC1.in2)--(ADC1.in2-|lowpass1.east);
+\draw[latex-](ADC1.in1-|lowpass1.west)--([xshift=0.3cm]ADC1.in1-|amp1.east);
+\draw[latex-](ADC1.in2-|lowpass1.west)--([xshift=0.3cm]ADC1.in2-|amp1.east);
% Reference signal flow
\node[mixer, box,below left = 9cm and 5cm of rlb1.ret c] (mixr1){};
@@ -286,17 +290,21 @@ RLBinv/.style ={rectangle, draw, semithick, minimum height=25mm, minimum width=3
\node[mixer, box,left = 3cm of mixr1](mixr2){};
\node[anchor=south, font=\footnotesize] at (mixr2.north){LT5560};
-\draw(mixr2.west)++(-1,0) to[lowpass, l_=\SI{300}{\kilo\hertz}, font=\footnotesize]++(-1,0);
+\draw(mixr2.west)++(-2.5,0) to[lowpass, l_=\SI{300}{\kilo\hertz}, font=\footnotesize, n=lowpass2]++(-1,0);
\draw[-latex]([yshift=-2mm]mixr2.west)--++(-1,0);
\draw[-latex]([yshift=2mm]mixr2.west)--++(-1,0);
\draw[latex-]([yshift=-2mm]mixr2.east)--++(1,0);
\draw[latex-]([yshift=2mm]mixr2.east)--++(1,0);
-\node[dADC,left=4cm of mixr2,xscale=-1] (ADC1) {};
+\draw(mixr2.west)++(-1,0) to[amp, l_={THS4521}, font=\footnotesize, n=amp2]++(-1,0);
+
+\node[dADC,left=5.5cm of mixr2,xscale=-1] (ADC1) {};
\node[font=\footnotesize] at (ADC1){ADC};
\node[anchor=south, font=\footnotesize] at (ADC1.north){MCP33131D-10};
-\draw[latex-](ADC1.in1)--([xshift=-2cm]ADC1.in1-|mixr2.west);
-\draw[latex-](ADC1.in2)--([xshift=-2cm]ADC1.in2-|mixr2.west);
+\draw[latex-](ADC1.in1)--(ADC1.in1-|lowpass2.east);
+\draw[latex-](ADC1.in2)--(ADC1.in2-|lowpass2.east);
+\draw[latex-](ADC1.in1-|lowpass2.west)--([xshift=0.3cm]ADC1.in1-|amp2.east);
+\draw[latex-](ADC1.in2-|lowpass2.west)--([xshift=0.3cm]ADC1.in2-|amp2.east);
\draw[-latex] (s.out B)--++(0.25,0)|-(mixr1.east);
@@ -313,22 +321,26 @@ RLBinv/.style ={rectangle, draw, semithick, minimum height=25mm, minimum width=3
\node[mixer, box,left = 3cm of mix21](mix22){};
\node[anchor=north, font=\footnotesize] at (mix22.south){LT5560};
-\draw(mix22.west)++(-1,0) to[lowpass, l=\SI{300}{\kilo\hertz}, font=\footnotesize]++(-1,0);
+\draw(mix22.west)++(-2.5,0) to[lowpass, l=\SI{300}{\kilo\hertz}, font=\footnotesize,n=lowpass3]++(-1,0);
\draw[-latex]([yshift=-2mm]mix22.west)--++(-1,0);
\draw[-latex]([yshift=2mm]mix22.west)--++(-1,0);
\draw[latex-]([yshift=-2mm]mix22.east)--++(1,0);
\draw[latex-]([yshift=2mm]mix22.east)--++(1,0);
-\node[dADC,left=4cm of mix22,xscale=-1] (ADC1) {};
+\draw(mix22.west)++(-1,0) to[amp, l={THS4521}, font=\footnotesize, n=amp3]++(-1,0);
+
+\node[dADC,left=5.5cm of mix22,xscale=-1] (ADC1) {};
\node[font=\footnotesize] at (ADC1){ADC};
\node[anchor=north, font=\footnotesize] at (ADC1.south){MCP33131D-10};
-\draw[latex-](ADC1.in1)--([xshift=-2cm]ADC1.in1-|mix22.west);
-\draw[latex-](ADC1.in2)--([xshift=-2cm]ADC1.in2-|mix22.west);
+\draw[latex-](ADC1.in1)--(ADC1.in1-|lowpass3.east);
+\draw[latex-](ADC1.in2)--(ADC1.in2-|lowpass3.east);
+\draw[latex-](ADC1.in1-|lowpass3.west)--([xshift=0.3cm]ADC1.in1-|amp3.east);
+\draw[latex-](ADC1.in2-|lowpass3.west)--([xshift=0.3cm]ADC1.in2-|amp3.east);
%LO1
\node[synthesizer={MAX2871},label={[align=center]1.LO}] (lo1) at (1,-3) {};
\draw[-latex] (Si5351.east)++(0,-0.5) --++(1,0) |- (lo1.west) node[midway,above,rotate=90,font=\footnotesize]{\SI{100}{\mega\hertz}} ;
-\draw[-latex] (lo1.east)--++(1,0) |- ([yshift=-1cm]mixr1.south) coordinate(lo1split) to[short,*-](mixr1.south);
+\draw[-latex] (lo1.east)--++(0.5,0) |- ([yshift=-1cm]mixr1.south) coordinate(lo1split) to[short,*-](mixr1.south);
\draw[-latex] (lo1split)--(mix21.north);
\draw[-latex] (lo1split)-|(mix11.south);
@@ -337,64 +349,5 @@ RLBinv/.style ={rectangle, draw, semithick, minimum height=25mm, minimum width=3
\draw[-latex] (Si5351.east)++(0,-0.8) --++(0.5,0) |- ([yshift=-3cm]mixr2.south) coordinate(lo2split) to[short,*-](mixr2.south);
\draw[-latex] (lo2split)--(mix22.north);
-%\path (0,0) node[](synth) {} to[vco=\SI{-3}{\decibel},label={[align=center]Resistive\\splitter}]node[above=0.5cm](){\SI{250}{\mega\hertz} to \SI{2.1}{\giga\hertz}} (0,0);
-%\path (2,0) node[](){} to[box]node(div){}(3,0);
-%\divider{div}
-%\draw[-latex] (synth)++(0.5,0)--++(1.57,0);
-%% I/Q mixer
-%\draw (4,1) node[mixer](mixeri){};
-%\draw (6,-1) node[mixer](mixerq){};
-%\draw[-latex] (div)++(0,12pt)|-(mixeri.west);
-%\draw[-latex] (div)++(0,-12pt)|-(mixerq.west);
-%\draw (7,0) node[adder](add){};
-%\draw[-latex] (mixeri.east)-|(add.north);
-%\draw[-latex] (mixerq.east)-|(add.south);
-%% I/Q DAC + filters
-%\draw (4,-4.5) to[dac, n=daci] (4,-3.5);
-%\draw[-latex] (4,-3) to[lowpass, n=lpfi] (4,-2) -- (mixeri.south);
-%\node[rotate=90] at (3.3,-2.5) {\SI{50}{\mega\hertz}};
-%\draw[-latex] (daci)++(0,0.5)--++(0,0.5);
-%\draw (6,-4.5) to[dac, n=dacq] (6,-3.5);
-%\draw[-latex] (6,-3) to[lowpass, n=lpfq] (6,-2) -- (mixerq.south);
-%\node[rotate=90] at (5.3,-2.5) {\SI{50}{\mega\hertz}};
-%\draw[-latex] (dacq)++(0,0.5)--++(0,0.5);
-%
-%% rotary switches and filter bank
-%\draw (add.east) -- ++(0.5,0)
-% node[rotary switch <->=6 in 60 wiper 60, anchor=in](swfiltin){};
-%\draw (14.5,0) -- ++(-0.5,0)
-% node[rotary switch <->=6 in 60 wiper 60, anchor=in, xscale = -1](swfiltout){};
-%
-%\draw (swfiltin.out 1) -| (9, 3) -- (10,3) to[lowpass, l=\SI{340}{\mega\hertz}] ++(2,0) -- ++(1,0) |- (swfiltout.out 1);
-%\draw (swfiltin.out 2) -| (9.5, 1.5) -- (10,1.5) to[lowpass, l=\SI{500}{\mega\hertz}] ++(2,0) -- ++(0.5,0) |- (swfiltout.out 2);
-%\draw (swfiltin.out 3) -| (10, 0) -- (10,0) to[lowpass, l=\SI{750}{\mega\hertz}] ++(2,0) -- ++(0,0) |- (swfiltout.out 3);
-%\draw (swfiltin.out 4) -| (9.5, -1.5) -- (10,-1.5) to[lowpass, l=\SI{1.1}{\giga\hertz}] ++(2,0) -- ++(0.5,0) |- (swfiltout.out 4);
-%\draw (swfiltin.out 5) -| (9, -3) -- (10,-3) to[lowpass, l=\SI{1.7}{\giga\hertz}] ++(2,0) -- ++(1,0) |- (swfiltout.out 5);
-%\draw (swfiltin.out 6) -| (8.5, -4.5) -- (10,-4.5) to[lowpass, l=\SI{2.5}{\giga\hertz}] ++(2,0) -- ++(1.5,0) |- (swfiltout.out 6);
-%
-%\node[spdt](switchin) at (17,0) {};
-%\node[spdt, xscale=-1](switchout) at (23,0) {};
-%\draw (swfiltout.in) to[vpiattenuator] (switchin.in);
-%\draw (switchin.out 1)--(switchout.out 1);
-%\draw (switchin.out 2)++(1,0) node[mixer](mixhet){};
-%\draw[-latex] (switchin.out 2)--(mixhet.west);
-%\draw (mixhet.east) to[amp] ++(2,0) to[lowpass, l_=\SI{250}{\mega\hertz}] (switchout.out 2);
-%\path (mixhet)++(0,-2) to[vco]node[below=0.5cm](){\SI{1}{\giga\hertz}} ++(0,0);
-%\draw[latex-] (mixhet.south)--++(0,-1);
-%
-%\node[splitter,label={[align=center]Resistive\\splitter}] (s) at (29,0) {};
-%\draw (switchout.in) to[vpiattenuator] ++(1.5,0) to[amp] ++(1.5,0) to[amp] (s.west);
-%\node[align=center] at (24.3,1) {\SIrange{0}{-45}{\decibel}\\in \SI{15}{\decibel} steps} ;
-%
-%\draw (15.2,-4.5) to[dac, n=daclvl] (15.2,-3.5);
-%\draw[-latex] (15.2,-3.5) to (15.2,-0.5);
-%
-%%\node[op amp, xscale=-1, yscale=-1](levelctrl) at (21,-3.5) {};
-%\draw[-latex] (s.out B) -| ++(0.5,-1) to[detector] ++(0,-2.13);
-%\draw (30.26,-4.5) to[adc, n=adc] (30.26,-3.5);
-%
-%%\draw (levelctrl.-)node[right]{Output amplitude setpoint};
-%%\draw[-latex, dashed] (levelctrl.out) -| (15.2,-0.5);
-%\draw[-o] (s.out A)--++(0.5,0)node[right]{Output};
\end{circuitikz}
\end{document}
diff --git a/Documentation/FAQ.md b/Documentation/FAQ.md
new file mode 100644
index 0000000..ba9d297
--- /dev/null
+++ b/Documentation/FAQ.md
@@ -0,0 +1,22 @@
+# FAQ
+
+### Can I buy one?
+No, not at the moment. So far this is just a private hobby project.
+
+### Can I build one?
+Absolutely. All required files are available and if you are not afraid to solder a lot of small components you can certainly build your own. The total BOM cost (without the aluminium shielding) is about 200€ when only buying parts for one PCB.
+
+There are some [basic instructions](DeveloperInfo/BuildAndFlash.md) to help get started on the software side.
+
+### Why is the final IF so high?
+I am using 250kHz as the final IF frequency. Compared to some other VNA projects this is rather high and requires a fast (more expensive) ADC. However, it also makes the sweep rate faster: each measurement point takes at least one IF period (more if noise should be reduced to practical levels).
+
+### Why the FPGA?
+Why not sample the ADCs directly with (a more powerful) STM32? Or even use the ADC on the µC itself?
+* I wanted more than the 12bits provided with by internal STM32 ADCs (and also better SNR)
+* Sampling the three 16bit 1MSamples/s ADCs with an STM might be possible but certainly would be a challenge
+* More flexibility with the FPGA controlling all critical RF components (e.g. setting up all PLLs concurrently for each measurement point, further increasing sweep rate)
+* Enough power for future features (e.g. spectrum analyzer mode with FFT)
+
+### If there has to be an FPGA, why one with a closed-source toolchain?
+* Sorry, thats just what I had experience with (also, the toolchain is free, just not open-source)
diff --git a/Documentation/Pictures/.gitignore b/Documentation/Pictures/.gitignore
new file mode 100644
index 0000000..e0c8af3
--- /dev/null
+++ b/Documentation/Pictures/.gitignore
@@ -0,0 +1,2 @@
+*.xcf
+
diff --git a/Documentation/Pictures/IMG_5449.jpg b/Documentation/Pictures/IMG_5449.jpg
new file mode 100644
index 0000000..e4b893c
Binary files /dev/null and b/Documentation/Pictures/IMG_5449.jpg differ
diff --git a/README.md b/README.md
index bb14754..9a8c6e7 100644
--- a/README.md
+++ b/README.md
@@ -3,8 +3,50 @@
This is the improved version of my [first attempt](https://www.github.com/jankae/VNA) at a VNA.
+
+
Main differences to first version:
* Exchanged some RF chips for slightly cheaper versions with similar specifications
* Power supply scheme changed to use 5V instead of 12V, potentially allowing the device to be powered from USB
* FPGA gets configured from the microcontroller, removing the need for a JTAG programmer. This also allows firmware updates of both the FPGA and the microcontroller through the USB port
* RF sections distributed differently on PCB to increase isolation between ports
+
+### Preliminary specifications
+* Frequency range: 1MHz to 6GHz (with reduced performance also below 1MHz)
+* Dynamic range (S12/S21):
+ * below 3GHz: 80-90db
+ * above 3GHz: 50-60db
+* Sweep rate: up to 10k points/second (each point includes measurement of all four S-parameters)
+
+There are also some initial [example measurements](Documentation/Measurements).
+
+## How does it work?
+The PCB is really only the RF frontend with some processing power. Everything else is handled in the PC application once the data is transferred via USB. You can try out the application without the PCB (obviously no measurements are possible, but you can import provided example measurements and get an idea about what it can and can't do). Either [build it yourself](Documentation/DeveloperInfo/BuildAndFlash.md) or use a pre-built binary (only Windows/Ubuntu at the moment). Feel free to create issues (or even better pull-requests) if you find any bugs. An (incomplete) [manual](Documentation/UserManual/manual.pdf) is available.
+### RF path:
+
+
+* The main clock source is an Si5351C, providing all the required clocks for the different blocks. It also serves as the stimulus source for frequencies below 25MHz. Its own reference clock is either a 26MHz crystal or an external 10MHz signal.
+* The stimulus source for frequencies above 25MHz is a MAX2871. Its output signal is slightly filtered to reduce the amount of harmonics.
+* The stimulus signal power can be adjusted between approximately -42 and -10dbm with a digital attenuator (RFSA3714).
+* After the amplifier(TRF37A73) the signal is split and the weaker part of it fed into the reference receiver.
+* The stronger part of the signal can be routed to either port. In each signal path, two RF switches are used in series to achieve higher isolation between the ports.
+* Instead of directional couplers, resistive return-loss-bridges are used (easier to implement for wide bandwidth).
+* Both ports have completely separated receive paths. This increases BOM cost but allows measuring two parameters at once (S11 and S21 or S22 and S12). It also avoids potential isolation issues that could arise if the receive paths would merge into a single mixer/ADC.
+* Each receiver consists of two down-convert mixers. The 1.IF sits at 60MHz, the 2.IF 250kHz.
+* The ADCs are sampling the final IF with 16bit@800kHz.
+
+### Digital section:
+
+
+* The central element is the Spartan6 FPGA. It handles all communication with the RF blocks and samples the ADCs. This allows for nearly instant switching of the measurement frequency, only limited by the settling time of the PLLs.
+* The microcontroller handles the setup of the sweep in the FPGA, extracts and preprocesses the measurements and passes them on through USB.
+* The flash contains the FPGA bitstream. Because the microcontroller has access to the flash, no FPGA-related hardware tools (such as JTAG programmers) are needed, everything can be updated via USB.
+
+### Power supply:
+
+
+* Everything is powered from USB (or optionally by external 5V DC)
+* Almost every RF block has its own local regulater, preventing noise and signals coupling into the supply lines from propagating across the whole PCB
+
+## Want to know more?
+Check out the [FAQ](Documentation/FAQ.md) or write me a mail.