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embedded code copied from jankae/VNA and adjusted for STM32G4

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Jan Käberich 2020-08-24 19:06:50 +02:00
parent 7af204b349
commit 30d4ebe37b
215 changed files with 186208 additions and 0 deletions
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168
Software/VNA_embedded/Application/App.cpp Normal file
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#include <VNA.hpp>
#include "App.h"
#include "delay.hpp"
#include "Communication.h"
#include "main.h"
#include "Exti.hpp"
#include "FPGA.hpp"
#include <complex>
#include <cstring>
#include "USB/usb.h"
#define LOG_LEVEL LOG_LEVEL_INFO
#define LOG_MODULE "App"
#include "Log.h"
static volatile bool newResult;
static Protocol::Datapoint result;
static volatile bool newSettings = false;
static Protocol::SweepSettings settings;
static volatile bool newStatus = false;
static FPGA::SamplingResult statusResult;
static volatile bool newManual = false;
static Protocol::ManualControl manual;
// TODO set proper values
#define HW_REVISION 'A'
#define FW_MAJOR 0
#define FW_MINOR 01
void VNACallback(Protocol::Datapoint res) {
result = res;
newResult = true;
}
void VNAStatusCallback(FPGA::SamplingResult res) {
statusResult = res;
newStatus = true;
}
void App_Start() {
usb_init(communication_usb_input);
Log_Init();
// Pass on logging output to USB
Log_SetRedirect(usb_log);
LOG_INFO("Start");
Exti::Init();
if (!VNA::Init()) {
LOG_CRIT("Initialization failed, unable to start");
return;
}
// Allow USB enumeration
// USB_EN_GPIO_Port->BSRR = USB_EN_Pin;
uint32_t lastNewPoint = HAL_GetTick();
bool sweepActive = false;
while (1) {
if (newResult) {
Protocol::PacketInfo packet;
packet.type = Protocol::PacketType::Datapoint;
packet.datapoint = result;
Communication::Send(packet);
newResult = false;
lastNewPoint = HAL_GetTick();
if(result.pointNum == settings.points - 1) {
// end of sweep
// read PLL temperatures
uint8_t tempSource, tempLO;
VNA::GetTemps(&tempSource, &tempLO);
LOG_INFO("PLL temperatures: %u/%u", tempSource, tempLO);
// Read ADC min/max
auto limits = FPGA::GetADCLimits();
#define ADC_LIMIT 30000
// Compile info packet
packet.type = Protocol::PacketType::DeviceInfo;
packet.info.FPGA_configured = 1;
if(limits.P1min < -ADC_LIMIT || limits.P1max > ADC_LIMIT
|| limits.P2min < -ADC_LIMIT || limits.P2max > ADC_LIMIT
|| limits.Rmin < -ADC_LIMIT || limits.Rmax > ADC_LIMIT) {
packet.info.ADC_overload = true;
} else {
packet.info.ADC_overload = false;
}
packet.info.FW_major = FW_MAJOR;
packet.info.FW_minor = FW_MINOR;
packet.info.HW_Revision = HW_REVISION;
auto status = FPGA::GetStatus();
packet.info.LO1_locked = (status & (int) FPGA::Interrupt::LO1Unlock) ? 0 : 1;
packet.info.source_locked = (status & (int) FPGA::Interrupt::SourceUnlock) ? 0 : 1;
packet.info.extRefAvailable = 0;
packet.info.extRefInUse = 0;
packet.info.temperatures.LO1 = tempLO;
packet.info.temperatures.source = tempSource;
packet.info.temperatures.MCU = 0;
Communication::Send(packet);
FPGA::ResetADCLimits();
LOG_INFO("ADC limits: P1: %d/%d P2: %d/%d R: %d/%d",
limits.P1min, limits.P1max, limits.P2min, limits.P2max,
limits.Rmin, limits.Rmax);
// Start next sweep
FPGA::StartSweep();
}
}
if (newSettings) {
LOG_INFO("New settings received");
newSettings = false;
VNA::ConfigureSweep(settings, VNACallback);
sweepActive = true;
lastNewPoint = HAL_GetTick();
}
if(sweepActive && HAL_GetTick() - lastNewPoint > 1000) {
LOG_WARN("Timed out waiting for point, last received point was %d", result.pointNum);
LOG_WARN("FPGA status: 0x%04x", FPGA::GetStatus());
// restart the current sweep
VNA::ConfigureSweep(settings, VNACallback);
sweepActive = true;
lastNewPoint = HAL_GetTick();
}
if (newManual) {
LOG_INFO("New manual control");
sweepActive = false;
newManual = false;
VNA::ConfigureManual(manual, VNAStatusCallback);
}
if (newStatus) {
newStatus = false;
Protocol::PacketInfo p;
p.type = Protocol::PacketType::Status;
memset(&p.status, 0, sizeof(p.status));
uint16_t isr_flags = FPGA::GetStatus();
if (!(isr_flags & 0x0002)) {
p.status.source_locked = 1;
}
if (!(isr_flags & 0x0001)) {
p.status.LO_locked = 1;
}
auto limits = FPGA::GetADCLimits();
FPGA::ResetADCLimits();
p.status.port1min = limits.P1min;
p.status.port1max = limits.P1max;
p.status.port2min = limits.P2min;
p.status.port2max = limits.P2max;
p.status.refmin = limits.Rmin;
p.status.refmax = limits.Rmax;
p.status.port1real = (float) statusResult.P1I / manual.Samples;
p.status.port1imag = (float) statusResult.P1Q / manual.Samples;
p.status.port2real = (float) statusResult.P2I / manual.Samples;
p.status.port2imag = (float) statusResult.P2Q / manual.Samples;
p.status.refreal = (float) statusResult.RefI / manual.Samples;
p.status.refimag = (float) statusResult.RefQ / manual.Samples;
VNA::GetTemps(&p.status.temp_source, &p.status.temp_LO);
Communication::Send(p);
// Trigger next status update
FPGA::StartSweep();
}
}
}
void App::NewSettings(Protocol::SweepSettings s) {
settings = s;
newSettings = true;
}
void App::SetManual(Protocol::ManualControl m) {
manual = m;
newManual = true;
}

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Software/VNA_embedded/Application/App.h Normal file
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#pragma once
#ifdef __cplusplus
#include "Protocol.hpp"
namespace App {
void NewSettings(Protocol::SweepSettings s);
void SetManual(Protocol::ManualControl m);
}
extern "C" {
#endif
void App_Start();
#ifdef __cplusplus
}
#endif

65
Software/VNA_embedded/Application/Communication/Communication.cpp Normal file
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#include <Communication.h>
#include "stm.hpp"
#include "../App.h"
#include <string.h>
#include "USB/usb.h"
static uint8_t inputBuffer[1024];
uint16_t inputCnt = 0;
static uint8_t outputBuffer[1024];
//#include "usbd_def.h"
//#include "usbd_cdc_if.h"
//extern USBD_HandleTypeDef hUsbDeviceFS;
void Communication::Input(const uint8_t *buf, uint16_t len) {
if (inputCnt + len < sizeof(inputBuffer)) {
// add received data to input buffer
memcpy(&inputBuffer[inputCnt], buf, len);
inputCnt += len;
}
Protocol::PacketInfo packet;
uint16_t handled_len;
do {
handled_len = Protocol::DecodeBuffer(inputBuffer, inputCnt, &packet);
if (handled_len == inputCnt) {
// complete input buffer used up, reset counter
inputCnt = 0;
} else {
// only used part of the buffer, move up remaining bytes
uint16_t remaining = inputCnt - handled_len;
memmove(inputBuffer, &inputBuffer[handled_len], remaining);
inputCnt = remaining;
}
switch(packet.type) {
case Protocol::PacketType::SweepSettings:
App::NewSettings(packet.settings);
break;
case Protocol::PacketType::ManualControl:
App::SetManual(packet.manual);
break;
}
} while (handled_len > 0);
}
bool Communication::Send(Protocol::PacketInfo packet) {
uint16_t len = Protocol::EncodePacket(packet, outputBuffer,
sizeof(outputBuffer));
return usb_transmit(outputBuffer, len);
// if (hUsbDeviceFS.dev_state == USBD_STATE_CONFIGURED) {
// uint16_t len = Protocol::EncodePacket(packet, outputBuffer,
// sizeof(outputBuffer));
// while (CDC_Transmit_FS(outputBuffer, len) != USBD_OK)
// ;
// return true;
// } else {
// // not connected, do not attempt to send
// return false;
// }
}
void communication_usb_input(const uint8_t *buf, uint16_t len) {
Communication::Input(buf, len);
}

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Software/VNA_embedded/Application/Communication/Communication.h Normal file
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#pragma once
#include <stdint.h>
#ifdef __cplusplus
#include "Protocol.hpp"
namespace Communication {
void Input(const uint8_t *buf, uint16_t len);
bool Send(Protocol::PacketInfo packet);
}
extern "C" {
#endif
void communication_usb_input(const uint8_t *buf, uint16_t len);
#ifdef __cplusplus
}
#endif

422
Software/VNA_embedded/Application/Communication/Protocol.cpp Normal file
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#include "Protocol.hpp"
#include <cstring>
/*
* General packet format:
* 1. 1 byte header
* 2. 2 byte overall packet length (with header and checksum)
* 3. packet type
* 4. packet payload
* 5. 4 byte CRC32 (with header)
*/
static constexpr uint8_t header = 0x5A;
static constexpr uint8_t header_size = 4;
#define CRC32_POLYGON 0xEDB88320
uint32_t CRC32(uint32_t crc, const void *data, uint32_t len) {
uint8_t *u8buf = (uint8_t*) data;
int k;
crc = ~crc;
while (len--) {
crc ^= *u8buf++;
for (k = 0; k < 8; k++)
crc = crc & 1 ? (crc >> 1) ^ CRC32_POLYGON : crc >> 1;
}
return ~crc;
}
class Encoder {
public:
Encoder(uint8_t *buf, uint16_t size) :
buf(buf),
bufSize(size),
usedSize(0),
bitpos(0) {
memset(buf, 0, size);
};
template<typename T> bool add(T data) {
if(bitpos != 0) {
// add padding to next byte boundary
bitpos = 0;
usedSize++;
}
if(bufSize - usedSize < (long) sizeof(T)) {
// not enough space left
return false;
}
memcpy(&buf[usedSize], &data, sizeof(T));
usedSize += sizeof(T);
return true;
}
bool addBits(uint8_t value, uint8_t bits) {
if(bits >= 8 || usedSize >= bufSize) {
return false;
}
buf[usedSize] |= (value << bitpos) & 0xFF;
bitpos += bits;
if(bitpos > 8) {
// the value did not fit completely into the current byte
if(usedSize >= bufSize - 1) {
// already at maximum limit, not enough space for remaining bits
return false;
}
// move access to next byte
bitpos -= 8;
usedSize++;
// add remaining bytes
buf[usedSize] = value >> (bits - bitpos);
} else if(bitpos == 8) {
bitpos = 0;
usedSize++;
}
return true;
}
uint16_t getSize() const {
if(bitpos == 0) {
return usedSize;
} else {
return usedSize + 1;
}
};
private:
uint8_t *buf;
uint16_t bufSize;
uint16_t usedSize;
uint8_t bitpos;
};
class Decoder {
public:
Decoder(uint8_t *buf) :
buf(buf),
usedSize(0),
bitpos(0) {};
template<typename T> void get(T &t) {
if(bitpos != 0) {
// add padding to next byte boundary
bitpos = 0;
usedSize++;
}
// still enough bytes available
memcpy(&t, &buf[usedSize], sizeof(T));
usedSize += sizeof(T);
}
uint8_t getBits(uint8_t bits) {
if(bits >= 8) {
return 0;
}
uint8_t mask = 0x00;
for(uint8_t i=0;i<bits;i++) {
mask <<= 1;
mask |= 0x01;
}
uint8_t value = (buf[usedSize] >> bitpos) & mask;
bitpos += bits;
if(bitpos > 8) {
// the current byte did not contain the complete value
// move access to next byte
bitpos -= 8;
usedSize++;
// get remaining bits
value |= (buf[usedSize] << (bits - bitpos)) & mask;
} else if(bitpos == 8) {
bitpos = 0;
usedSize++;
}
return value;
}
private:
uint8_t *buf;
uint16_t usedSize;
uint8_t bitpos;
};
static Protocol::Datapoint DecodeDatapoint(uint8_t *buf) {
Protocol::Datapoint d;
Decoder e(buf);
e.get<float>(d.real_S11);
e.get<float>(d.imag_S11);
e.get<float>(d.real_S21);
e.get<float>(d.imag_S21);
e.get<float>(d.real_S12);
e.get<float>(d.imag_S12);
e.get<float>(d.real_S22);
e.get<float>(d.imag_S22);
e.get<uint64_t>(d.frequency);
e.get<uint16_t>(d.pointNum);
return d;
}
static uint16_t EncodeDatapoint(Protocol::Datapoint d, uint8_t *buf,
uint16_t bufSize) {
Encoder e(buf, bufSize);
e.add<float>(d.real_S11);
e.add<float>(d.imag_S11);
e.add<float>(d.real_S21);
e.add<float>(d.imag_S21);
e.add<float>(d.real_S12);
e.add<float>(d.imag_S12);
e.add<float>(d.real_S22);
e.add<float>(d.imag_S22);
e.add<uint64_t>(d.frequency);
e.add<uint16_t>(d.pointNum);
return e.getSize();
}
static Protocol::SweepSettings DecodeSweepSettings(uint8_t *buf) {
Protocol::SweepSettings d;
Decoder e(buf);
e.get<uint64_t>(d.f_start);
e.get<uint64_t>(d.f_stop);
e.get<uint16_t>(d.points);
e.get<uint32_t>(d.if_bandwidth);
e.get<int16_t>(d.cdbm_excitation);
return d;
}
static uint16_t EncodeSweepSettings(Protocol::SweepSettings d, uint8_t *buf,
uint16_t bufSize) {
Encoder e(buf, bufSize);
e.add<uint64_t>(d.f_start);
e.add<uint64_t>(d.f_stop);
e.add<uint16_t>(d.points);
e.add<uint32_t>(d.if_bandwidth);
e.add<int16_t>(d.cdbm_excitation);
return e.getSize();
}
static Protocol::DeviceInfo DecodeDeviceInfo(uint8_t *buf) {
Protocol::DeviceInfo d;
Decoder e(buf);
e.get<uint16_t>(d.FW_major);
e.get<uint16_t>(d.FW_minor);
e.get<char>(d.HW_Revision);
d.extRefAvailable = e.getBits(1);
d.extRefInUse = e.getBits(1);
d.FPGA_configured = e.getBits(1);
d.source_locked = e.getBits(1);
d.LO1_locked = e.getBits(1);
d.ADC_overload = e.getBits(1);
e.get<uint8_t>(d.temperatures.source);
e.get<uint8_t>(d.temperatures.LO1);
e.get<uint8_t>(d.temperatures.MCU);
return d;
}
static uint16_t EncodeDeviceInfo(Protocol::DeviceInfo d, uint8_t *buf,
uint16_t bufSize) {
Encoder e(buf, bufSize);
e.add<uint16_t>(d.FW_major);
e.add<uint16_t>(d.FW_minor);
e.add<char>(d.HW_Revision);
e.addBits(d.extRefAvailable, 1);
e.addBits(d.extRefInUse, 1);
e.addBits(d.FPGA_configured, 1);
e.addBits(d.source_locked, 1);
e.addBits(d.LO1_locked, 1);
e.addBits(d.ADC_overload, 1);
e.add<uint8_t>(d.temperatures.source);
e.add<uint8_t>(d.temperatures.LO1);
e.add<uint8_t>(d.temperatures.MCU);
return e.getSize();
}
static Protocol::ManualStatus DecodeStatus(uint8_t *buf) {
Protocol::ManualStatus d;
Decoder e(buf);
e.get<int16_t>(d.port1min);
e.get<int16_t>(d.port1max);
e.get<int16_t>(d.port2min);
e.get<int16_t>(d.port2max);
e.get<int16_t>(d.refmin);
e.get<int16_t>(d.refmax);
e.get<float>(d.port1real);
e.get<float>(d.port1imag);
e.get<float>(d.port2real);
e.get<float>(d.port2imag);
e.get<float>(d.refreal);
e.get<float>(d.refimag);
e.get<uint8_t>(d.temp_source);
e.get<uint8_t>(d.temp_LO);
d.source_locked = e.getBits( 1);
d.LO_locked = e.getBits(1);
return d;
}
static uint16_t EncodeStatus(Protocol::ManualStatus d, uint8_t *buf,
uint16_t bufSize) {
Encoder e(buf, bufSize);
e.add<int16_t>(d.port1min);
e.add<int16_t>(d.port1max);
e.add<int16_t>(d.port2min);
e.add<int16_t>(d.port2max);
e.add<int16_t>(d.refmin);
e.add<int16_t>(d.refmax);
e.add<float>(d.port1real);
e.add<float>(d.port1imag);
e.add<float>(d.port2real);
e.add<float>(d.port2imag);
e.add<float>(d.refreal);
e.add<float>(d.refimag);
e.add<uint8_t>(d.temp_source);
e.add<uint8_t>(d.temp_LO);
e.addBits(d.source_locked, 1);
e.addBits(d.LO_locked, 1);
return e.getSize();
}
static Protocol::ManualControl DecodeManualControl(uint8_t *buf) {
Protocol::ManualControl d;
Decoder e(buf);
d.SourceHighCE = e.getBits(1);
d.SourceHighRFEN = e.getBits(1);
d.SourceHighPower = e.getBits(2);
d.SourceHighLowpass = e.getBits(2);
e.get<uint64_t>(d.SourceHighFrequency);
d.SourceLowEN = e.getBits(1);
d.SourceLowPower = e.getBits( 2);
e.get<uint32_t>(d.SourceLowFrequency);
d.attenuator = e.getBits(7);
d.SourceHighband = e.getBits(1);
d.AmplifierEN = e.getBits(1);
d.PortSwitch = e.getBits(1);
d.LO1CE = e.getBits(1);
d.LO1RFEN = e.getBits(1);
e.get<uint64_t>(d.LO1Frequency);
d.LO2EN = e.getBits(1);
e.get<uint32_t>(d.LO2Frequency);
d.Port1EN = e.getBits(1);
d.Port2EN = e.getBits(1);
d.RefEN = e.getBits(1);
e.get<uint32_t>(d.Samples);
return d;
}
static uint16_t EncodeManualControl(Protocol::ManualControl d, uint8_t *buf,
uint16_t bufSize) {
Encoder e(buf, bufSize);
e.addBits(d.SourceHighCE, 1);
e.addBits(d.SourceHighRFEN, 1);
e.addBits(d.SourceHighPower, 2);
e.addBits(d.SourceHighLowpass, 2);
e.add<uint64_t>(d.SourceHighFrequency);
e.addBits(d.SourceLowEN, 1);
e.addBits(d.SourceLowPower, 2);
e.add<uint32_t>(d.SourceLowFrequency);
e.addBits(d.attenuator, 7);
e.addBits(d.SourceHighband, 1);
e.addBits(d.AmplifierEN, 1);
e.addBits(d.PortSwitch, 1);
e.addBits(d.LO1CE, 1);
e.addBits(d.LO1RFEN, 1);
e.add<uint64_t>(d.LO1Frequency);
e.addBits(d.LO2EN, 1);
e.add<uint32_t>(d.LO2Frequency);
e.addBits(d.Port1EN, 1);
e.addBits(d.Port2EN, 1);
e.addBits(d.RefEN, 1);
e.add<uint32_t>(d.Samples);
return e.getSize();
}
uint16_t Protocol::DecodeBuffer(uint8_t *buf, uint16_t len, PacketInfo *info) {
if (!info || !len) {
info->type = PacketType::None;
return 0;
}
uint8_t *data = buf;
/* Remove any out-of-order bytes in front of the frame */
while (*data != header) {
data++;
if(--len == 0) {
/* Reached end of data */
/* No frame contained in data */
info->type = PacketType::None;
return data - buf;
}
}
/* At this point, data points to the beginning of the frame */
if(len < header_size) {
/* the frame header has not been completely received */
info->type = PacketType::None;
return data - buf;
}
/* Evaluate frame size */
uint16_t length = *(uint16_t*) &data[1];
if(len < length) {
/* The frame payload has not been completely received */
info->type = PacketType::None;
return data - buf;
}
/* The complete frame has been received, check checksum */
uint32_t crc = *(uint32_t*) &data[length - 4];
uint32_t compare = CRC32(0, data, length - 4);
if(crc != compare) {
// CRC mismatch, remove header
data += 1;
info->type = PacketType::None;
return data - buf;
}
// Valid packet, extract packet info
info->type = (PacketType) data[3];
switch (info->type) {
case PacketType::Datapoint:
info->datapoint = DecodeDatapoint(&data[4]);
break;
case PacketType::SweepSettings:
info->settings = DecodeSweepSettings(&data[4]);
break;
case PacketType::DeviceInfo:
info->info = DecodeDeviceInfo(&data[4]);
break;
case PacketType::Status:
info->status = DecodeStatus(&data[4]);
break;
case PacketType::ManualControl:
info->manual = DecodeManualControl(&data[4]);
break;
case PacketType::None:
break;
}
return data - buf + length;
}
uint16_t Protocol::EncodePacket(PacketInfo packet, uint8_t *dest, uint16_t destsize) {
uint16_t payload_size = 0;
switch (packet.type) {
case PacketType::Datapoint:
payload_size = EncodeDatapoint(packet.datapoint, &dest[4], destsize - 8);
break;
case PacketType::SweepSettings:
payload_size = EncodeSweepSettings(packet.settings, &dest[4], destsize - 8);
break;
case PacketType::DeviceInfo:
payload_size = EncodeDeviceInfo(packet.info, &dest[4], destsize - 8);
break;
case PacketType::Status:
payload_size = EncodeStatus(packet.status, &dest[4], destsize - 8);
break;
case PacketType::ManualControl:
payload_size = EncodeManualControl(packet.manual, &dest[4], destsize - 8);
break;
case PacketType::None:
break;
}
if (payload_size == 0 || payload_size + 8 > destsize) {
// encoding failed, buffer too small
return 0;
}
// Write header
dest[0] = header;
uint16_t overall_size = payload_size + 8;
memcpy(&dest[1], &overall_size, 2);
dest[3] = (int) packet.type;
// Calculate checksum
uint32_t crc = CRC32(0, dest, overall_size - 4);
memcpy(&dest[overall_size - 4], &crc, 4);
return overall_size;
}

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#pragma once
#include <cstdint>
namespace Protocol {
// When changing/adding/removing variables from these structs also adjust the decode/encode functions in Protocol.cpp
using Datapoint = struct _datapoint {
float real_S11, imag_S11;
float real_S21, imag_S21;
float real_S12, imag_S12;
float real_S22, imag_S22;
uint64_t frequency;
uint16_t pointNum;
};
using SweepSettings = struct _sweepSettings {
uint64_t f_start;
uint64_t f_stop;
uint16_t points;
uint32_t if_bandwidth;
int16_t cdbm_excitation; // in 1/100 dbm
};
using DeviceInfo = struct _deviceInfo {
uint16_t FW_major;
uint16_t FW_minor;
char HW_Revision;
uint8_t extRefAvailable:1;
uint8_t extRefInUse:1;
uint8_t FPGA_configured:1;
uint8_t source_locked:1;
uint8_t LO1_locked:1;
uint8_t ADC_overload:1;
struct {
uint8_t source;
uint8_t LO1;
uint8_t MCU;
} temperatures;
};
using ManualStatus = struct _manualstatus {
int16_t port1min, port1max;
int16_t port2min, port2max;
int16_t refmin, refmax;
float port1real, port1imag;
float port2real, port2imag;
float refreal, refimag;
uint8_t temp_source;
uint8_t temp_LO;
uint8_t source_locked :1;
uint8_t LO_locked :1;
};
using ManualControl = struct _manualControl {
// Highband Source
uint8_t SourceHighCE :1;
uint8_t SourceHighRFEN :1;
uint8_t SourceHighPower :2;
uint8_t SourceHighLowpass :2;
uint64_t SourceHighFrequency;
// Lowband Source
uint8_t SourceLowEN :1;
uint8_t SourceLowPower :2;
uint32_t SourceLowFrequency;
// Source signal path
uint8_t attenuator :7;
uint8_t SourceHighband :1;
uint8_t AmplifierEN :1;
uint8_t PortSwitch :1;
// LO1
uint8_t LO1CE :1;
uint8_t LO1RFEN :1;
uint64_t LO1Frequency;
// LO2
uint8_t LO2EN :1;
uint32_t LO2Frequency;
// Acquisition
uint8_t Port1EN :1;
uint8_t Port2EN :1;
uint8_t RefEN :1;
uint32_t Samples;
};
enum class PacketType : uint8_t {
None,
Datapoint,
SweepSettings,
Status,
ManualControl,
DeviceInfo,
};
using PacketInfo = struct _packetinfo {
PacketType type;
union {
Datapoint datapoint;
SweepSettings settings;
DeviceInfo info;
ManualControl manual;
ManualStatus status;
};
};
uint16_t DecodeBuffer(uint8_t *buf, uint16_t len, PacketInfo *info);
uint16_t EncodePacket(PacketInfo packet, uint8_t *dest, uint16_t destsize);
}

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#include "Exti.hpp"
using Entry = struct {
GPIO_TypeDef *gpio;
Exti::Callback cb;
void *ptr;
};
static constexpr uint8_t MaxEntries = 16;
static Entry entries[MaxEntries];
void Exti::Init() {
HAL_NVIC_SetPriority(EXTI0_IRQn, 1, 0);
HAL_NVIC_SetPriority(EXTI1_IRQn, 1, 0);
HAL_NVIC_SetPriority(EXTI2_IRQn, 1, 0);
HAL_NVIC_SetPriority(EXTI3_IRQn, 1, 0);
HAL_NVIC_SetPriority(EXTI4_IRQn, 1, 0);
HAL_NVIC_SetPriority(EXTI9_5_IRQn, 1, 0);
HAL_NVIC_SetPriority(EXTI15_10_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(EXTI0_IRQn);
HAL_NVIC_EnableIRQ(EXTI1_IRQn);
HAL_NVIC_EnableIRQ(EXTI2_IRQn);
HAL_NVIC_EnableIRQ(EXTI3_IRQn);
HAL_NVIC_EnableIRQ(EXTI4_IRQn);
HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
HAL_NVIC_EnableIRQ(EXTI15_10_IRQn);
for (uint8_t i = 0; i < MaxEntries; i++) {
entries[i].gpio = NULL;
entries[i].cb = NULL;
entries[i].ptr = NULL;
}
}
bool Exti::SetCallback(GPIO_TypeDef *gpio, uint16_t pin, EdgeType edge,
Pull pull, Callback cb, void *ptr) {
uint8_t index = 31 - __builtin_clz(pin);
if (entries[index].gpio && entries[index].gpio != gpio) {
return false;
}
GPIO_InitTypeDef g;
g.Pin = pin;
switch (edge) {
case EdgeType::Falling:
g.Mode = GPIO_MODE_IT_FALLING;
break;
case EdgeType::Rising:
g.Mode = GPIO_MODE_IT_RISING;
break;
case EdgeType::Both:
g.Mode = GPIO_MODE_IT_RISING_FALLING;
break;
}
switch (pull) {
case Pull::None:
g.Pull = GPIO_NOPULL;
break;
case Pull::Up:
g.Pull = GPIO_PULLUP;
break;
case Pull::Down:
g.Pull = GPIO_PULLDOWN;
break;
}
HAL_GPIO_Init(gpio, &g);
entries[index].gpio = gpio;
entries[index].cb = cb;
entries[index].ptr = ptr;
return true;
}
bool Exti::ClearCallback(GPIO_TypeDef *gpio, uint16_t pin) {
uint8_t index = 31 - __builtin_clz(pin);
if (entries[index].gpio) {
if (gpio != entries[index].gpio) {
return false;
}
}
entries[index].gpio = NULL;
entries[index].cb = NULL;
entries[index].ptr = NULL;
return true;
}
static inline void ExtiHandler(uint16_t source) {
const uint32_t mask = 1 << source;
if (__HAL_GPIO_EXTI_GET_IT(mask) != RESET) {
__HAL_GPIO_EXTI_CLEAR_IT(mask);
if (entries[source].cb) {
entries[source].cb(entries[source].ptr);
}
}
}
extern "C" {
void EXTI0_IRQHandler(void) {
ExtiHandler(0);
}
void EXTI1_IRQHandler(void) {
ExtiHandler(1);
}
void EXTI2_IRQHandler(void) {
ExtiHandler(2);
}
void EXTI3_IRQHandler(void) {
ExtiHandler(3);
}
void EXTI4_IRQHandler(void) {
ExtiHandler(4);
}
void EXTI9_5_IRQHandler(void) {
ExtiHandler(5);
ExtiHandler(6);
ExtiHandler(7);
ExtiHandler(8);
ExtiHandler(9);
}
void EXTI15_10_IRQHandler(void) {
ExtiHandler(10);
ExtiHandler(11);
ExtiHandler(12);
ExtiHandler(13);
ExtiHandler(14);
ExtiHandler(15);
}
}

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#pragma once
#include <cstdint>
#include "stm.hpp"
namespace Exti {
enum class EdgeType : uint8_t {
Falling,
Rising,
Both,
};
enum class Pull : uint8_t {
None,
Up,
Down,
};
using Callback = void(*)(void*);
void Init();
bool SetCallback(GPIO_TypeDef *gpio, uint16_t pin, EdgeType edge, Pull pull, Callback cb, void *ptr = nullptr);
bool ClearCallback(GPIO_TypeDef *gpio, uint16_t pin);
}

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#include "FPGA.hpp"
#include "delay.hpp"
#include "stm.hpp"
#include "main.h"
#define LOG_LEVEL LOG_LEVEL_DEBUG
#define LOG_MODULE "FPGA"
#include "Log.h"
#define FPGA_SPI hspi1
extern SPI_HandleTypeDef FPGA_SPI;
static inline void Low(GPIO_TypeDef *gpio, uint16_t pin) {
gpio->BSRR = pin << 16;
}
static inline void High(GPIO_TypeDef *gpio, uint16_t pin) {
gpio->BSRR = pin;
}
static FPGA::HaltedCallback halted_cb;
static uint16_t SysCtrlReg = 0x0000;
static uint16_t ISRMaskReg = 0x0000;
void WriteRegister(FPGA::Reg reg, uint16_t value) {
uint16_t cmd[2] = {(uint16_t) (0x8000 | (uint16_t) reg), value};
Low(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
HAL_SPI_Transmit(&FPGA_SPI, (uint8_t*) cmd, 2, 100);
High(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
}
bool FPGA::Init(HaltedCallback cb) {
halted_cb = cb;
// Reset FPGA
High(FPGA_RESET_GPIO_Port, FPGA_RESET_Pin);
SetMode(Mode::FPGA);
Delay::us(1);
Low(FPGA_RESET_GPIO_Port, FPGA_RESET_Pin);
Delay::ms(10);
// Check if FPGA response is as expected
uint16_t cmd[2] = {0x4000, 0x0000};
uint16_t recv[2];
Low(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
HAL_SPI_TransmitReceive(&FPGA_SPI, (uint8_t*) cmd, (uint8_t*) recv, 2, 100);
High(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
if(recv[1] != 0xF0A5) {
LOG_ERR("Initialization failed, got 0x%04x instead of 0xF0A5", recv[1]);
}
LOG_DEBUG("Initialized, status register: 0x%04x", recv[0]);
return true;
}
void FPGA::SetNumberOfPoints(uint16_t npoints) {
// register has to be set to number of points - 1
npoints--;
WriteRegister(Reg::SweepPoints, npoints);
}
void FPGA::SetSamplesPerPoint(uint32_t nsamples) {
// register has to be set to number of nsamples - 1
nsamples--;
// constrain to maximum value
nsamples &= 0x1FFFF;
// highest bit is located at the system control register
SysCtrlReg &= ~0x0001;
SysCtrlReg |= nsamples >> 16;
WriteRegister(Reg::SystemControl, SysCtrlReg);
WriteRegister(Reg::SamplesPerPoint, nsamples & 0xFFFF);
}
void FPGA::SetSettlingTime(uint16_t us) {
if (us > 639) {
us = 639;
}
uint16_t regval = (uint32_t) us * 1024 / 10;
WriteRegister(Reg::SettlingTime, regval);
}
void FPGA::Enable(Periphery p, bool enable) {
if (enable) {
SysCtrlReg |= (uint16_t) p;
WriteRegister(Reg::SystemControl, SysCtrlReg);
} else {
Disable(p);
}
}
void FPGA::Disable(Periphery p) {
SysCtrlReg &= ~(uint16_t) p;
WriteRegister(Reg::SystemControl, SysCtrlReg);
}
void FPGA::EnableInterrupt(Interrupt i) {
ISRMaskReg |= (uint16_t) i;
WriteRegister(Reg::InterruptMask, ISRMaskReg);
}
void FPGA::DisableInterrupt(Interrupt i) {
ISRMaskReg &= ~(uint16_t) i;
WriteRegister(Reg::InterruptMask, ISRMaskReg);
}
void FPGA::WriteMAX2871Default(uint32_t *DefaultRegs) {
WriteRegister(Reg::MAX2871Def0LSB, DefaultRegs[0] & 0xFFFF);
WriteRegister(Reg::MAX2871Def0MSB, DefaultRegs[0] >> 16);
WriteRegister(Reg::MAX2871Def1LSB, DefaultRegs[1] & 0xFFFF);
WriteRegister(Reg::MAX2871Def1MSB, DefaultRegs[1] >> 16);
WriteRegister(Reg::MAX2871Def3LSB, DefaultRegs[3] & 0xFFFF);
WriteRegister(Reg::MAX2871Def3MSB, DefaultRegs[3] >> 16);
WriteRegister(Reg::MAX2871Def4LSB, DefaultRegs[4] & 0xFFFF);
WriteRegister(Reg::MAX2871Def4MSB, DefaultRegs[4] >> 16);
}
void FPGA::WriteSweepConfig(uint16_t pointnum, bool lowband, uint32_t *SourceRegs, uint32_t *LORegs,
uint8_t attenuation, uint64_t frequency, bool halt, LowpassFilter filter) {
uint16_t send[8];
// select which point this sweep config is for
send[0] = pointnum & 0x1FFF;
// assemble sweep config from required fields of PLL registers
send[1] = (LORegs[4] & 0x00700000) >> 14 | (LORegs[3] & 0xFC000000) >> 26;
if (halt) {
send[1] |= 0x8000;
}
if (lowband) {
send[1] |= 0x4000;
}
switch(filter) {
case LowpassFilter::Auto:
// Select source LP filter
if (frequency >= 3500000000) {
send[1] |= 0x0600;
} else if (frequency >= 1800000000) {
send[1] |= 0x0400;
} else if (frequency >= 900000000) {
send[1] |= 0x0200;
}
break;
case LowpassFilter::M947: break;
case LowpassFilter::M1880: send[1] |= 0x0200; break;
case LowpassFilter::M3500: send[1] |= 0x0400; break;
case LowpassFilter::None: send[1] |= 0x0600; break;
}
send[2] = (LORegs[1] & 0x00007FF8) << 1 | (LORegs[0] & 0x00007800) >> 11;
send[3] = (LORegs[0] & 0x000007F8) << 5 | (LORegs[0] & 0x7F800000) >> 23;
send[4] = (LORegs[0] & 0x007F8000) >> 7 | (attenuation & 0x7F) << 1 | (SourceRegs[4] & 0x00400000) >> 22;
send[5] = (SourceRegs[4] & 0x00300000) >> 6 | (SourceRegs[3] & 0xFC000000) >> 18 | (SourceRegs[1] & 0x00007F80) >> 7;
send[6] = (SourceRegs[1] & 0x00000078) << 9 | (SourceRegs[0] & 0x00007FF8) >> 3;
send[7] = (SourceRegs[0] & 0x7FFF8000) >> 15;
Low(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
HAL_SPI_Transmit(&FPGA_SPI, (uint8_t*) send, 8, 100);
High(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
}
static inline int64_t sign_extend_64(int64_t x, uint16_t bits) {
int64_t m = 1ULL << (bits - 1);
return (x ^ m) - m;
}
static FPGA::ReadCallback callback;
static uint16_t raw[18];
static bool halted;
bool FPGA::InitiateSampleRead(ReadCallback cb) {
callback = cb;
uint16_t cmd = 0xC000;
uint16_t status;
Low(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
HAL_SPI_TransmitReceive(&FPGA_SPI, (uint8_t*) &cmd, (uint8_t*) &status, 1,
100);
if (status & 0x0010) {
halted = true;
} else {
halted = false;
}
if (!(status & 0x0004)) {
// no new data available yet
High(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
if (halted) {
if (halted_cb) {
halted_cb();
}
} else {
LOG_WARN("ISR without new data, status: 0x%04x", status);
}
return false;
}
// Start data read
HAL_SPI_Receive_DMA(&FPGA_SPI, (uint8_t*) raw, 18);
return true;
}
extern "C" {
void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi) {
FPGA::SamplingResult result;
High(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
// Assemble data from words
result.P1I = sign_extend_64(
(uint64_t) raw[17] << 32 | (uint32_t) raw[16] << 16 | raw[15], 48);
result.P1Q = sign_extend_64(
(uint64_t) raw[14] << 32 | (uint32_t) raw[13] << 16 | raw[12], 48);
result.P2I = sign_extend_64(
(uint64_t) raw[11] << 32 | (uint32_t) raw[10] << 16 | raw[9], 48);
result.P2Q = sign_extend_64(
(uint64_t) raw[8] << 32 | (uint32_t) raw[7] << 16 | raw[6], 48);
result.RefI = sign_extend_64(
(uint64_t) raw[5] << 32 | (uint32_t) raw[4] << 16 | raw[3], 48);
result.RefQ = sign_extend_64(
(uint64_t) raw[2] << 32 | (uint32_t) raw[1] << 16 | raw[0], 48);
if (callback) {
callback(result);
}
if (halted && halted_cb) {
halted_cb();
}
}
}
void FPGA::StartSweep() {
Low(FPGA_AUX3_GPIO_Port, FPGA_AUX3_Pin);
Delay::us(1);
High(FPGA_AUX3_GPIO_Port, FPGA_AUX3_Pin);
}
void FPGA::AbortSweep() {
Low(FPGA_AUX3_GPIO_Port, FPGA_AUX3_Pin);
}
void FPGA::SetMode(Mode mode) {
switch(mode) {
case Mode::FPGA:
// Both AUX1/2 low
Low(FPGA_AUX1_GPIO_Port, FPGA_AUX1_Pin);
Low(FPGA_AUX2_GPIO_Port, FPGA_AUX2_Pin);
Delay::us(1);
High(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
break;
case Mode::SourcePLL:
Low(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
Low(FPGA_AUX2_GPIO_Port, FPGA_AUX2_Pin);
Delay::us(1);
High(FPGA_AUX1_GPIO_Port, FPGA_AUX1_Pin);
break;
case Mode::LOPLL:
Low(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
Low(FPGA_AUX1_GPIO_Port, FPGA_AUX1_Pin);
Delay::us(1);
High(FPGA_AUX2_GPIO_Port, FPGA_AUX2_Pin);
break;
}
Delay::us(1);
}
uint16_t FPGA::GetStatus() {
uint16_t cmd = 0x4000;
uint16_t status;
Low(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
HAL_SPI_TransmitReceive(&FPGA_SPI, (uint8_t*) &cmd, (uint8_t*) &status, 1,
100);
High(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
return status;
}
FPGA::ADCLimits FPGA::GetADCLimits() {
uint16_t cmd = 0xE000;
Low(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
HAL_SPI_Transmit(&FPGA_SPI, (uint8_t*) &cmd, 1, 100);
ADCLimits limits;
HAL_SPI_Receive(&FPGA_SPI, (uint8_t*) &limits, 6, 100);
High(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
return limits;
}
void FPGA::ResetADCLimits() {
uint16_t cmd = 0x6000;
Low(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
HAL_SPI_Transmit(&FPGA_SPI, (uint8_t*) &cmd, 1, 100);
High(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
}
void FPGA::ResumeHaltedSweep() {
uint16_t cmd = 0x2000;
Low(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
HAL_SPI_Transmit(&FPGA_SPI, (uint8_t*) &cmd, 1, 100);
High(FPGA_CS_GPIO_Port, FPGA_CS_Pin);
}

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#pragma once
#include <cstdint>
namespace FPGA {
static constexpr uint16_t MaxPoints = 4501;
enum class Reg {
InterruptMask = 0x00,
SweepPoints = 0x01,
SamplesPerPoint = 0x02,
SystemControl = 0x03,
SettlingTime = 0x04,
MAX2871Def0LSB = 0x08,
MAX2871Def0MSB = 0x09,
MAX2871Def1LSB = 0x0A,
MAX2871Def1MSB = 0x0B,
MAX2871Def3LSB = 0x0C,
MAX2871Def3MSB = 0x0D,
MAX2871Def4LSB = 0x0E,
MAX2871Def4MSB = 0x0F,
};
using SamplingResult = struct _samplingresult {
int64_t P1I, P1Q;
int64_t P2I, P2Q;
int64_t RefI, RefQ;
};
using ADCLimits = struct _adclimits {
int16_t P1min, P1max;
int16_t P2min, P2max;
int16_t Rmin, Rmax;
};
enum class Periphery {
Port1Mixer = 0x8000,
Port2Mixer = 0x4000,
RefMixer = 0x2000,
Amplifier = 0x1000,
SourceRF = 0x0800,
LO1RF = 0x0400,
ExtRefLED = 0x0200,
ReadyLED = 0x0100,
DebugLED = 0x0080,
SourceChip = 0x0010,
LO1Chip = 0x0008,
ExcitePort2 = 0x0004,
ExcitePort1 = 0x0002,
};
enum class Interrupt {
LO1Unlock = 0x0001,
SourceUnlock = 0x0002,
NewData = 0x0004,
DataOverrun = 0x0008,
SweepHalted = 0x0010,
};
enum class LowpassFilter {
M947 = 0x00,
M1880 = 0x01,
M3500 = 0x02,
None = 0x03,
Auto = 0xFF,
};
using HaltedCallback = void(*)(void);
bool Init(HaltedCallback cb = nullptr);
void SetNumberOfPoints(uint16_t npoints);
void SetSamplesPerPoint(uint32_t nsamples);
void SetSettlingTime(uint16_t us);
void Enable(Periphery p, bool enable = true);
void Disable(Periphery p);
void EnableInterrupt(Interrupt i);
void DisableInterrupt(Interrupt i);
void WriteMAX2871Default(uint32_t *DefaultRegs);
void WriteSweepConfig(uint16_t pointnum, bool lowband, uint32_t *SourceRegs, uint32_t *LORegs,
uint8_t attenuation, uint64_t frequency, bool halt = false, LowpassFilter filter = LowpassFilter::Auto);
using ReadCallback = void(*)(SamplingResult result);
bool InitiateSampleRead(ReadCallback cb);
ADCLimits GetADCLimits();
void ResetADCLimits();
void ResumeHaltedSweep();
uint16_t GetStatus();
void StartSweep();
void AbortSweep();
enum class Mode {
FPGA,
SourcePLL,
LOPLL,
};
void SetMode(Mode mode);
}

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#include "Log.h"
#include "stm.hpp"
#include <cstdarg>
#include <cstdio>
#include <cstring>
extern "C" {
/* Automatically build register and function names based on USART selection */
#define USART_M2(y) USART ## y
#define USART_M1(y) USART_M2(y)
#define USART_BASE USART_M1(LOG_USART)
#define HANDLER_M2(x) USART ## x ## _IRQHandler
#define HANDLER_M1(x) HANDLER_M2(x)
#define HANDLER HANDLER_M1(LOG_USART)
#define NVIC_ISR_M2(x) USART ## x ## _IRQn
#define NVIC_ISR_M1(x) NVIC_ISR_M2(x)
#define NVIC_ISR NVIC_ISR_M1(LOG_USART)
#define CLK_ENABLE_M2(x) __HAL_RCC_USART ## x ## _CLK_ENABLE()
#define CLK_ENABLE_M1(x) CLK_ENABLE_M2(x)
#define CLK_ENABLE() CLK_ENABLE_M1(LOG_USART)
#define CLK_DISABLE_M2(x) __HAL_RCC_USART ## x ## _CLK_DISABLE()
#define CLK_DISABLE_M1(x) CLK_DISABLE_M2(x)
#define CLK_DISABLE() CLK_DISABLE_M1(LOG_USART)
#define MAX_LINE_LENGTH 256
#ifdef USART_SR_TXE
#define USART_ISR_REG SR
#define USART_RXNE USART_SR_RXNE
#define USART_TXE USART_SR_TXE
#define USART_TC USART_SR_TC
#define USART_READ DR
#define USART_WRITE DR
#else
#define USART_ISR_REG ISR
#define USART_RXNE USART_ISR_RXNE
#define USART_TXE USART_ISR_TXE
#define USART_TC USART_ISR_TC
#define USART_READ RDR
#define USART_WRITE TDR
#endif
static char fifo[LOG_SENDBUF_LENGTH + MAX_LINE_LENGTH];
static uint16_t fifo_write, fifo_read;
#ifdef LOG_USE_MUTEX
#include "FreeRTOS.h"
#include "semphr.h"
static StaticSemaphore_t xMutex;
static SemaphoreHandle_t mutex;
#endif
#define INC_FIFO_POS(pos, inc) do { pos = (pos + inc) % LOG_SENDBUF_LENGTH; } while(0)
static uint16_t fifo_space() {
uint16_t used;
if(fifo_write >= fifo_read) {
used = fifo_write - fifo_read;
} else {
used = fifo_write - fifo_read + LOG_SENDBUF_LENGTH;
}
return LOG_SENDBUF_LENGTH - used - 1;
}
static log_redirect_t redirect;
void Log_Init() {
fifo_write = 0;
fifo_read = 0;
redirect = NULL;
#ifdef LOG_USE_MUTEXES
mutex = xSemaphoreCreateMutexStatic(&xMutex);
#endif
/* USART interrupt Init */
HAL_NVIC_SetPriority(NVIC_ISR, 5, 0);
HAL_NVIC_EnableIRQ(NVIC_ISR);
}
void Log_SetRedirect(log_redirect_t redirect_function) {
redirect = redirect_function;
}
void _log_write(const char *module, const char *level, const char *fmt, ...) {
int written = 0;
va_list args;
va_start(args, fmt);
#ifdef LOG_USE_MUTEX
if (!STM::InInterrupt()) {
xSemaphoreTake(mutex, portMAX_DELAY);
}
#endif
written = snprintf(&fifo[fifo_write], MAX_LINE_LENGTH, "%05lu [%6.6s,%s]: ",
HAL_GetTick(), module, level);
written += vsnprintf(&fifo[fifo_write + written], MAX_LINE_LENGTH - written,
fmt, args);
written += snprintf(&fifo[fifo_write + written], MAX_LINE_LENGTH - written,
"\r\n");
if(redirect) {
redirect(&fifo[fifo_write], written);
}
// check if line still fits into ring buffer
#ifdef LOG_BLOCKING
while (written > fifo_space()) {
HAL_Delay(1);
}
#else
if (written > fifo_space()) {
// unable to fit line, skip
#ifdef LOG_USE_MUTEX
if (!stm_in_interrupt()) {
xSemaphoreGive(mutex);
}
#endif
return;
}
#endif
int16_t overflow = (fifo_write + written) - LOG_SENDBUF_LENGTH;
if (overflow > 0) {
// printf wrote over the end of the ring buffer -> wrap around
memmove(&fifo[0], &fifo[LOG_SENDBUF_LENGTH], overflow);
}
INC_FIFO_POS(fifo_write, written);
// enable interrupt
CLK_ENABLE();
USART_BASE->CR1 |= USART_CR1_TXEIE | USART_CR1_TCIE;
#ifdef LOG_USE_MUTEX
if (!stm_in_interrupt()) {
xSemaphoreGive(mutex);
}
#endif
#ifdef LOG_BLOCKING
while(USART_BASE->CR1 & USART_CR1_TCIE);
#endif
}
/* Implemented directly here for speed reasons. Disable interrupt in CubeMX! */
void HANDLER(void) {
if (USART_BASE->USART_ISR_REG & USART_TC) {
// clear flag
USART_BASE->USART_ISR_REG &= ~USART_TC;
if (!(USART_BASE->CR1 & USART_CR1_TXEIE)) {
USART_BASE->CR1 &= ~USART_CR1_TCIE;
CLK_DISABLE();
}
}
if ((USART_BASE->CR1 & USART_CR1_TXEIE)
&& (USART_BASE->USART_ISR_REG & USART_TXE)) {
USART_BASE->USART_WRITE = fifo[fifo_read];
INC_FIFO_POS(fifo_read, 1);
if (fifo_read == fifo_write) {
// all done, disable interrupt
USART_BASE->CR1 &= ~USART_CR1_TXEIE;
}
}
}
}

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#pragma once
#ifdef __cplusplus
extern "C" {
#endif
//#define LOG_BLOCKING
#define LOG_USART 2
#define LOG_SENDBUF_LENGTH 1024
//#define LOG_USE_MUTEX
#define LOG_LEVEL_DEBUG 4
#define LOG_LEVEL_INFO 3
#define LOG_LEVEL_WARN 2
#define LOG_LEVEL_ERR 1
#define LOG_LEVEL_CRIT 0
#define LOG_LEVEL_DEFAULT LOG_LEVEL_ERR
#ifndef LOG_LEVEL
#define LOG_LEVEL LOG_LEVEL_DEFAULT
#endif
#ifndef LOG_MODULE
#define LOG_MODULE "Log"
#endif
#if LOG_LEVEL >= LOG_LEVEL_CRIT
#define LOG_CRIT(fmt, ...) _log_write(LOG_MODULE, "CRT", fmt, ## __VA_ARGS__)
#else
#define LOG_CRIT(fmt, ...)
#endif
#if LOG_LEVEL >= LOG_LEVEL_ERR
#define LOG_ERR(fmt, ...) _log_write(LOG_MODULE, "ERR", fmt, ## __VA_ARGS__)
#else
#define LOG_ERR(fmt, ...)
#endif
#if LOG_LEVEL >= LOG_LEVEL_WARN
#define LOG_WARN(fmt, ...) _log_write(LOG_MODULE, "WRN", fmt, ## __VA_ARGS__)
#else
#define LOG_WARN(fmt, ...)
#endif
#if LOG_LEVEL >= LOG_LEVEL_INFO
#define LOG_INFO(fmt, ...) _log_write(LOG_MODULE, "INF", fmt, ## __VA_ARGS__)
#else
#define LOG_INFO(fmt, ...)
#endif
#if LOG_LEVEL >= LOG_LEVEL_DEBUG
#define LOG_DEBUG(fmt, ...) _log_write(LOG_MODULE, "DBG", fmt, ## __VA_ARGS__)
#else
#define LOG_DEBUG(fmt, ...)
#endif
#include <stdint.h>
void Log_Init();
typedef void (*log_redirect_t)(const char *line, uint16_t length);
void Log_SetRedirect(log_redirect_t redirect_function);
void _log_write(const char *module, const char *level, const char *fmt, ...);
#ifdef __cplusplus
}
#endif

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#include "Si5351C.hpp"
#include <cmath>
#define LOG_LEVEL LOG_LEVEL_INFO
#define LOG_MODULE "SI5351"
#include "Log.h"
bool Si5351C::Init(uint32_t clkin_freq) {
bool success = true;
uint8_t clkinDiv = 0;
while (clkin_freq / (1 << clkinDiv) > 40000000) {
if (clkinDiv < 3) {
clkinDiv++;
} else {
LOG_ERR("CLK in too high");
return false;
}
}
FreqCLKINDiv = clkin_freq / (1 << clkinDiv);
// Write CLK in divider
uint8_t value;
success &= ReadRegister(Reg::PLLInputSource, &value);
value &= ~0xC0;
value |= clkinDiv << 6;
success &= WriteRegister(Reg::PLLInputSource, value);
// Disable OEB pin functionality
success &= WriteRegister(Reg::OEBPinMask, 0xFF);
// Disable all outputs
success &= WriteRegister(Reg::OutputEnableControl, 0xFF);
// Enable fanouts
success &= WriteRegister(Reg::FanoutEnable, 0xD0);
if(success) {
LOG_INFO("Initialized");
} else {
LOG_ERR("Initialization failed");
}
return success;
}
bool Si5351C::SetPLL(PLL pll, uint32_t frequency, PLLSource src) {
if (frequency < 600000000 || frequency > 900000000) {
LOG_ERR("Requested PLL frequency out of range (600-900MHz): %lu", frequency);
return false;
}
PLLConfig c;
c.IntegerMode = false;
c.source = src;
uint32_t srcFreq = src == PLLSource::XTAL ? FreqXTAL : FreqCLKINDiv;
// see https://www.silabs.com/documents/public/application-notes/AN619.pdf (page 3)
uint64_t div27 = (uint64_t) frequency * (1UL << 27) / srcFreq;
// Check for valid range
if (div27 < 15 * (1ULL << 27) || div27 > 90 * (1ULL << 27)) {
LOG_ERR("Calculated divider out of range (15-90)");
return false;
}
FindOptimalDivider(frequency, srcFreq, c.P1, c.P2, c.P3);
FreqPLL[(int) pll] = frequency;
LOG_INFO("Setting PLL %c to %luHz", pll==PLL::A ? 'A' : 'B', frequency);
return WritePLLConfig(c, pll);
}
bool Si5351C::SetCLK(uint8_t clknum, uint32_t frequency, PLL source, DriveStrength strength, uint32_t PLLFreqOverride) {
ClkConfig c;
c.DivideBy4 = false;
c.IntegerMode = false;
c.Inverted = false;
c.PoweredDown = false;
c.RDiv = 1;
c.source = source;
c.strength = strength;
uint32_t pllFreq = PLLFreqOverride > 0 ? PLLFreqOverride : FreqPLL[(int) source];
if (clknum > 5) {
// outputs 6 and 7 are integer dividers only
uint32_t div = pllFreq / frequency;
if (div > 254 || div < 6) {
LOG_ERR("Divider on CLK6/7 out of range (6-254), would need %lu", div);
return false;
}
if(div & 0x01) {
LOG_ERR("Divider on CLK6/7 must be even, clock frequency will not match exactly");
}
div &= 0xFE;
uint32_t actualFreq = pllFreq / div;
uint32_t deviation = abs(frequency - actualFreq);
if (deviation > 0) {
LOG_WARN("Optimal divider for %luHz/%luHz is: %u (%luHz deviation)",
pllFreq, frequency, div, abs(frequency - actualFreq));
}
c.P1 = div;
} else {
while (pllFreq / (frequency * c.RDiv) >= 2048
|| (frequency * c.RDiv) < 500000) {
if (c.RDiv < 128) {
c.RDiv *= 2;
} else {
LOG_ERR("Unable to reach requested frequency");
return false;
}
}
FindOptimalDivider(pllFreq, frequency * c.RDiv, c.P1, c.P2, c.P3);
}
LOG_DEBUG("Setting CLK%d to %luHz", clknum, frequency);
return WriteClkConfig(c, clknum);
}
bool Si5351C::SetCLKtoXTAL(uint8_t clknum) {
Reg reg = (Reg) ((int) Reg::CLK0Control + clknum);
LOG_INFO("Connecting CLK%d to XTAL", clknum);
return ClearBits(reg, 0x0C);
}
bool Si5351C::SetCLKToCLKIN(uint8_t clknum) {
Reg reg = (Reg) ((int) Reg::CLK0Control + clknum);
LOG_INFO("Connecting CLK%d to CLK in", clknum);
return ClearBits(reg, 0x08) && SetBits(reg, 0x04);
}
bool Si5351C::Enable(uint8_t clknum) {
LOG_INFO("Enabling CLK%d", clknum);
return ClearBits(Reg::OutputEnableControl, 1 << clknum);
}
bool Si5351C::Disable(uint8_t clknum) {
LOG_INFO("Disabling CLK%d", clknum);
return SetBits(Reg::OutputEnableControl, 1 << clknum);
}
bool Si5351C::Locked(PLL pll) {
uint8_t mask = pll == PLL::A ? 0x20 : 0x40;
uint8_t value;
ReadRegister(Reg::DeviceStatus, &value);
LOG_DEBUG("Device status: 0x%02x", value);
if (value & mask) {
return false;
} else {
return true;
}
}
bool Si5351C::WritePLLConfig(PLLConfig config, PLL pll) {
uint8_t PllData[8];
// See register map in https://www.silabs.com/documents/public/application-notes/AN619.pdf (page 11)
PllData[0] = (config.P3 >> 8) & 0xFF;
PllData[1] = config.P3 & 0xFF;
PllData[2] = (config.P1 >> 16) & 0x03;
PllData[3] = (config.P1 >> 8) & 0xFF;
PllData[4] = config.P1 & 0xFF;
PllData[5] = ((config.P3 >> 12) & 0xF0) | ((config.P2 >> 16) & 0x0F);
PllData[6] = (config.P2 >> 8) & 0xFF;
PllData[7] = config.P2 & 0xFF;
bool success = true;
Reg reg = pll == PLL::A ? Reg::MSNA_CONFIG : Reg::MSNB_CONFIG;
success &= WriteRegisterRange(reg, PllData, sizeof(PllData));
reg = pll == PLL::A ? Reg::CLK6Control : Reg::CLK7Control;
if (config.IntegerMode) {
success &=SetBits(reg, 0x40);
} else {
success &=ClearBits(reg, 0x40);
}
uint8_t mask = pll == PLL::A ? 0x04 : 0x08;
if (config.source == PLLSource::XTAL) {
success &=ClearBits(Reg::PLLInputSource, mask);
} else {
success &=SetBits(Reg::PLLInputSource, mask);
}
// Reset the PLL
mask = pll == PLL::A ? 0x20 : 0x80;
//success &=SetBits(Reg::PLLReset, mask);
reg = pll == PLL::A ? Reg::MSNA_CONFIG : Reg::MSNB_CONFIG;
for(uint8_t i=0;i<8;i++) {
uint8_t readback;
ReadRegister((Reg)((int)reg + i), &readback);
LOG_DEBUG("PLL readback %d: 0x%02x", i, readback);
}
return success;
}
bool Si5351C::WriteClkConfig(ClkConfig config, uint8_t clknum) {
bool success = true;
// compile CLKControl register
uint8_t clkcontrol = 0x0C;
if (config.PoweredDown) {
clkcontrol |= 0x80;
}
if (clknum <= 5) {
if (config.IntegerMode) {
clkcontrol |= 0x40;
}
} else {
// preserve bit 6
uint8_t value = 0x00;
success &= ReadRegister((Reg) ((int) Reg::CLK0Control + clknum),
&value);
clkcontrol |= value & 0x40;
}
if (config.source == PLL::B) {
clkcontrol |= 0x20;
}
if (config.Inverted) {
clkcontrol |= 0x10;
}
switch (config.strength) {
case DriveStrength::mA2:
break;
case DriveStrength::mA4:
clkcontrol |= 0x01;
break;
case DriveStrength::mA6:
clkcontrol |= 0x02;
break;
case DriveStrength::mA8:
clkcontrol |= 0x03;
break;
}
Reg reg = (Reg) ((int) Reg::CLK0Control + clknum);
success &= WriteRegister(reg, clkcontrol);
if (clknum <= 5) {
uint8_t ClkData[8];
ClkData[0] = (config.P3 >> 8) & 0xFF;
ClkData[1] = config.P3 & 0xFF;
ClkData[2] = (31 - __builtin_clz(config.RDiv)) << 4
| (config.DivideBy4 ? 0xC0 : 0x00) | ((config.P1 >> 16) & 0x03);
ClkData[3] = (config.P1 >> 8) & 0xFF;
ClkData[4] = config.P1 & 0xFF;
ClkData[5] = ((config.P3 >> 12) & 0xF0) | ((config.P2 >> 16) & 0x0F);
ClkData[6] = (config.P2 >> 8) & 0xFF;
ClkData[7] = config.P2 & 0xFF;
// Calculate address of register control block
reg = (Reg) ((int) Reg::MS0_CONFIG + 8 * clknum);
success &= WriteRegisterRange(reg, ClkData, sizeof(ClkData));
} else if (clknum == 6) {
success &= WriteRegister(Reg::MS6_CONFIG, config.P1 & 0xFF);
} else {
success &= WriteRegister(Reg::MS7_CONFIG, config.P1 & 0xFF);
}
return success;
}
bool Si5351C::WriteRegister(Reg reg, uint8_t data) {
return WriteRegisterRange(reg, &data, 1);
}
bool Si5351C::ReadRegister(Reg reg, uint8_t *data) {
return HAL_I2C_Mem_Read(i2c, address, (int) reg,
I2C_MEMADD_SIZE_8BIT, data, 1, 100) == HAL_OK;
}
bool Si5351C::SetBits(Reg reg, uint8_t bits) {
uint8_t value = 0;
if (!ReadRegister(reg, &value)) {
return false;
}
value |= bits;
return WriteRegister(reg, value);
}
bool Si5351C::ClearBits(Reg reg, uint8_t bits) {
uint8_t value = 0;
if (!ReadRegister(reg, &value)) {
return false;
}
value &= ~bits;
return WriteRegister(reg, value);
}
bool Si5351C::WriteRegisterRange(Reg start, const uint8_t *data, uint8_t len) {
return HAL_I2C_Mem_Write(i2c, address, (int) start,
I2C_MEMADD_SIZE_8BIT, (uint8_t*) data, len, 100) == HAL_OK;
}
bool Si5351C::ReadRegisterRange(Reg start, uint8_t *data, uint8_t len) {
return HAL_I2C_Mem_Read(i2c, address, (int) start,
I2C_MEMADD_SIZE_8BIT, data, len, 100) == HAL_OK;
}
bool Si5351C::ResetPLL(PLL pll) {
if (pll == PLL::A) {
return SetBits(Reg::PLLReset, 0x20);
} else {
return SetBits(Reg::PLLReset, 0x80);
}
}
void Si5351C::FindOptimalDivider(uint32_t f_pll, uint32_t f, uint32_t &P1,
uint32_t &P2, uint32_t &P3) {
// see https://www.silabs.com/documents/public/application-notes/AN619.pdf (page 3/6)
uint32_t a = f_pll / f;
int32_t f_rem = f_pll - f * a;
uint32_t best_b, best_c;
uint32_t best_deviation = UINT32_MAX;
for (uint32_t c = (1UL << 20) - 1; c >= (1UL << 19); c--) {
uint32_t guess_b = (uint64_t) f_rem * c / f;
for (uint32_t b = guess_b; b <= guess_b + 1; b++) {
int32_t f_div = (uint64_t) f * b / c;
uint32_t deviation = abs(f_rem - f_div);
if (deviation < best_deviation) {
best_b = b;
best_c = c;
best_deviation = deviation;
if (deviation == 0) {
break;
}
}
}
if (best_deviation == 0) {
break;
}
}
LOG_DEBUG(
"Optimal divider for %luHz/%luHz is: a=%lu, b=%lu, c=%lu (%luHz deviation)",
f_pll, f, a, best_b, best_c, best_deviation);
// convert to Si5351C parameters
uint32_t floor = 128 * best_b / best_c;
P1 = 128 * a + floor - 512;
P2 = 128 * best_b - best_c * floor;
P3 = best_c;
LOG_DEBUG("P1=%lu, P2=%lu, P3=%lu", P1, P2, P3);
}
bool Si5351C::WriteRawCLKConfig(uint8_t clknum, const uint8_t *config) {
// Calculate address of register control block
auto reg = (Reg) ((int) Reg::MS0_CONFIG + 8 * clknum);
return WriteRegisterRange(reg, config, 8);
}
bool Si5351C::ReadRawCLKConfig(uint8_t clknum, uint8_t *config) {
// Calculate address of register control block
auto reg = (Reg) ((int) Reg::MS0_CONFIG + 8 * clknum);
return ReadRegisterRange(reg, config, 8);
}

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#pragma once
#include "stm.hpp"
class Si5351C {
public:
enum class PLL : uint8_t {
A = 0,
B = 1,
};
enum class DriveStrength : uint8_t {
mA2 = 0x00,
mA4 = 0x01,
mA6 = 0x02,
mA8 = 0x03,
};
enum class PLLSource : uint8_t {
XTAL,
CLKIN,
};
constexpr Si5351C(I2C_HandleTypeDef *i2c, uint32_t XTAL_freq, GPIO_InitTypeDef *intr_gpio = nullptr,
uint16_t intr_pin = 0, GPIO_InitTypeDef *oeb_gpio = nullptr, uint16_t oeb_pin = 0):
i2c(i2c),
intr_gpio(intr_gpio),
intr_pin(intr_pin),
oeb_gpio(oeb_gpio),
oeb_pin(oeb_pin),
FreqPLL{},
FreqXTAL(XTAL_freq),
FreqCLKINDiv(0) {
};
bool Init(uint32_t clkin_freq = 0);
bool SetPLL(PLL pll, uint32_t frequency, PLLSource src);
bool SetCLK(uint8_t clknum, uint32_t frequency, PLL source, DriveStrength strength = DriveStrength::mA2, uint32_t PLLFreqOverride = 0);
bool SetCLKtoXTAL(uint8_t clknum);
bool SetCLKToCLKIN(uint8_t clknum);
bool Enable(uint8_t clknum);
bool Disable(uint8_t clknum);
bool Locked(PLL pll);
bool ResetPLL(PLL pll);
// Direct register access of clk configuration registers
// config has to point to a buffer containing at least 8 bytes
bool WriteRawCLKConfig(uint8_t clknum, const uint8_t *config);
bool ReadRawCLKConfig(uint8_t clknum, uint8_t *config);
private:
void FindOptimalDivider(uint32_t f_pll, uint32_t f, uint32_t &P1, uint32_t &P2, uint32_t &P3);
enum class Reg : uint8_t {
DeviceStatus = 0,
InterruptStatusSticky = 1,
InterruptStatusMask = 2,
OutputEnableControl = 3,
OEBPinMask = 9,
PLLInputSource = 15,
CLK0Control = 16,
CLK1Control = 17,
CLK2Control = 18,
CLK3Control = 19,
CLK4Control = 20,
CLK5Control = 21,
CLK6Control = 22,
CLK7Control = 23,
CLK3_0DisableState = 24,
CLK7_4DisableState = 25,
MSNA_CONFIG = 26,
MSNB_CONFIG = 34,
MS0_CONFIG = 42,
MS1_CONFIG = 50,
MS2_CONFIG = 58,
MS3_CONFIG = 66,
MS4_CONFIG = 74,
MS5_CONFIG = 82,
MS6_CONFIG = 90,
MS7_CONFIG = 91,
R6_7_Divider = 92,
// Left out: Spread Spectrum and VCXO parameters
CLK0_Offset = 165,
CLK1_Offset = 166,
CLK2_Offset = 167,
CLK3_Offset = 168,
CLK4_Offset = 169,
CLK5_Offset = 170,
PLLReset = 177,
CrystalLoadCapacitance = 183,
FanoutEnable = 187,
};
using PLLConfig = struct {
uint32_t P1, P2, P3;
bool IntegerMode;
PLLSource source;
};
bool WritePLLConfig(PLLConfig config, PLL pll);
using ClkConfig = struct {
uint32_t P1, P2, P3;
uint8_t RDiv; // 1 to 128, only 2^n
bool DivideBy4;
bool PoweredDown;
bool IntegerMode;
PLL source;
bool Inverted;
DriveStrength strength;
};
bool WriteClkConfig(ClkConfig config, uint8_t clknum);
static constexpr uint8_t address = 0xC0;
bool WriteRegister(Reg reg, uint8_t data);
bool ReadRegister(Reg reg, uint8_t *data);
bool SetBits(Reg reg, uint8_t bits);
bool ClearBits(Reg reg, uint8_t bits);
bool WriteRegisterRange(Reg start, const uint8_t *data, uint8_t len);
bool ReadRegisterRange(Reg start, uint8_t *data, uint8_t len);
I2C_HandleTypeDef *i2c;
GPIO_InitTypeDef *intr_gpio;
uint16_t intr_pin;
GPIO_InitTypeDef *oeb_gpio;
uint16_t oeb_pin;
uint32_t FreqPLL[2];
uint32_t FreqXTAL, FreqCLKINDiv;
};

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : usbd_conf.h
* @version : v2.0_Cube
* @brief : Header for usbd_conf.c file.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* www.st.com/SLA0044
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_CONF__H__
#define __USBD_CONF__H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "main.h"
#include "stm32g4xx.h"
#include "stm32g4xx_hal.h"
/* USER CODE BEGIN INCLUDE */
/* USER CODE END INCLUDE */
/** @addtogroup USBD_OTG_DRIVER
* @brief Driver for Usb device.
* @{
*/
/** @defgroup USBD_CONF USBD_CONF
* @brief Configuration file for Usb otg low level driver.
* @{
*/
/** @defgroup USBD_CONF_Exported_Variables USBD_CONF_Exported_Variables
* @brief Public variables.
* @{
*/
/**
* @}
*/
/** @defgroup USBD_CONF_Exported_Defines USBD_CONF_Exported_Defines
* @brief Defines for configuration of the Usb device.
* @{
*/
/*---------- -----------*/
#define USBD_MAX_NUM_INTERFACES 1U
/*---------- -----------*/
#define USBD_MAX_NUM_CONFIGURATION 1U
/*---------- -----------*/
#define USBD_MAX_STR_DESC_SIZ 512U
/*---------- -----------*/
#define USBD_SUPPORT_USER_STRING 0U
/*---------- -----------*/
#define USBD_DEBUG_LEVEL 0U
/*---------- -----------*/
#define USBD_LPM_ENABLED 1U
/*---------- -----------*/
#define USBD_SELF_POWERED 1U
/****************************************/
/* #define for FS and HS identification */
#define DEVICE_FS 0
/**
* @}
*/
/** @defgroup USBD_CONF_Exported_Macros USBD_CONF_Exported_Macros
* @brief Aliases.
* @{
*/
/* Memory management macros */
/** Alias for memory allocation. */
#define USBD_malloc (uint32_t *)USBD_static_malloc
/** Alias for memory release. */
#define USBD_free USBD_static_free
/** Alias for memory set. */
#define USBD_memset /* Not used */
/** Alias for memory copy. */
#define USBD_memcpy /* Not used */
/** Alias for delay. */
#define USBD_Delay HAL_Delay
/* DEBUG macros */
#if (USBD_DEBUG_LEVEL > 0)
#define USBD_UsrLog(...) printf(__VA_ARGS__);\
printf("\n");
#else
#define USBD_UsrLog(...)
#endif
#if (USBD_DEBUG_LEVEL > 1)
#define USBD_ErrLog(...) printf("ERROR: ") ;\
printf(__VA_ARGS__);\
printf("\n");
#else
#define USBD_ErrLog(...)
#endif
#if (USBD_DEBUG_LEVEL > 2)
#define USBD_DbgLog(...) printf("DEBUG : ") ;\
printf(__VA_ARGS__);\
printf("\n");
#else
#define USBD_DbgLog(...)
#endif
/**
* @}
*/
/** @defgroup USBD_CONF_Exported_Types USBD_CONF_Exported_Types
* @brief Types.
* @{
*/
/**
* @}
*/
/** @defgroup USBD_CONF_Exported_FunctionsPrototype USBD_CONF_Exported_FunctionsPrototype
* @brief Declaration of public functions for Usb device.
* @{
*/
/* Exported functions -------------------------------------------------------*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __USBD_CONF__H__ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file usbd_core.h
* @author MCD Application Team
* @brief Header file for usbd_core.c file
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2015 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* http://www.st.com/SLA0044
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_CORE_H
#define __USBD_CORE_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "usbd_conf.h"
#include "usbd_def.h"
#include "usbd_ioreq.h"
#include "usbd_ctlreq.h"
/** @addtogroup STM32_USB_DEVICE_LIBRARY
* @{
*/
/** @defgroup USBD_CORE
* @brief This file is the Header file for usbd_core.c file
* @{
*/
/** @defgroup USBD_CORE_Exported_Defines
* @{
*/
#ifndef USBD_DEBUG_LEVEL
#define USBD_DEBUG_LEVEL 0U
#endif /* USBD_DEBUG_LEVEL */
/**
* @}
*/
/** @defgroup USBD_CORE_Exported_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup USBD_CORE_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_CORE_Exported_Variables
* @{
*/
#define USBD_SOF USBD_LL_SOF
/**
* @}
*/
/** @defgroup USBD_CORE_Exported_FunctionsPrototype
* @{
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id);
USBD_StatusTypeDef USBD_DeInit(USBD_HandleTypeDef *pdev);
USBD_StatusTypeDef USBD_Start (USBD_HandleTypeDef *pdev);
USBD_StatusTypeDef USBD_Stop (USBD_HandleTypeDef *pdev);
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass);
USBD_StatusTypeDef USBD_RunTestMode (USBD_HandleTypeDef *pdev);
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx);
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx);
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup);
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata);
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata);
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev);
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed);
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev);
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev);
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev);
USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum);
USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum);
USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev);
USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev);
/* USBD Low Level Driver */
USBD_StatusTypeDef USBD_LL_Init (USBD_HandleTypeDef *pdev);
USBD_StatusTypeDef USBD_LL_DeInit (USBD_HandleTypeDef *pdev);
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev);
USBD_StatusTypeDef USBD_LL_Stop (USBD_HandleTypeDef *pdev);
USBD_StatusTypeDef USBD_LL_OpenEP (USBD_HandleTypeDef *pdev,
uint8_t ep_addr,
uint8_t ep_type,
uint16_t ep_mps);
USBD_StatusTypeDef USBD_LL_CloseEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr);
USBD_StatusTypeDef USBD_LL_FlushEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr);
USBD_StatusTypeDef USBD_LL_StallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr);
USBD_StatusTypeDef USBD_LL_ClearStallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr);
uint8_t USBD_LL_IsStallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr);
USBD_StatusTypeDef USBD_LL_SetUSBAddress (USBD_HandleTypeDef *pdev, uint8_t dev_addr);
USBD_StatusTypeDef USBD_LL_Transmit (USBD_HandleTypeDef *pdev,
uint8_t ep_addr,
uint8_t *pbuf,
uint16_t size);
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev,
uint8_t ep_addr,
uint8_t *pbuf,
uint16_t size);
uint32_t USBD_LL_GetRxDataSize (USBD_HandleTypeDef *pdev, uint8_t ep_addr);
void USBD_LL_Delay (uint32_t Delay);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __USBD_CORE_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file usbd_req.h
* @author MCD Application Team
* @brief Header file for the usbd_req.c file
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2015 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* http://www.st.com/SLA0044
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USB_REQUEST_H
#define __USB_REQUEST_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "usbd_def.h"
/** @addtogroup STM32_USB_DEVICE_LIBRARY
* @{
*/
/** @defgroup USBD_REQ
* @brief header file for the usbd_req.c file
* @{
*/
/** @defgroup USBD_REQ_Exported_Defines
* @{
*/
/**
* @}
*/
/** @defgroup USBD_REQ_Exported_Types
* @{
*/
/**
* @}
*/
/** @defgroup USBD_REQ_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_REQ_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USBD_REQ_Exported_FunctionsPrototype
* @{
*/
USBD_StatusTypeDef USBD_StdDevReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req);
USBD_StatusTypeDef USBD_StdItfReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req);
USBD_StatusTypeDef USBD_StdEPReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req);
void USBD_CtlError (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req);
void USBD_ParseSetupRequest (USBD_SetupReqTypedef *req, uint8_t *pdata);
void USBD_GetString (uint8_t *desc, uint8_t *unicode, uint16_t *len);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __USB_REQUEST_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file usbd_def.h
* @author MCD Application Team
* @brief General defines for the usb device library
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2015 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* http://www.st.com/SLA0044
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_DEF_H
#define __USBD_DEF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "usbd_conf.h"
/** @addtogroup STM32_USBD_DEVICE_LIBRARY
* @{
*/
/** @defgroup USB_DEF
* @brief general defines for the usb device library file
* @{
*/
/** @defgroup USB_DEF_Exported_Defines
* @{
*/
#ifndef NULL
#define NULL 0U
#endif /* NULL */
#ifndef USBD_MAX_NUM_INTERFACES
#define USBD_MAX_NUM_INTERFACES 1U
#endif /* USBD_MAX_NUM_CONFIGURATION */
#ifndef USBD_MAX_NUM_CONFIGURATION
#define USBD_MAX_NUM_CONFIGURATION 1U
#endif /* USBD_MAX_NUM_CONFIGURATION */
#ifndef USBD_LPM_ENABLED
#define USBD_LPM_ENABLED 0U
#endif /* USBD_LPM_ENABLED */
#ifndef USBD_SELF_POWERED
#define USBD_SELF_POWERED 1U
#endif /*USBD_SELF_POWERED */
#ifndef USBD_SUPPORT_USER_STRING
#define USBD_SUPPORT_USER_STRING 0U
#endif /* USBD_SUPPORT_USER_STRING */
#define USB_LEN_DEV_QUALIFIER_DESC 0x0AU
#define USB_LEN_DEV_DESC 0x12U
#define USB_LEN_CFG_DESC 0x09U
#define USB_LEN_IF_DESC 0x09U
#define USB_LEN_EP_DESC 0x07U
#define USB_LEN_OTG_DESC 0x03U
#define USB_LEN_LANGID_STR_DESC 0x04U
#define USB_LEN_OTHER_SPEED_DESC_SIZ 0x09U
#define USBD_IDX_LANGID_STR 0x00U
#define USBD_IDX_MFC_STR 0x01U
#define USBD_IDX_PRODUCT_STR 0x02U
#define USBD_IDX_SERIAL_STR 0x03U
#define USBD_IDX_CONFIG_STR 0x04U
#define USBD_IDX_INTERFACE_STR 0x05U
#define USB_REQ_TYPE_STANDARD 0x00U
#define USB_REQ_TYPE_CLASS 0x20U
#define USB_REQ_TYPE_VENDOR 0x40U
#define USB_REQ_TYPE_MASK 0x60U
#define USB_REQ_RECIPIENT_DEVICE 0x00U
#define USB_REQ_RECIPIENT_INTERFACE 0x01U
#define USB_REQ_RECIPIENT_ENDPOINT 0x02U
#define USB_REQ_RECIPIENT_MASK 0x03U
#define USB_REQ_GET_STATUS 0x00U
#define USB_REQ_CLEAR_FEATURE 0x01U
#define USB_REQ_SET_FEATURE 0x03U
#define USB_REQ_SET_ADDRESS 0x05U
#define USB_REQ_GET_DESCRIPTOR 0x06U
#define USB_REQ_SET_DESCRIPTOR 0x07U
#define USB_REQ_GET_CONFIGURATION 0x08U
#define USB_REQ_SET_CONFIGURATION 0x09U
#define USB_REQ_GET_INTERFACE 0x0AU
#define USB_REQ_SET_INTERFACE 0x0BU
#define USB_REQ_SYNCH_FRAME 0x0CU
#define USB_DESC_TYPE_DEVICE 0x01U
#define USB_DESC_TYPE_CONFIGURATION 0x02U
#define USB_DESC_TYPE_STRING 0x03U
#define USB_DESC_TYPE_INTERFACE 0x04U
#define USB_DESC_TYPE_ENDPOINT 0x05U
#define USB_DESC_TYPE_DEVICE_QUALIFIER 0x06U
#define USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION 0x07U
#define USB_DESC_TYPE_BOS 0x0FU
#define USB_CONFIG_REMOTE_WAKEUP 0x02U
#define USB_CONFIG_SELF_POWERED 0x01U
#define USB_FEATURE_EP_HALT 0x00U
#define USB_FEATURE_REMOTE_WAKEUP 0x01U
#define USB_FEATURE_TEST_MODE 0x02U
#define USB_DEVICE_CAPABITY_TYPE 0x10U
#define USB_HS_MAX_PACKET_SIZE 512U
#define USB_FS_MAX_PACKET_SIZE 64U
#define USB_MAX_EP0_SIZE 64U
/* Device Status */
#define USBD_STATE_DEFAULT 0x01U
#define USBD_STATE_ADDRESSED 0x02U
#define USBD_STATE_CONFIGURED 0x03U
#define USBD_STATE_SUSPENDED 0x04U
/* EP0 State */
#define USBD_EP0_IDLE 0x00U
#define USBD_EP0_SETUP 0x01U
#define USBD_EP0_DATA_IN 0x02U
#define USBD_EP0_DATA_OUT 0x03U
#define USBD_EP0_STATUS_IN 0x04U
#define USBD_EP0_STATUS_OUT 0x05U
#define USBD_EP0_STALL 0x06U
#define USBD_EP_TYPE_CTRL 0x00U
#define USBD_EP_TYPE_ISOC 0x01U
#define USBD_EP_TYPE_BULK 0x02U
#define USBD_EP_TYPE_INTR 0x03U
/**
* @}
*/
/** @defgroup USBD_DEF_Exported_TypesDefinitions
* @{
*/
typedef struct usb_setup_req
{
uint8_t bmRequest;
uint8_t bRequest;
uint16_t wValue;
uint16_t wIndex;
uint16_t wLength;
}USBD_SetupReqTypedef;
struct _USBD_HandleTypeDef;
typedef struct _Device_cb
{
uint8_t (*Init) (struct _USBD_HandleTypeDef *pdev , uint8_t cfgidx);
uint8_t (*DeInit) (struct _USBD_HandleTypeDef *pdev , uint8_t cfgidx);
/* Control Endpoints*/
uint8_t (*Setup) (struct _USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req);
uint8_t (*EP0_TxSent) (struct _USBD_HandleTypeDef *pdev );
uint8_t (*EP0_RxReady) (struct _USBD_HandleTypeDef *pdev );
/* Class Specific Endpoints*/
uint8_t (*DataIn) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum);
uint8_t (*DataOut) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum);
uint8_t (*SOF) (struct _USBD_HandleTypeDef *pdev);
uint8_t (*IsoINIncomplete) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum);
uint8_t (*IsoOUTIncomplete) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum);
uint8_t *(*GetHSConfigDescriptor)(uint16_t *length);
uint8_t *(*GetFSConfigDescriptor)(uint16_t *length);
uint8_t *(*GetOtherSpeedConfigDescriptor)(uint16_t *length);
uint8_t *(*GetDeviceQualifierDescriptor)(uint16_t *length);
#if (USBD_SUPPORT_USER_STRING == 1U)
uint8_t *(*GetUsrStrDescriptor)(struct _USBD_HandleTypeDef *pdev ,uint8_t index, uint16_t *length);
#endif
} USBD_ClassTypeDef;
/* Following USB Device Speed */
typedef enum
{
USBD_SPEED_HIGH = 0U,
USBD_SPEED_FULL = 1U,
USBD_SPEED_LOW = 2U,
}USBD_SpeedTypeDef;
/* Following USB Device status */
typedef enum {
USBD_OK = 0U,
USBD_BUSY,
USBD_FAIL,
}USBD_StatusTypeDef;
/* USB Device descriptors structure */
typedef struct
{
uint8_t *(*GetDeviceDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length);
uint8_t *(*GetLangIDStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length);
uint8_t *(*GetManufacturerStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length);
uint8_t *(*GetProductStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length);
uint8_t *(*GetSerialStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length);
uint8_t *(*GetConfigurationStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length);
uint8_t *(*GetInterfaceStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length);
#if (USBD_LPM_ENABLED == 1U)
uint8_t *(*GetBOSDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length);
#endif
} USBD_DescriptorsTypeDef;
/* USB Device handle structure */
typedef struct
{
uint32_t status;
uint32_t is_used;
uint32_t total_length;
uint32_t rem_length;
uint32_t maxpacket;
} USBD_EndpointTypeDef;
/* USB Device handle structure */
typedef struct _USBD_HandleTypeDef
{
uint8_t id;
uint32_t dev_config;
uint32_t dev_default_config;
uint32_t dev_config_status;
USBD_SpeedTypeDef dev_speed;
USBD_EndpointTypeDef ep_in[15];
USBD_EndpointTypeDef ep_out[15];
uint32_t ep0_state;
uint32_t ep0_data_len;
uint8_t dev_state;
uint8_t dev_old_state;
uint8_t dev_address;
uint8_t dev_connection_status;
uint8_t dev_test_mode;
uint32_t dev_remote_wakeup;
USBD_SetupReqTypedef request;
USBD_DescriptorsTypeDef *pDesc;
USBD_ClassTypeDef *pClass;
void *pClassData;
void *pUserData;
void *pData;
} USBD_HandleTypeDef;
/**
* @}
*/
/** @defgroup USBD_DEF_Exported_Macros
* @{
*/
#define SWAPBYTE(addr) (((uint16_t)(*((uint8_t *)(addr)))) + \
(((uint16_t)(*(((uint8_t *)(addr)) + 1U))) << 8U))
#define LOBYTE(x) ((uint8_t)(x & 0x00FFU))
#define HIBYTE(x) ((uint8_t)((x & 0xFF00U) >> 8U))
#define MIN(a, b) (((a) < (b)) ? (a) : (b))
#define MAX(a, b) (((a) > (b)) ? (a) : (b))
#if defined ( __GNUC__ )
#ifndef __weak
#define __weak __attribute__((weak))
#endif /* __weak */
#ifndef __packed
#define __packed __attribute__((__packed__))
#endif /* __packed */
#endif /* __GNUC__ */
/* In HS mode and when the DMA is used, all variables and data structures dealing
with the DMA during the transaction process should be 4-bytes aligned */
#if defined (__GNUC__) /* GNU Compiler */
#define __ALIGN_END __attribute__ ((aligned (4)))
#define __ALIGN_BEGIN
#else
#define __ALIGN_END
#if defined (__CC_ARM) /* ARM Compiler */
#define __ALIGN_BEGIN __align(4)
#elif defined (__ICCARM__) /* IAR Compiler */
#define __ALIGN_BEGIN
#elif defined (__TASKING__) /* TASKING Compiler */
#define __ALIGN_BEGIN __align(4)
#endif /* __CC_ARM */
#endif /* __GNUC__ */
/**
* @}
*/
/** @defgroup USBD_DEF_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USBD_DEF_Exported_FunctionsPrototype
* @{
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __USBD_DEF_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : usbd_desc.c
* @version : v2.0_Cube
* @brief : Header for usbd_conf.c file.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* www.st.com/SLA0044
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_DESC__C__
#define __USBD_DESC__C__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "usbd_def.h"
/* USER CODE BEGIN INCLUDE */
/* USER CODE END INCLUDE */
/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
* @{
*/
/** @defgroup USBD_DESC USBD_DESC
* @brief Usb device descriptors module.
* @{
*/
/** @defgroup USBD_DESC_Exported_Constants USBD_DESC_Exported_Constants
* @brief Constants.
* @{
*/
#define DEVICE_ID1 (UID_BASE)
#define DEVICE_ID2 (UID_BASE + 0x4)
#define DEVICE_ID3 (UID_BASE + 0x8)
#define USB_SIZ_STRING_SERIAL 0x1A
/* USER CODE BEGIN EXPORTED_CONSTANTS */
/* USER CODE END EXPORTED_CONSTANTS */
/**
* @}
*/
/** @defgroup USBD_DESC_Exported_Defines USBD_DESC_Exported_Defines
* @brief Defines.
* @{
*/
/* USER CODE BEGIN EXPORTED_DEFINES */
/* USER CODE END EXPORTED_DEFINES */
/**
* @}
*/
/** @defgroup USBD_DESC_Exported_TypesDefinitions USBD_DESC_Exported_TypesDefinitions
* @brief Types.
* @{
*/
/* USER CODE BEGIN EXPORTED_TYPES */
/* USER CODE END EXPORTED_TYPES */
/**
* @}
*/
/** @defgroup USBD_DESC_Exported_Macros USBD_DESC_Exported_Macros
* @brief Aliases.
* @{
*/
/* USER CODE BEGIN EXPORTED_MACRO */
/* USER CODE END EXPORTED_MACRO */
/**
* @}
*/
/** @defgroup USBD_DESC_Exported_Variables USBD_DESC_Exported_Variables
* @brief Public variables.
* @{
*/
/** Descriptor for the Usb device. */
extern USBD_DescriptorsTypeDef FS_Desc;
/* USER CODE BEGIN EXPORTED_VARIABLES */
/* USER CODE END EXPORTED_VARIABLES */
/**
* @}
*/
/** @defgroup USBD_DESC_Exported_FunctionsPrototype USBD_DESC_Exported_FunctionsPrototype
* @brief Public functions declaration.
* @{
*/
/* USER CODE BEGIN EXPORTED_FUNCTIONS */
/* USER CODE END EXPORTED_FUNCTIONS */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __USBD_DESC__C__ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file usbd_ioreq.h
* @author MCD Application Team
* @brief Header file for the usbd_ioreq.c file
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2015 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* http://www.st.com/SLA0044
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_IOREQ_H
#define __USBD_IOREQ_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "usbd_def.h"
#include "usbd_core.h"
/** @addtogroup STM32_USB_DEVICE_LIBRARY
* @{
*/
/** @defgroup USBD_IOREQ
* @brief header file for the usbd_ioreq.c file
* @{
*/
/** @defgroup USBD_IOREQ_Exported_Defines
* @{
*/
/**
* @}
*/
/** @defgroup USBD_IOREQ_Exported_Types
* @{
*/
/**
* @}
*/
/** @defgroup USBD_IOREQ_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_IOREQ_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USBD_IOREQ_Exported_FunctionsPrototype
* @{
*/
USBD_StatusTypeDef USBD_CtlSendData (USBD_HandleTypeDef *pdev,
uint8_t *pbuf,
uint16_t len);
USBD_StatusTypeDef USBD_CtlContinueSendData (USBD_HandleTypeDef *pdev,
uint8_t *pbuf,
uint16_t len);
USBD_StatusTypeDef USBD_CtlPrepareRx (USBD_HandleTypeDef *pdev,
uint8_t *pbuf,
uint16_t len);
USBD_StatusTypeDef USBD_CtlContinueRx (USBD_HandleTypeDef *pdev,
uint8_t *pbuf,
uint16_t len);
USBD_StatusTypeDef USBD_CtlSendStatus (USBD_HandleTypeDef *pdev);
USBD_StatusTypeDef USBD_CtlReceiveStatus (USBD_HandleTypeDef *pdev);
uint32_t USBD_GetRxCount (USBD_HandleTypeDef *pdev, uint8_t ep_addr);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __USBD_IOREQ_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : usbd_conf.c
* @version : v2.0_Cube
* @brief : This file implements the board support package for the USB device library
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* www.st.com/SLA0044
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "stm32g4xx.h"
#include "stm32g4xx_hal.h"
#include "usbd_def.h"
#include "usbd_core.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* Private variables ---------------------------------------------------------*/
/* USER CODE END PV */
#define USB_HANDLE hpcd_USB_FS
extern PCD_HandleTypeDef USB_HANDLE;
void Error_Handler(void);
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* Exported function prototypes ----------------------------------------------*/
extern USBD_StatusTypeDef USBD_LL_BatteryCharging(USBD_HandleTypeDef *pdev);
/* USER CODE BEGIN PFP */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE END PFP */
/* Private functions ---------------------------------------------------------*/
/* USER CODE BEGIN 1 */
static void SystemClockConfig_Resume(void);
/* USER CODE END 1 */
extern void SystemClock_Config(void);
/*******************************************************************************
LL Driver Callbacks (PCD -> USB Device Library)
//*******************************************************************************/
///* MSP Init */
//
//void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
//{
// if(pcdHandle->Instance==USB)
// {
// /* USER CODE BEGIN USB_MspInit 0 */
//
// /* USER CODE END USB_MspInit 0 */
// /* Peripheral clock enable */
// __HAL_RCC_USB_CLK_ENABLE();
//
// /* Peripheral interrupt init */
// HAL_NVIC_SetPriority(USB_IRQn, 2, 0);
// HAL_NVIC_EnableIRQ(USB_IRQn);
// /* USER CODE BEGIN USB_MspInit 1 */
//
// /* USER CODE END USB_MspInit 1 */
// }
//}
//
//void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
//{
// if(pcdHandle->Instance==USB)
// {
// /* USER CODE BEGIN USB_MspDeInit 0 */
//
// /* USER CODE END USB_MspDeInit 0 */
// /* Peripheral clock disable */
// __HAL_RCC_USB_CLK_DISABLE();
//
// /* Peripheral interrupt Deinit*/
// HAL_NVIC_DisableIRQ(USB_IRQn);
//
// /* USER CODE BEGIN USB_MspDeInit 1 */
//
// /* USER CODE END USB_MspDeInit 1 */
// }
//}
//
/**
* @brief Setup stage callback
* @param hpcd: PCD handle
* @retval None
*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
}
/**
* @brief Data Out stage callback.
* @param hpcd: PCD handle
* @param epnum: Endpoint number
* @retval None
*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
}
/**
* @brief Data In stage callback.
* @param hpcd: PCD handle
* @param epnum: Endpoint number
* @retval None
*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
}
/**
* @brief SOF callback.
* @param hpcd: PCD handle
* @retval None
*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
}
/**
* @brief Reset callback.
* @param hpcd: PCD handle
* @retval None
*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
if ( hpcd->Init.speed != PCD_SPEED_FULL)
{
Error_Handler();
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
}
/**
* @brief Suspend callback.
* When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it)
* @param hpcd: PCD handle
* @retval None
*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
}
/* USER CODE END 2 */
}
/**
* @brief Resume callback.
* When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it)
* @param hpcd: PCD handle
* @retval None
*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
/* USER CODE BEGIN 3 */
if (hpcd->Init.low_power_enable)
{
/* Reset SLEEPDEEP bit of Cortex System Control Register. */
SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
SystemClockConfig_Resume();
}
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
}
/**
* @brief ISOOUTIncomplete callback.
* @param hpcd: PCD handle
* @param epnum: Endpoint number
* @retval None
*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
}
/**
* @brief ISOINIncomplete callback.
* @param hpcd: PCD handle
* @param epnum: Endpoint number
* @retval None
*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
}
/**
* @brief Connect callback.
* @param hpcd: PCD handle
* @retval None
*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData);
}
/**
* @brief Disconnect callback.
* @param hpcd: PCD handle
* @retval None
*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData);
}
static USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
if (hal_status == HAL_OK)
return USBD_OK;
else if (hal_status == HAL_BUSY)
return USBD_BUSY;
else
return USBD_FAIL;
}
/*******************************************************************************
LL Driver Interface (USB Device Library --> PCD)
*******************************************************************************/
/**
* @brief Initializes the Low Level portion of the Device driver.
* @param pdev: Device handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
// HAL_PWREx_EnableVddUSB();
USB_HANDLE.pData = pdev;
pdev->pData = &USB_HANDLE;
// HAL_PCDEx_SetRxFiFo(&USB_HANDLE, 1024 / 4);
// HAL_PCDEx_SetTxFiFo(&USB_HANDLE, 0, 1024 / 4);
// HAL_PCDEx_SetTxFiFo(&USB_HANDLE, 1, 1024 / 4);
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_CDC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x100);
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x140);
//HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
/* USER CODE END EndPoint_Configuration_CDC */
return USBD_OK;
}
/**
* @brief De-Initializes the Low Level portion of the Device driver.
* @param pdev: Device handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev)
{
HAL_StatusTypeDef const hal_status = HAL_PCD_DeInit(pdev->pData);
return USBD_Get_USB_Status(hal_status);
}
/**
* @brief Starts the Low Level portion of the Device driver.
* @param pdev: Device handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
HAL_StatusTypeDef const hal_status = HAL_PCD_Start(pdev->pData);
return USBD_Get_USB_Status(hal_status);
}
/**
* @brief Stops the Low Level portion of the Device driver.
* @param pdev: Device handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev)
{
HAL_StatusTypeDef const hal_status = HAL_PCD_Stop(pdev->pData);
return USBD_Get_USB_Status(hal_status);
}
/**
* @brief Opens an endpoint of the Low Level Driver.
* @param pdev: Device handle
* @param ep_addr: Endpoint Number
* @param ep_type: Endpoint Type
* @param ep_mps: Endpoint Max Packet Size
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr,
uint8_t ep_type, uint16_t ep_mps)
{
HAL_StatusTypeDef const hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
pdev->ep_in[ep_addr & 0x7F].is_used = 1;
return USBD_Get_USB_Status(hal_status);
}
/**
* @brief Closes an endpoint of the Low Level Driver.
* @param pdev: Device handle
* @param ep_addr: Endpoint Number
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
HAL_StatusTypeDef const hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
pdev->ep_in[ep_addr & 0x7F].is_used = 0;
return USBD_Get_USB_Status(hal_status);
}
/**
* @brief Flushes an endpoint of the Low Level Driver.
* @param pdev: Device handle
* @param ep_addr: Endpoint Number
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
HAL_StatusTypeDef const hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr);
return USBD_Get_USB_Status(hal_status);
}
/**
* @brief Sets a Stall condition on an endpoint of the Low Level Driver.
* @param pdev: Device handle
* @param ep_addr: Endpoint Number
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
HAL_StatusTypeDef const hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
return USBD_Get_USB_Status(hal_status);
}
/**
* @brief Clears a Stall condition on an endpoint of the Low Level Driver.
* @param pdev: Device handle
* @param ep_addr: Endpoint Number
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev,
uint8_t ep_addr)
{
HAL_StatusTypeDef const hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
return USBD_Get_USB_Status(hal_status);
}
/**
* @brief Returns Stall condition.
* @param pdev: Device handle
* @param ep_addr: Endpoint Number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
PCD_HandleTypeDef const *hpcd = pdev->pData;
return ep_addr & 0x80 ? hpcd->IN_ep[ep_addr & 0x7F].is_stall : hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
}
/**
* @brief Assigns a USB address to the device.
* @param pdev: Device handle
* @param ep_addr: Endpoint Number
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev,
uint8_t dev_addr)
{
HAL_StatusTypeDef const hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
return USBD_Get_USB_Status(hal_status);
}
/**
* @brief Transmits data over an endpoint.
* @param pdev: Device handle
* @param ep_addr: Endpoint Number
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr,
uint8_t *pbuf, uint16_t size)
{
HAL_StatusTypeDef const hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
return USBD_Get_USB_Status(hal_status);
}
/**
* @brief Prepares an endpoint for reception.
* @param pdev: Device handle
* @param ep_addr: Endpoint Number
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev,
uint8_t ep_addr, uint8_t *pbuf,
uint16_t size)
{
HAL_StatusTypeDef const hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
return USBD_Get_USB_Status(hal_status);
}
/**
* @brief Returns the last transferred packet size.
* @param pdev: Device handle
* @param ep_addr: Endpoint Number
* @retval Recived Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*)pdev->pData, ep_addr);
}
/**
* @brief Send LPM message to user layer
* @param hpcd: PCD handle
* @param msg: LPM message
* @retval None
*/
void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg)
{
switch (msg)
{
case PCD_LPM_L0_ACTIVE:
if (hpcd->Init.low_power_enable)
{
SystemClockConfig_Resume();
/* Reset SLEEPDEEP bit of Cortex System Control Register. */
SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
}
USBD_LL_Resume(hpcd->pData);
break;
case PCD_LPM_L1_ACTIVE:
USBD_LL_Suspend(hpcd->pData);
/* Enter in STOP mode. */
if (hpcd->Init.low_power_enable)
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
}
break;
}
}
/**
* @brief Delays routine for the USB Device Library.
* @param Delay: Delay in ms
* @retval None
*/
void USBD_LL_Delay(uint32_t Delay)
{
HAL_Delay(Delay);
}
/* USER CODE BEGIN 5 */
/**
* @brief Configures system clock after wake-up from USB resume callBack:
* enable HSI, PLL and select PLL as system clock source.
* @retval None
*/
static void SystemClockConfig_Resume(void)
{
SystemClock_Config();
}
/* USER CODE END 5 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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@ -0,0 +1,598 @@
/**
******************************************************************************
* @file usbd_core.c
* @author MCD Application Team
* @brief This file provides all the USBD core functions.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2015 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* http://www.st.com/SLA0044
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "usbd_core.h"
/** @addtogroup STM32_USBD_DEVICE_LIBRARY
* @{
*/
/** @defgroup USBD_CORE
* @brief usbd core module
* @{
*/
/** @defgroup USBD_CORE_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup USBD_CORE_Private_Defines
* @{
*/
/**
* @}
*/
/** @defgroup USBD_CORE_Private_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_CORE_Private_FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @defgroup USBD_CORE_Private_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USBD_CORE_Private_Functions
* @{
*/
/**
* @brief USBD_Init
* Initializes the device stack and load the class driver
* @param pdev: device instance
* @param pdesc: Descriptor structure address
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
/* Check whether the USB Host handle is valid */
if(pdev == NULL)
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
}
/* Unlink previous class*/
if(pdev->pClass != NULL)
{
pdev->pClass = NULL;
}
/* Assign USBD Descriptors */
if(pdesc != NULL)
{
pdev->pDesc = pdesc;
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
pdev->id = id;
/* Initialize low level driver */
USBD_LL_Init(pdev);
return USBD_OK;
}
/**
* @brief USBD_DeInit
* Re-Initialize th device library
* @param pdev: device instance
* @retval status: status
*/
USBD_StatusTypeDef USBD_DeInit(USBD_HandleTypeDef *pdev)
{
/* Set Default State */
pdev->dev_state = USBD_STATE_DEFAULT;
/* Free Class Resources */
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
/* Stop the low level driver */
USBD_LL_Stop(pdev);
/* Initialize low level driver */
USBD_LL_DeInit(pdev);
return USBD_OK;
}
/**
* @brief USBD_RegisterClass
* Link class driver to Device Core.
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
USBD_StatusTypeDef status = USBD_OK;
if(pclass != 0)
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
status = USBD_OK;
}
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
}
return status;
}
/**
* @brief USBD_Start
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start (USBD_HandleTypeDef *pdev)
{
/* Start the low level driver */
USBD_LL_Start(pdev);
return USBD_OK;
}
/**
* @brief USBD_Stop
* Stop the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Stop (USBD_HandleTypeDef *pdev)
{
/* Free Class Resources */
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
/* Stop the low level driver */
USBD_LL_Stop(pdev);
return USBD_OK;
}
/**
* @brief USBD_RunTestMode
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode (USBD_HandleTypeDef *pdev)
{
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
}
/**
* @brief USBD_SetClassConfig
* Configure device and start the interface
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
USBD_StatusTypeDef ret = USBD_FAIL;
if(pdev->pClass != NULL)
{
/* Set configuration and Start the Class*/
if(pdev->pClass->Init(pdev, cfgidx) == 0U)
{
ret = USBD_OK;
}
}
return ret;
}
/**
* @brief USBD_ClrClassConfig
* Clear current configuration
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
return USBD_OK;
}
/**
* @brief USBD_SetupStage
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
USBD_ParseSetupRequest(&pdev->request, psetup);
pdev->ep0_state = USBD_EP0_SETUP;
pdev->ep0_data_len = pdev->request.wLength;
switch (pdev->request.bmRequest & 0x1FU)
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq (pdev, &pdev->request);
break;
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
break;
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
break;
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
break;
}
return USBD_OK;
}
/**
* @brief USBD_DataOutStage
* Handle data OUT stage
* @param pdev: device instance
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
USBD_EndpointTypeDef *pep;
if(epnum == 0U)
{
pep = &pdev->ep_out[0];
if ( pdev->ep0_state == USBD_EP0_DATA_OUT)
{
if(pep->rem_length > pep->maxpacket)
{
pep->rem_length -= pep->maxpacket;
USBD_CtlContinueRx (pdev,
pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
}
else
{
if((pdev->pClass->EP0_RxReady != NULL)&&
(pdev->dev_state == USBD_STATE_CONFIGURED))
{
pdev->pClass->EP0_RxReady(pdev);
}
USBD_CtlSendStatus(pdev);
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
USBD_LL_StallEP(pdev, 0U);
}
}
}
else if((pdev->pClass->DataOut != NULL) &&
(pdev->dev_state == USBD_STATE_CONFIGURED))
{
pdev->pClass->DataOut(pdev, epnum);
}
else
{
/* should never be in this condition */
return USBD_FAIL;
}
return USBD_OK;
}
/**
* @brief USBD_DataInStage
* Handle data in stage
* @param pdev: device instance
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev, uint8_t epnum,
uint8_t *pdata)
{
USBD_EndpointTypeDef *pep;
if(epnum == 0U)
{
pep = &pdev->ep_in[0];
if ( pdev->ep0_state == USBD_EP0_DATA_IN)
{
if(pep->rem_length > pep->maxpacket)
{
pep->rem_length -= pep->maxpacket;
USBD_CtlContinueSendData (pdev, pdata, (uint16_t)pep->rem_length);
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive (pdev, 0U, NULL, 0U);
}
else
{ /* last packet is MPS multiple, so send ZLP packet */
if((pep->total_length % pep->maxpacket == 0U) &&
(pep->total_length >= pep->maxpacket) &&
(pep->total_length < pdev->ep0_data_len))
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
pdev->ep0_data_len = 0U;
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive (pdev, 0U, NULL, 0U);
}
else
{
if((pdev->pClass->EP0_TxSent != NULL)&&
(pdev->dev_state == USBD_STATE_CONFIGURED))
{
pdev->pClass->EP0_TxSent(pdev);
}
USBD_LL_StallEP(pdev, 0x80U);
USBD_CtlReceiveStatus(pdev);
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
(pdev->ep0_state == USBD_EP0_IDLE))
{
USBD_LL_StallEP(pdev, 0x80U);
}
}
if (pdev->dev_test_mode == 1U)
{
USBD_RunTestMode(pdev);
pdev->dev_test_mode = 0U;
}
}
else if((pdev->pClass->DataIn != NULL) &&
(pdev->dev_state == USBD_STATE_CONFIGURED))
{
pdev->pClass->DataIn(pdev, epnum);
}
else
{
/* should never be in this condition */
return USBD_FAIL;
}
return USBD_OK;
}
/**
* @brief USBD_LL_Reset
* Handle Reset event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
pdev->ep0_state = USBD_EP0_IDLE;
pdev->dev_config= 0U;
pdev->dev_remote_wakeup = 0U;
if (pdev->pClassData)
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
}
return USBD_OK;
}
/**
* @brief USBD_LL_Reset
* Handle Reset event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed)
{
pdev->dev_speed = speed;
return USBD_OK;
}
/**
* @brief USBD_Suspend
* Handle Suspend event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
pdev->dev_old_state = pdev->dev_state;
pdev->dev_state = USBD_STATE_SUSPENDED;
return USBD_OK;
}
/**
* @brief USBD_Resume
* Handle Resume event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
pdev->dev_state = pdev->dev_old_state;
return USBD_OK;
}
/**
* @brief USBD_SOF
* Handle SOF event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
if(pdev->dev_state == USBD_STATE_CONFIGURED)
{
if(pdev->pClass->SOF != NULL)
{
pdev->pClass->SOF(pdev);
}
}
return USBD_OK;
}
/**
* @brief USBD_IsoINIncomplete
* Handle iso in incomplete event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
/* Prevent unused arguments compilation warning */
UNUSED(pdev);
UNUSED(epnum);
return USBD_OK;
}
/**
* @brief USBD_IsoOUTIncomplete
* Handle iso out incomplete event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
/* Prevent unused arguments compilation warning */
UNUSED(pdev);
UNUSED(epnum);
return USBD_OK;
}
/**
* @brief USBD_DevConnected
* Handle device connection event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev)
{
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
}
/**
* @brief USBD_DevDisconnected
* Handle device disconnection event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev)
{
/* Free Class Resources */
pdev->dev_state = USBD_STATE_DEFAULT;
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
return USBD_OK;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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Software/VNA_embedded/Application/Drivers/USB/Core/Src/usbd_ctlreq.c Normal file
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@ -0,0 +1,848 @@
/**
******************************************************************************
* @file usbd_req.c
* @author MCD Application Team
* @brief This file provides the standard USB requests following chapter 9.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2015 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* http://www.st.com/SLA0044
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "usbd_ctlreq.h"
#include "usbd_ioreq.h"
/** @addtogroup STM32_USBD_STATE_DEVICE_LIBRARY
* @{
*/
/** @defgroup USBD_REQ
* @brief USB standard requests module
* @{
*/
/** @defgroup USBD_REQ_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup USBD_REQ_Private_Defines
* @{
*/
/**
* @}
*/
/** @defgroup USBD_REQ_Private_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_REQ_Private_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USBD_REQ_Private_FunctionPrototypes
* @{
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev ,
USBD_SetupReqTypedef *req);
static void USBD_SetAddress(USBD_HandleTypeDef *pdev ,
USBD_SetupReqTypedef *req);
static void USBD_SetConfig(USBD_HandleTypeDef *pdev ,
USBD_SetupReqTypedef *req);
static void USBD_GetConfig(USBD_HandleTypeDef *pdev ,
USBD_SetupReqTypedef *req);
static void USBD_GetStatus(USBD_HandleTypeDef *pdev ,
USBD_SetupReqTypedef *req);
static void USBD_SetFeature(USBD_HandleTypeDef *pdev ,
USBD_SetupReqTypedef *req);
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev ,
USBD_SetupReqTypedef *req);
static uint8_t USBD_GetLen(uint8_t *buf);
/**
* @}
*/
/** @defgroup USBD_REQ_Private_Functions
* @{
*/
/**
* @brief USBD_StdDevReq
* Handle standard usb device requests
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req)
{
USBD_StatusTypeDef ret = USBD_OK;
switch (req->bmRequest & USB_REQ_TYPE_MASK)
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
break;
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor (pdev, req);
break;
case USB_REQ_SET_ADDRESS:
USBD_SetAddress (pdev, req);
break;
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig (pdev, req);
break;
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig (pdev, req);
break;
case USB_REQ_GET_STATUS:
USBD_GetStatus (pdev, req);
break;
case USB_REQ_SET_FEATURE:
USBD_SetFeature (pdev, req);
break;
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature (pdev, req);
break;
default:
USBD_CtlError(pdev, req);
break;
}
break;
default:
USBD_CtlError(pdev, req);
break;
}
return ret;
}
/**
* @brief USBD_StdItfReq
* Handle standard usb interface requests
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req)
{
USBD_StatusTypeDef ret = USBD_OK;
switch (req->bmRequest & USB_REQ_TYPE_MASK)
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup (pdev, req);
if ((req->wLength == 0U) && (ret == USBD_OK))
{
USBD_CtlSendStatus(pdev);
}
}
else
{
USBD_CtlError(pdev, req);
}
break;
default:
USBD_CtlError(pdev, req);
break;
}
break;
default:
USBD_CtlError(pdev, req);
break;
}
return USBD_OK;
}
/**
* @brief USBD_StdEPReq
* Handle standard usb endpoint requests
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req)
{
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
USBD_EndpointTypeDef *pep;
ep_addr = LOBYTE(req->wIndex);
switch (req->bmRequest & USB_REQ_TYPE_MASK)
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup (pdev, req);
break;
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup (pdev, req);
return ret;
}
switch (req->bRequest)
{
case USB_REQ_SET_FEATURE :
switch (pdev->dev_state)
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
{
USBD_LL_StallEP(pdev, ep_addr);
USBD_LL_StallEP(pdev, 0x80U);
}
else
{
USBD_CtlError(pdev, req);
}
break;
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
{
if ((ep_addr != 0x00U) && (ep_addr != 0x80U) && (req->wLength == 0x00U))
{
USBD_LL_StallEP(pdev, ep_addr);
}
}
USBD_CtlSendStatus(pdev);
break;
default:
USBD_CtlError(pdev, req);
break;
}
break;
case USB_REQ_CLEAR_FEATURE :
switch (pdev->dev_state)
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
{
USBD_LL_StallEP(pdev, ep_addr);
USBD_LL_StallEP(pdev, 0x80U);
}
else
{
USBD_CtlError(pdev, req);
}
break;
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
{
if ((ep_addr & 0x7FU) != 0x00U)
{
USBD_LL_ClearStallEP(pdev, ep_addr);
}
USBD_CtlSendStatus(pdev);
}
break;
default:
USBD_CtlError(pdev, req);
break;
}
break;
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
{
USBD_CtlError(pdev, req);
break;
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU]:\
&pdev->ep_out[ep_addr & 0x7FU];
pep->status = 0x0000U;
USBD_CtlSendData (pdev, (uint8_t *)(void *)&pep->status, 2U);
break;
case USBD_STATE_CONFIGURED:
if((ep_addr & 0x80U) == 0x80U)
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
{
USBD_CtlError(pdev, req);
break;
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
{
USBD_CtlError(pdev, req);
break;
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU]:\
&pdev->ep_out[ep_addr & 0x7FU];
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
{
pep->status = 0x0000U;
}
else if(USBD_LL_IsStallEP(pdev, ep_addr))
{
pep->status = 0x0001U;
}
else
{
pep->status = 0x0000U;
}
USBD_CtlSendData (pdev, (uint8_t *)(void *)&pep->status, 2U);
break;
default:
USBD_CtlError(pdev, req);
break;
}
break;
default:
USBD_CtlError(pdev, req);
break;
}
break;
default:
USBD_CtlError(pdev, req);
break;
}
return ret;
}
/**
* @brief USBD_GetDescriptor
* Handle Get Descriptor requests
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev ,
USBD_SetupReqTypedef *req)
{
uint16_t len;
uint8_t *pbuf;
switch (req->wValue >> 8)
{
#if (USBD_LPM_ENABLED == 1U)
case USB_DESC_TYPE_BOS:
pbuf = pdev->pDesc->GetBOSDescriptor(pdev->dev_speed, &len);
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
break;
case USB_DESC_TYPE_CONFIGURATION:
if(pdev->dev_speed == USBD_SPEED_HIGH )
{
pbuf = (uint8_t *)pdev->pClass->GetHSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
else
{
pbuf = (uint8_t *)pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
{
case USBD_IDX_LANGID_STR:
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
break;
case USBD_IDX_MFC_STR:
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
break;
case USBD_IDX_PRODUCT_STR:
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
break;
case USBD_IDX_SERIAL_STR:
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
break;
case USBD_IDX_CONFIG_STR:
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
break;
case USBD_IDX_INTERFACE_STR:
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
break;
default:
#if (USBD_SUPPORT_USER_STRING == 1U)
pbuf = pdev->pClass->GetUsrStrDescriptor(pdev, (req->wValue) , &len);
break;
#else
USBD_CtlError(pdev , req);
return;
#endif
}
break;
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if(pdev->dev_speed == USBD_SPEED_HIGH)
{
pbuf = (uint8_t *)pdev->pClass->GetDeviceQualifierDescriptor(&len);
break;
}
else
{
USBD_CtlError(pdev , req);
return;
}
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if(pdev->dev_speed == USBD_SPEED_HIGH )
{
pbuf = (uint8_t *)pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
break;
}
else
{
USBD_CtlError(pdev , req);
return;
}
default:
USBD_CtlError(pdev , req);
return;
}
if((len != 0U) && (req->wLength != 0U))
{
len = MIN(len, req->wLength);
USBD_CtlSendData (pdev, pbuf, len);
}
if(req->wLength == 0U)
{
USBD_CtlSendStatus(pdev);
}
}
/**
* @brief USBD_SetAddress
* Set device address
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev ,
USBD_SetupReqTypedef *req)
{
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
if (pdev->dev_state == USBD_STATE_CONFIGURED)
{
USBD_CtlError(pdev , req);
}
else
{
pdev->dev_address = dev_addr;
USBD_LL_SetUSBAddress(pdev, dev_addr);
USBD_CtlSendStatus(pdev);
if (dev_addr != 0U)
{
pdev->dev_state = USBD_STATE_ADDRESSED;
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
}
}
}
else
{
USBD_CtlError(pdev, req);
}
}
/**
* @brief USBD_SetConfig
* Handle Set device configuration request
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
{
USBD_CtlError(pdev, req);
}
else
{
switch (pdev->dev_state)
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
{
pdev->dev_config = cfgidx;
pdev->dev_state = USBD_STATE_CONFIGURED;
if(USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
{
USBD_CtlError(pdev, req);
return;
}
USBD_CtlSendStatus(pdev);
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
{
pdev->dev_state = USBD_STATE_ADDRESSED;
pdev->dev_config = cfgidx;
USBD_ClrClassConfig(pdev, cfgidx);
USBD_CtlSendStatus(pdev);
}
else if (cfgidx != pdev->dev_config)
{
/* Clear old configuration */
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
/* set new configuration */
pdev->dev_config = cfgidx;
if(USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
{
USBD_CtlError(pdev, req);
return;
}
USBD_CtlSendStatus(pdev);
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
default:
USBD_CtlError(pdev, req);
USBD_ClrClassConfig(pdev, cfgidx);
break;
}
}
}
/**
* @brief USBD_GetConfig
* Handle Get device configuration request
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
if (req->wLength != 1U)
{
USBD_CtlError(pdev , req);
}
else
{
switch (pdev->dev_state)
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
pdev->dev_default_config = 0U;
USBD_CtlSendData (pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
break;
case USBD_STATE_CONFIGURED:
USBD_CtlSendData (pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
break;
default:
USBD_CtlError(pdev , req);
break;
}
}
}
/**
* @brief USBD_GetStatus
* Handle Get Status request
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
switch (pdev->dev_state)
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if(req->wLength != 0x2U)
{
USBD_CtlError(pdev, req);
break;
}
#if ( USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
}
USBD_CtlSendData (pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
break;
default :
USBD_CtlError(pdev , req);
break;
}
}
/**
* @brief USBD_SetFeature
* Handle Set device feature request
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev ,
USBD_SetupReqTypedef *req)
{
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
{
pdev->dev_remote_wakeup = 1U;
USBD_CtlSendStatus(pdev);
}
}
/**
* @brief USBD_ClrFeature
* Handle clear device feature request
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev ,
USBD_SetupReqTypedef *req)
{
switch (pdev->dev_state)
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
{
pdev->dev_remote_wakeup = 0U;
USBD_CtlSendStatus(pdev);
}
break;
default :
USBD_CtlError(pdev , req);
break;
}
}
/**
* @brief USBD_ParseSetupRequest
* Copy buffer into setup structure
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
req->bmRequest = *(uint8_t *) (pdata);
req->bRequest = *(uint8_t *) (pdata + 1);
req->wValue = SWAPBYTE (pdata + 2);
req->wIndex = SWAPBYTE (pdata + 4);
req->wLength = SWAPBYTE (pdata + 6);
}
/**
* @brief USBD_CtlError
* Handle USB low level Error
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
void USBD_CtlError( USBD_HandleTypeDef *pdev ,
USBD_SetupReqTypedef *req)
{
USBD_LL_StallEP(pdev , 0x80U);
USBD_LL_StallEP(pdev , 0U);
}
/**
* @brief USBD_GetString
* Convert Ascii string into unicode one
* @param desc : descriptor buffer
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
uint8_t idx = 0U;
if (desc != NULL)
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
unicode[idx++] = *(uint8_t *)(void *)len;
unicode[idx++] = USB_DESC_TYPE_STRING;
while (*desc != '\0')
{
unicode[idx++] = *desc++;
unicode[idx++] = 0U;
}
}
}
/**
* @brief USBD_GetLen
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
uint8_t len = 0U;
while (*buf != '\0')
{
len++;
buf++;
}
return len;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : usbd_desc.c
* @version : v2.0_Cube
* @brief : This file implements the USB device descriptors.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* www.st.com/SLA0044
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "usbd_core.h"
#include "usbd_desc.h"
#include "usbd_conf.h"
/* USER CODE BEGIN INCLUDE */
/* USER CODE END INCLUDE */
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* Private variables ---------------------------------------------------------*/
/* USER CODE END PV */
/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
* @{
*/
/** @addtogroup USBD_DESC
* @{
*/
/** @defgroup USBD_DESC_Private_TypesDefinitions USBD_DESC_Private_TypesDefinitions
* @brief Private types.
* @{
*/
/* USER CODE BEGIN PRIVATE_TYPES */
/* USER CODE END PRIVATE_TYPES */
/**
* @}
*/
/** @defgroup USBD_DESC_Private_Defines USBD_DESC_Private_Defines
* @brief Private defines.
* @{
*/
#define USBD_VID 0x0483
#define USBD_PID_FS 0x564E
#define USBD_LANGID_STRING 0x0409
#define USBD_MANUFACTURER_STRING "STMicroelectronics"
#define USBD_PRODUCT_STRING_FS "VNA"
#define USBD_CONFIGURATION_STRING_FS "CustomUSBDevice Config"
#define USBD_INTERFACE_STRING_FS "CustomUSBDevice Interface"
#define USB_SIZ_BOS_DESC 0x0C
/* USER CODE BEGIN PRIVATE_DEFINES */
/* USER CODE END PRIVATE_DEFINES */
/**
* @}
*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/** @defgroup USBD_DESC_Private_Macros USBD_DESC_Private_Macros
* @brief Private macros.
* @{
*/
/* USER CODE BEGIN PRIVATE_MACRO */
/* USER CODE END PRIVATE_MACRO */
/**
* @}
*/
/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes
* @brief Private functions declaration.
* @{
*/
static void Get_SerialNum(void);
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len);
/**
* @}
*/
/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes
* @brief Private functions declaration for FS.
* @{
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
#ifdef USBD_SUPPORT_USER_STRING_DESC
uint8_t * USBD_FS_USRStringDesc(USBD_SpeedTypeDef speed, uint8_t idx, uint16_t *length);
#endif /* USBD_SUPPORT_USER_STRING_DESC */
#if (USBD_LPM_ENABLED == 1)
uint8_t * USBD_FS_USR_BOSDescriptor(USBD_SpeedTypeDef speed, uint16_t *length);
#endif /* (USBD_LPM_ENABLED == 1) */
/**
* @}
*/
/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables
* @brief Private variables.
* @{
*/
USBD_DescriptorsTypeDef FS_Desc =
{
USBD_FS_DeviceDescriptor
, USBD_FS_LangIDStrDescriptor
, USBD_FS_ManufacturerStrDescriptor
, USBD_FS_ProductStrDescriptor
, USBD_FS_SerialStrDescriptor
, USBD_FS_ConfigStrDescriptor
, USBD_FS_InterfaceStrDescriptor
#if (USBD_LPM_ENABLED == 1)
, USBD_FS_USR_BOSDescriptor
#endif /* (USBD_LPM_ENABLED == 1) */
};
#if defined ( __ICCARM__ ) /* IAR Compiler */
#pragma data_alignment=4
#endif /* defined ( __ICCARM__ ) */
/** USB standard device descriptor. */
__ALIGN_BEGIN uint8_t USBD_FS_DeviceDesc[USB_LEN_DEV_DESC] __ALIGN_END =
{
0x12, /*bLength */
USB_DESC_TYPE_DEVICE, /*bDescriptorType*/
#if (USBD_LPM_ENABLED == 1)
0x01, /*bcdUSB */ /* changed to USB version 2.01
in order to support LPM L1 suspend
resume test of USBCV3.0*/
#else
0x00, /*bcdUSB */
#endif /* (USBD_LPM_ENABLED == 1) */
0x02,
0xFF, /*bDeviceClass*/
0x00, /*bDeviceSubClass*/
0x00, /*bDeviceProtocol*/
USB_MAX_EP0_SIZE, /*bMaxPacketSize*/
LOBYTE(USBD_VID), /*idVendor*/
HIBYTE(USBD_VID), /*idVendor*/
LOBYTE(USBD_PID_FS), /*idProduct*/
HIBYTE(USBD_PID_FS), /*idProduct*/
0x00, /*bcdDevice rel. 2.00*/
0x02,
USBD_IDX_MFC_STR, /*Index of manufacturer string*/
USBD_IDX_PRODUCT_STR, /*Index of product string*/
USBD_IDX_SERIAL_STR, /*Index of serial number string*/
USBD_MAX_NUM_CONFIGURATION /*bNumConfigurations*/
};
/* USB_DeviceDescriptor */
/** BOS descriptor. */
#if (USBD_LPM_ENABLED == 1)
#if defined ( __ICCARM__ ) /* IAR Compiler */
#pragma data_alignment=4
#endif /* defined ( __ICCARM__ ) */
__ALIGN_BEGIN uint8_t USBD_FS_BOSDesc[USB_SIZ_BOS_DESC] __ALIGN_END =
{
0x5,
USB_DESC_TYPE_BOS,
0xC,
0x0,
0x1, /* 1 device capability*/
/* device capability*/
0x7,
USB_DEVICE_CAPABITY_TYPE,
0x2,
0x2, /* LPM capability bit set*/
0x0,
0x0,
0x0
};
#endif /* (USBD_LPM_ENABLED == 1) */
/**
* @}
*/
/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables
* @brief Private variables.
* @{
*/
#if defined ( __ICCARM__ ) /* IAR Compiler */
#pragma data_alignment=4
#endif /* defined ( __ICCARM__ ) */
/** USB lang indentifier descriptor. */
__ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END =
{
USB_LEN_LANGID_STR_DESC,
USB_DESC_TYPE_STRING,
LOBYTE(USBD_LANGID_STRING),
HIBYTE(USBD_LANGID_STRING)
};
#if defined ( __ICCARM__ ) /* IAR Compiler */
#pragma data_alignment=4
#endif /* defined ( __ICCARM__ ) */
/* Internal string descriptor. */
__ALIGN_BEGIN uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END;
#if defined ( __ICCARM__ ) /*!< IAR Compiler */
#pragma data_alignment=4
#endif
__ALIGN_BEGIN uint8_t USBD_StringSerial[USB_SIZ_STRING_SERIAL] __ALIGN_END = {
USB_SIZ_STRING_SERIAL,
USB_DESC_TYPE_STRING,
};
/**
* @}
*/
/** @defgroup USBD_DESC_Private_Functions USBD_DESC_Private_Functions
* @brief Private functions.
* @{
*/
/**
* @brief Return the device descriptor
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
return USBD_FS_DeviceDesc;
}
/**
* @brief Return the LangID string descriptor
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
return USBD_LangIDDesc;
}
/**
* @brief Return the product string descriptor
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
if(speed == 0)
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
}
return USBD_StrDesc;
}
/**
* @brief Return the manufacturer string descriptor
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
return USBD_StrDesc;
}
/**
* @brief Return the serial number string descriptor
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
return (uint8_t *) USBD_StringSerial;
}
/**
* @brief Return the configuration string descriptor
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
if(speed == USBD_SPEED_HIGH)
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
}
return USBD_StrDesc;
}
/**
* @brief Return the interface string descriptor
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
if(speed == 0)
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
}
return USBD_StrDesc;
}
#if (USBD_LPM_ENABLED == 1)
/**
* @brief Return the BOS descriptor
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_USR_BOSDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
UNUSED(speed);
*length = sizeof(USBD_FS_BOSDesc);
return (uint8_t*)USBD_FS_BOSDesc;
}
#endif /* (USBD_LPM_ENABLED == 1) */
/**
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
uint32_t deviceserial0, deviceserial1, deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
deviceserial1 = *(uint32_t *) DEVICE_ID2;
deviceserial2 = *(uint32_t *) DEVICE_ID3;
deviceserial0 += deviceserial2;
if (deviceserial0 != 0)
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
}
}
/**
* @brief Convert Hex 32Bits value into char
* @param value: value to convert
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
uint8_t idx = 0;
for (idx = 0; idx < len; idx++)
{
if (((value >> 28)) < 0xA)
{
pbuf[2 * idx] = (value >> 28) + '0';
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
}
value = value << 4;
pbuf[2 * idx + 1] = 0;
}
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file usbd_ioreq.c
* @author MCD Application Team
* @brief This file provides the IO requests APIs for control endpoints.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2015 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* http://www.st.com/SLA0044
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "usbd_ioreq.h"
/** @addtogroup STM32_USB_DEVICE_LIBRARY
* @{
*/
/** @defgroup USBD_IOREQ
* @brief control I/O requests module
* @{
*/
/** @defgroup USBD_IOREQ_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup USBD_IOREQ_Private_Defines
* @{
*/
/**
* @}
*/
/** @defgroup USBD_IOREQ_Private_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_IOREQ_Private_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USBD_IOREQ_Private_FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @defgroup USBD_IOREQ_Private_Functions
* @{
*/
/**
* @brief USBD_CtlSendData
* send data on the ctl pipe
* @param pdev: device instance
* @param buff: pointer to data buffer
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData (USBD_HandleTypeDef *pdev, uint8_t *pbuf,
uint16_t len)
{
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
pdev->ep_in[0].total_length = len;
pdev->ep_in[0].rem_length = len;
/* Start the transfer */
USBD_LL_Transmit (pdev, 0x00U, pbuf, len);
return USBD_OK;
}
/**
* @brief USBD_CtlContinueSendData
* continue sending data on the ctl pipe
* @param pdev: device instance
* @param buff: pointer to data buffer
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData (USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
/* Start the next transfer */
USBD_LL_Transmit (pdev, 0x00U, pbuf, len);
return USBD_OK;
}
/**
* @brief USBD_CtlPrepareRx
* receive data on the ctl pipe
* @param pdev: device instance
* @param buff: pointer to data buffer
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx (USBD_HandleTypeDef *pdev, uint8_t *pbuf,
uint16_t len)
{
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
pdev->ep_out[0].total_length = len;
pdev->ep_out[0].rem_length = len;
/* Start the transfer */
USBD_LL_PrepareReceive (pdev, 0U, pbuf, len);
return USBD_OK;
}
/**
* @brief USBD_CtlContinueRx
* continue receive data on the ctl pipe
* @param pdev: device instance
* @param buff: pointer to data buffer
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx (USBD_HandleTypeDef *pdev, uint8_t *pbuf,
uint16_t len)
{
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
return USBD_OK;
}
/**
* @brief USBD_CtlSendStatus
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus (USBD_HandleTypeDef *pdev)
{
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
return USBD_OK;
}
/**
* @brief USBD_CtlReceiveStatus
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus (USBD_HandleTypeDef *pdev)
{
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
/* Start the transfer */
USBD_LL_PrepareReceive (pdev, 0U, NULL, 0U);
return USBD_OK;
}
/**
* @brief USBD_GetRxCount
* returns the received data length
* @param pdev: device instance
* @param ep_addr: endpoint address
* @retval Rx Data blength
*/
uint32_t USBD_GetRxCount (USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
return USBD_LL_GetRxDataSize(pdev, ep_addr);
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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#include "usb.h"
#include "usbd_desc.h"
#include "usbd_core.h"
USBD_HandleTypeDef hUsbDeviceFS;
#define EP_DATA_IN_ADDRESS 0x81
#define EP_DATA_OUT_ADDRESS 0x01
#define EP_LOG_IN_ADDRESS 0x82
static uint8_t USBD_Class_Init (USBD_HandleTypeDef *pdev, uint8_t cfgidx);
static uint8_t USBD_Class_DeInit (USBD_HandleTypeDef *pdev, uint8_t cfgidx);
static uint8_t USBD_Class_DataIn (USBD_HandleTypeDef *pdev, uint8_t epnum);
static uint8_t USBD_Class_DataOut (USBD_HandleTypeDef *pdev, uint8_t epnum);
static uint8_t *USBD_Class_GetFSCfgDesc (uint16_t *length);
static uint8_t *USBD_Class_GetDeviceQualifierDescriptor (uint16_t *length);
static usbd_callback_t cb;
static uint8_t usb_receive_buffer[1024];
static bool data_transmission_active = false;
static bool log_transmission_active = true;
USBD_ClassTypeDef USBD_ClassDriver =
{
USBD_Class_Init,
USBD_Class_DeInit,
NULL,
NULL,
NULL,
USBD_Class_DataIn,
USBD_Class_DataOut,
NULL,
NULL,
NULL,
NULL,
USBD_Class_GetFSCfgDesc,
NULL,
USBD_Class_GetDeviceQualifierDescriptor,
};
/* USB Standard Device Descriptor */
__ALIGN_BEGIN static uint8_t USBD_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC] __ALIGN_END =
{
USB_LEN_DEV_QUALIFIER_DESC,
USB_DESC_TYPE_DEVICE_QUALIFIER,
0x00,
0x02,
0x00,
0x00,
0x00,
0x40,
0x01,
0x00,
};
#define USB_CONFIG_DESC_SIZ 39
/* USB CDC device Configuration Descriptor */
__ALIGN_BEGIN uint8_t USBD_CfgFSDesc[USB_CONFIG_DESC_SIZ] __ALIGN_END =
{
0x09, /* bLength: Configuation Descriptor size */
USB_DESC_TYPE_CONFIGURATION, /* bDescriptorType: Configuration */
USB_CONFIG_DESC_SIZ, /* wTotalLength: Bytes returned */
0x00,
0x01, /*bNumInterfaces: 1 interface*/
0x01, /*bConfigurationValue: Configuration value*/
0x00, /*iConfiguration */
0xC0, /*bmAttributes: bus powered and Supports Remote Wakeup */
0x32, /*MaxPower 100 mA: this current is used for detecting Vbus*/
/* Interface */
0x09, /* bLength */
USB_DESC_TYPE_INTERFACE, /* bDescriptorType: */
0x00, /* bInterfaceNumber */
0x00, /* bAlternateSetting */
0x03, /* bNumEndpoints */
0xFF, /* bInterfaceClass */
0x00, /* bInterfaceSubClass */
0x00, /* bInterfaceProtocol */
0x00, /* iInterface */
/* Endpoint Data OUT */
0x07, /* bLength */
USB_DESC_TYPE_ENDPOINT, /* bDescriptorType */
EP_DATA_OUT_ADDRESS, /* bEndpointAddress */
0x02, /* bmAttributes */
LOBYTE(USB_FS_MAX_PACKET_SIZE), /* wMaxPacketSize */
HIBYTE(USB_FS_MAX_PACKET_SIZE),
0x00, /* bInterval */
/* Endpoint Data IN */
0x07, /* bLength */
USB_DESC_TYPE_ENDPOINT, /* bDescriptorType */
EP_DATA_IN_ADDRESS, /* bEndpointAddress */
0x02, /* bmAttributes */
LOBYTE(USB_FS_MAX_PACKET_SIZE), /* wMaxPacketSize */
HIBYTE(USB_FS_MAX_PACKET_SIZE),
0x00, /* bInterval */
/* Endpoint logging IN */
0x07, /* bLength */
USB_DESC_TYPE_ENDPOINT, /* bDescriptorType */
EP_LOG_IN_ADDRESS, /* bEndpointAddress */
0x02, /* bmAttributes */
LOBYTE(USB_FS_MAX_PACKET_SIZE), /* wMaxPacketSize */
HIBYTE(USB_FS_MAX_PACKET_SIZE),
0x00 /* bInterval */
};
static uint8_t USBD_Class_Init (USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
// Open endpoints and start reception
USBD_LL_OpenEP(pdev, EP_DATA_IN_ADDRESS, USBD_EP_TYPE_BULK, USB_FS_MAX_PACKET_SIZE);
USBD_LL_OpenEP(pdev, EP_DATA_OUT_ADDRESS, USBD_EP_TYPE_BULK, USB_FS_MAX_PACKET_SIZE);
USBD_LL_OpenEP(pdev, EP_LOG_IN_ADDRESS, USBD_EP_TYPE_BULK, USB_FS_MAX_PACKET_SIZE);
USBD_LL_PrepareReceive(pdev, EP_DATA_OUT_ADDRESS, usb_receive_buffer, USB_FS_MAX_PACKET_SIZE);
return USBD_OK;
}
static uint8_t USBD_Class_DeInit(USBD_HandleTypeDef *pdev,
uint8_t cfgidx)
{
USBD_LL_CloseEP(pdev, EP_DATA_IN_ADDRESS);
USBD_LL_CloseEP(pdev, EP_DATA_OUT_ADDRESS);
USBD_LL_CloseEP(pdev, EP_LOG_IN_ADDRESS);
return USBD_OK;
}
static uint8_t USBD_Class_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum) {
// A bulk transfer is complete when the endpoint does on of the following:
// - Has transferred exactly the amount of data expected
// - Transfers a packet with a payload size less than wMaxPacketSize or transfers a zero-length packet
if (pdev->ep_in[epnum].total_length
&& !(pdev->ep_in[epnum].total_length % USB_FS_MAX_PACKET_SIZE)) {
pdev->ep_in[epnum].total_length = 0;
USBD_LL_Transmit(pdev, epnum, NULL, 0);
} else {
if(epnum == (EP_DATA_IN_ADDRESS & 0x7F)) {
data_transmission_active = false;
} else {
log_transmission_active = false;
}
}
return USBD_OK;
}
static uint8_t USBD_Class_DataOut(USBD_HandleTypeDef *pdev,
uint8_t epnum)
{
if(cb) {
cb(usb_receive_buffer, USBD_LL_GetRxDataSize (pdev, epnum));
}
USBD_LL_PrepareReceive(pdev, EP_DATA_OUT_ADDRESS, usb_receive_buffer, USB_FS_MAX_PACKET_SIZE);
return USBD_OK;
}
static uint8_t *USBD_Class_GetFSCfgDesc(uint16_t *length)
{
*length = sizeof(USBD_CfgFSDesc);
return USBD_CfgFSDesc;
}
static uint8_t *USBD_Class_GetDeviceQualifierDescriptor(uint16_t *length)
{
*length = sizeof(USBD_DeviceQualifierDesc);
return USBD_DeviceQualifierDesc;
}
void usb_init(usbd_callback_t callback) {
cb = callback;
USBD_Init(&hUsbDeviceFS, &FS_Desc, 0);
USBD_RegisterClass(&hUsbDeviceFS, &USBD_ClassDriver);
USBD_Start(&hUsbDeviceFS);
HAL_NVIC_EnableIRQ(USB_HP_IRQn);
HAL_NVIC_EnableIRQ(USB_LP_IRQn);
}
bool usb_transmit(const uint8_t *data, uint16_t length) {
static bool first = true;
if(first) {
log_transmission_active = false;
first = false;
}
if(!data_transmission_active) {
data_transmission_active = true;
hUsbDeviceFS.ep_in[EP_DATA_IN_ADDRESS & 0x7F].total_length = length;
return USBD_LL_Transmit(&hUsbDeviceFS, EP_DATA_IN_ADDRESS, (uint8_t*) data, length) == USBD_OK;
} else {
// already have an ongoing transmission
return false;
}
}
void usb_log(const char *log, uint16_t length) {
if(!log_transmission_active) {
static uint8_t buffer[256];
memcpy(buffer, log, length);
log_transmission_active = true;
hUsbDeviceFS.ep_in[EP_LOG_IN_ADDRESS & 0x7F].total_length = length;
USBD_LL_Transmit(&hUsbDeviceFS, EP_LOG_IN_ADDRESS, buffer, length);
} else {
// still busy, unable to send log
}
}

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/*
* usb.h
*
* Created on: Aug 12, 2020
* Author: jan
*/
#ifndef DRIVERS_USB_USB_H_
#define DRIVERS_USB_USB_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stdbool.h>
typedef void(*usbd_callback_t)(const uint8_t *buf, uint16_t len);
void usb_init(usbd_callback_t callback);
bool usb_transmit(const uint8_t *data, uint16_t length);
void usb_log(const char *log, uint16_t length);
#ifdef __cplusplus
}
#endif
#endif /* DRIVERS_USB_USB_H_ */

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#include "algorithm.hpp"
#include "stm.hpp"
#include <cmath>
Algorithm::RationalApproximation Algorithm::BestRationalApproximation(float ratio, uint32_t max_denom) {
RationalApproximation result;
uint32_t a = 0, b = 1, c = 1, d = 1;
while (b + d <= max_denom) {
auto mediant = (float) (a + c) / (b + d);
if (ratio == mediant) {
if (b + d <= max_denom) {
result.num = a + c;
result.denom = b + d;
return result;
} else if (d > b) {
result.num = c;
result.denom = d;
return result;
} else {
result.num = a;
result.denom = b;
return result;
}
} else if (ratio > mediant) {
a = a + c;
b = b + d;
} else {
c = a + c;
d = b + d;
}
}
// check which of the two is the better solution
float dev_ab = (float) a / b - ratio;
float dev_cd = (float) c / d - ratio;
if(fabs(dev_cd) < fabs(dev_ab)) {
result.num = c;
result.denom = d;
} else {
result.num = a;
result.denom = b;
}
return result;
}

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#pragma once
#include <stdint.h>
namespace Algorithm {
using RationalApproximation = struct _rationalapproximation {
uint32_t num;
uint32_t denom;
};
RationalApproximation BestRationalApproximation(float ratio, uint32_t max_denom);
}

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#include "delay.hpp"
#include "stm.hpp"
void Delay::ms(uint32_t t) {
while(t--) {
us(1000);
}
}
void Delay::us(uint32_t t) {
TIM1->CNT = 0;
TIM1->CR1 |= TIM_CR1_CEN;
while (TIM1->CNT < t)
;
TIM1->CR1 &= ~TIM_CR1_CEN;
}

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#pragma once
#include <stdint.h>
namespace Delay {
void ms(uint32_t t);
void us(uint32_t t);
}

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#include "max2871.hpp"
#include <string.h>
#include <algorithm.hpp>
#include "delay.hpp"
#include <cmath>
#define LOG_LEVEL LOG_LEVEL_WARN
#define LOG_MODULE "MAX2871"
#include "Log.h"
bool MAX2871::Init() {
return Init(10000000, true, 1, false);
}
bool MAX2871::Init(uint32_t f_ref, bool doubler, uint16_t r, bool div2) {
for (uint8_t i = 0; i < 6; i++) {
regs[i] = 0;
}
ChipEnable(false);
RFEnable(false);
SetReference(f_ref, doubler, r, div2);
// non-inverting loop filter
regs[2] |= (1UL << 6);
// select digital lock detect
regs[5] |= (0x1UL << 22);
// fundamental VCO feedback
regs[4] |= (1UL << 23);
// reserved, set to 0x03
regs[4] |= (0x3UL << 29);
// enable double buffering for register 4
regs[2] |= (1UL << 13);
// automatically switch to integer mode if F = 0
regs[5] |= (1UL << 24);
SetMode(Mode::LowSpur2);
// for all other CP modes the PLL reports unlock condition (output signal appears to be locked)
SetCPMode(CPMode::CP20);
SetCPCurrent(15);
SetFrequency(1000000000);
// initial register write according to datasheet timing
ChipEnable(true);
Write(5, regs[5]);
Delay::ms(20);
Write(4, regs[4]);
Write(3, regs[3]);
Write(2, regs[2]);
Write(1, regs[1]);
Write(0, regs[0]);
Write(5, regs[5]);
Delay::ms(20);
Write(4, regs[4]);
Write(3, regs[3]);
Write(2, regs[2]);
Write(1, regs[1]);
Write(0, regs[0]);
return true;
}
void MAX2871::ChipEnable(bool on) {
if(!CE) {
return;
}
if (on) {
CE->BSRR = CEpin;
} else {
CE->BSRR = CEpin << 16;
}
}
void MAX2871::RFEnable(bool on) {
if(!RF_EN) {
return;
}
if (on) {
RF_EN->BSRR = RF_ENpin;
Read();
} else {
RF_EN->BSRR = RF_ENpin << 16;
}
}
bool MAX2871::Locked() {
return LD->IDR & LDpin;
}
void MAX2871::SetPowerOutA(Power p, bool enabled) {
// only set power of port A
regs[4] &= ~0x38;
regs[4] |= ((uint16_t) p << 3);
if (enabled) {
regs[4] |= 0x20;
}
}
void MAX2871::SetPowerOutB(Power p, bool enabled) {
// only set power of port B
regs[4] &= ~0x1C0;
regs[4] |= ((uint16_t) p << 6);
if (enabled) {
regs[4] |= 0x100;
}
}
void MAX2871::SetMode(Mode m) {
regs[2] &= ~0x60000000;
regs[2] |= ((uint32_t) m << 29);
}
void MAX2871::SetCPMode(CPMode m) {
regs[1] &= ~0x60000000;
regs[1] |= ((uint32_t) m << 29);
}
void MAX2871::SetCPCurrent(uint8_t mA) {
if(mA > 15) {
LOG_WARN("Clipping charge pump current to 15mA");
mA = 15;
}
regs[2] &= ~0x1E00;
regs[2] |= ((uint16_t) mA << 9);
}
bool MAX2871::SetFrequency(uint64_t f) {
if (f < 23500000 || f > MaxFreq) {
LOG_ERR("Frequency must be between 23.5MHz and 6GHz");
return false;
}
LOG_DEBUG("Setting frequency to %lu%06luHz...", (uint32_t ) (f / 1000000),
(uint32_t ) (f % 1000000));
// select divider
uint64_t f_vco = f;
uint8_t div = 0;
if (f < 46875000) {
div = 0x07;
f_vco *= 128;
} else if (f < 93750000) {
div = 0x06;
f_vco *= 64;
} else if (f < 187500000) {
div = 0x05;
f_vco *= 32;
} else if (f < 375000000) {
div = 0x04;
f_vco *= 16;
} else if (f < 750000000) {
div = 0x03;
f_vco *= 8;
} else if (f < 1500000000) {
div = 0x02;
f_vco *= 4;
} else if (f < 3000000000) {
div = 0x01;
f_vco *= 2;
}
LOG_DEBUG("F_VCO: %lu%06luHz",
(uint32_t ) (f_vco / 1000000), (uint32_t ) (f_vco % 1000000));
if (gotVCOMap) {
// manual VCO selection for lock time improvement
uint16_t compare = f_vco / 100000;
uint8_t vco = 0;
for (; vco < 64; vco++) {
if (VCOmax[vco] >= compare) {
break;
}
} LOG_DEBUG("Manually selected VCO %d", vco);
regs[3] &= ~0xFC000000;
regs[3] |= (uint32_t) vco << 26;
}
uint16_t N = f_vco / f_PFD;
if (N < 19 || N > 4091) {
LOG_ERR("Invalid N value, should be between 19 and 4091, got %lu", N);
return false;
}
uint32_t rem_f = f_vco - N * f_PFD;
LOG_DEBUG("Remaining fractional frequency: %lu", rem_f);
LOG_DEBUG("Looking for best fractional match");
float fraction = (float) rem_f / f_PFD;
auto approx = Algorithm::BestRationalApproximation(fraction, 4095);
int32_t rem_approx = ((uint64_t) f_PFD * approx.num) / approx.denom;
if(rem_approx != rem_f) {
LOG_WARN("Best match is F=%u/M=%u, deviation of %luHz",
approx.num, approx.denom, abs(rem_f - rem_approx));
}
uint64_t f_set = (uint64_t) N * f_PFD + (f_PFD * approx.num) / approx.denom;
f_set /= (1UL << div);
// write values to registers
regs[4] &= ~0x00700000;
regs[4] |= ((uint32_t) div << 20);
regs[0] &= ~0x7FFFFFF8;
regs[0] |= ((uint32_t) N << 15) | ((uint32_t) approx.num << 3);
regs[1] &= ~0x00007FF8;
regs[1] |= ((uint32_t) approx.denom << 3);
LOG_DEBUG("Set frequency to %lu%06luHz...",
(uint32_t ) (f_set / 1000000), (uint32_t ) (f_set % 1000000));
outputFrequency = f_set;
return true;
}
bool MAX2871::SetReference(uint32_t f_ref, bool doubler, uint16_t r,
bool div2) {
if (f_ref < 10000000) {
LOG_ERR("Reference frequency must be >=10MHz, is %lu", f_ref);
return false;
} else if (f_ref > 105000000 && doubler) {
LOG_ERR(
"Reference frequency must be <=105MHz when used with doubler, is %lu",
f_ref);
return false;
} else if (f_ref > 210000000) {
LOG_ERR("Reference frequency must be <=210MHz, is %lu", f_ref);
return false;
}
if (r < 1 || r > 1023) {
LOG_ERR("Reference divider must be between 1 and 1023, is %d", r);
return false;
}
// calculate PFD frequency
uint32_t pfd = f_ref;
if (doubler) {
pfd *= 2;
}
pfd /= r;
if (div2) {
pfd /= 2;
}
if (pfd > 125000000) {
LOG_ERR("PFD frequency must be <=125MHz, is %d",
pfd);
return false;
}
if(pfd > 32000000) {
regs[2] |= (1UL << 31);
} else {
regs[2] &= ~(1UL << 31);
}
// input values are valid, adjust registers
regs[2] &= ~0x03FFC000;
if (doubler) {
regs[2] |= (1UL << 25);
}
if (div2) {
regs[2] |= (1UL << 24);
}
regs[2] |= (r << 14);
f_PFD = pfd;
LOG_INFO("Set PFD frequency to %lu", f_PFD);
// updating VAS state machine clock
uint16_t BS = f_PFD / 50000;
if (BS > 1023) {
BS = 1023;
} else if (BS < 1) {
BS = 1;
}
LOG_DEBUG("BS set to %lu", BS);
regs[4] &= ~0x030FF000;
regs[4] |= ((BS & 0xFF) << 12);
regs[4] |= (((BS >> 8) & 0x03) << 24);
// update ADC clock
uint16_t cdiv = f_PFD/100000;
LOG_DEBUG("CDIV set to %u", cdiv);
regs[3] &= ~0x00007FF8;
regs[3] |= (cdiv & 0xFFF) << 3;
return true;
}
void MAX2871::Update() {
Write(5, regs[5]);
Write(4, regs[4]);
Write(3, regs[3]);
Write(2, regs[2]);
Write(1, regs[1]);
Write(0, regs[0]);
}
void MAX2871::UpdateFrequency() {
Write(4, regs[4]);
Write(3, regs[3]);
Write(1, regs[1]);
Write(0, regs[0]);
}
void MAX2871::Write(uint8_t reg, uint32_t val) {
uint16_t data[2];
// split value into two 16 bit words
data[0] = val >> 16;
data[1] = (val & 0xFFF8) | reg;
Delay::us(1);
HAL_SPI_Transmit(hspi, (uint8_t*) data, 2, 20);
LE->BSRR = LEpin;
Delay::us(1);
LE->BSRR = LEpin << 16;
}
// Assumes that the MUX pin is already configured as "Read register 6" and connected to MISO
uint32_t MAX2871::Read() {
uint16_t transmit[2] = {0x0000, 0x0006};
HAL_SPI_Transmit(hspi, (uint8_t*) transmit, 2, 20);
LE->BSRR = LEpin;
memset(transmit, 0, sizeof(transmit));
uint16_t recv[2];
HAL_SPI_TransmitReceive(hspi, (uint8_t*) transmit, (uint8_t*) recv, 2, 20);
LE->BSRR = LEpin << 16;
// assemble readback result
uint32_t result = ((uint32_t) recv[0] << 16) | (recv[1] & 0xFFFF);
result <<= 2;
LOG_DEBUG("Readback: 0x%08x", result);
return result;
}
bool MAX2871::BuildVCOMap() {
memset(VCOmax, 0, sizeof(VCOmax));
// save output frequency
uint64_t oldFreq = outputFrequency;
constexpr uint32_t step = 10000000;
for (uint64_t freq = 3000000000; freq <= MaxFreq; freq += step) {
SetFrequency(freq);
UpdateFrequency();
uint32_t start = HAL_GetTick();
// set MUX to LD
regs[2] &= ~(7UL << 26);
regs[5] &= ~(1UL << 18);
regs[2] |= (6UL << 26);
Write(5, regs[5]);
Write(2, regs[2]);
while (!(MUX->IDR & MUXpin)) {
if (HAL_GetTick() - start > 100) {
LOG_ERR(
"Failed to lock during VCO map build process, aborting (f=%lu%06luHz)",
(uint32_t )(freq / 1000000),
(uint32_t ) (freq % 1000000));
gotVCOMap = false;
// revert back to previous frequency
SetFrequency(oldFreq);
LE->BSRR = LEpin << 16;
// Mux pin back to high impedance
regs[2] &= ~(7UL << 26);
regs[5] &= ~(1UL << 18);
Update();
return false;
}
}
// set MUX to SPI read
regs[2] &= ~(7UL << 26);
regs[5] &= ~(1UL << 18);
regs[2] |= (4UL << 26);
regs[5] |= (1UL << 18);
Write(5, regs[5]);
Write(2, regs[2]);
auto readback = Read();
uint8_t vco = (readback & 0x01F8) >> 3;
VCOmax[vco] = freq / 100000;
LOG_INFO("VCO map: %lu%06luHz uses VCO %d",
(uint32_t ) (freq / 1000000), (uint32_t ) (freq % 1000000), vco);
}
gotVCOMap = true;
// revert back to previous frequency
SetFrequency(oldFreq);
// Mux pin back to high impedance
regs[2] &= ~(7UL << 26);
regs[5] &= ~(1UL << 18);
// Turn off VAS, select VCO manually from now on
regs[3] |= (1UL << 25);
Update();
return true;
}
uint8_t MAX2871::GetTemp() {
// select temperature channel and start ADC
regs[5] &= ~0x00000078;
regs[5] |= 0x00000048;
Write(5, regs[5]);
Delay::us(100);
// set MUX to SPI read
regs[2] &= ~(7UL << 26);
regs[5] &= ~(1UL << 18);
regs[2] |= (4UL << 26);
regs[5] |= (1UL << 18);
Write(5, regs[5]);
Write(2, regs[2]);
uint8_t ADC_raw = (Read() >> 16) & 0x7F;
LOG_DEBUG("Raw temp ADC: %d", ADC_raw);
// Disable ADC
regs[5] &= ~0x00000078;
// Mux pin back to high impedance
regs[2] &= ~(7UL << 26);
regs[5] &= ~(1UL << 18);
Write(5, regs[5]);
Write(2, regs[2]);
// convert to celsius and return
return 95 - 1.14f * ADC_raw;
}

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#pragma once
#include "stm.hpp"
class MAX2871 {
public:
constexpr MAX2871(SPI_HandleTypeDef *hspi, GPIO_TypeDef *LE = nullptr,
uint16_t LEpin = 0, GPIO_TypeDef *RF_EN = nullptr,
uint16_t RF_ENpin = 0, GPIO_TypeDef *LD = nullptr, uint16_t LDpin = 0,
GPIO_TypeDef *CE = nullptr, uint16_t CEpin = 0,
GPIO_TypeDef *MUX = nullptr, uint16_t MUXpin = 0) :
regs(), f_PFD(0),
hspi(hspi),
CE(CE), CEpin(CEpin),
LE(LE), LEpin(LEpin),
MUX(MUX), MUXpin(MUXpin),
RF_EN(RF_EN), RF_ENpin(RF_ENpin),
LD(LD), LDpin(LDpin),
outputFrequency(0),
VCOmax(),
gotVCOMap(false)
{};
bool Init();
bool Init(uint32_t f_ref, bool doubler, uint16_t r, bool div2);
bool SetReference(uint32_t f_ref, bool doubler, uint16_t r, bool div2);
void ChipEnable(bool on);
void RFEnable(bool on);
bool Locked();
enum class Power : uint8_t {
n4dbm = 0x00,
n1dbm = 0x01,
p2dbm = 0x02,
p5dbm = 0x03,
};
void SetPowerOutA(Power p, bool enabled = true);
void SetPowerOutB(Power p, bool enabled = true);
enum class Mode : uint8_t {
LowNoise = 0x00,
LowSpur1 = 0x02,
LowSpur2 = 0x03,
};
void SetMode(Mode m);
enum class CPMode : uint8_t {
Disabled = 0x00,
CP10 = 0x01,
CP20 = 0x02,
CP30 = 0x03,
};
void SetCPMode(CPMode m);
void SetCPCurrent(uint8_t mA);
bool SetFrequency(uint64_t f);
void Update();
void UpdateFrequency();
bool BuildVCOMap();
uint8_t GetTemp();
uint32_t* GetRegisters() {
return regs;
}
private:
static constexpr uint64_t MaxFreq = 6100000000; // 6GHz according to datasheet, but slight overclocking is possible
uint32_t Read();
void Write(uint8_t reg, uint32_t val);
uint32_t regs[6];
uint32_t f_PFD;
SPI_HandleTypeDef *hspi;
GPIO_TypeDef *CE;
uint16_t CEpin;
GPIO_TypeDef *LE;
uint16_t LEpin;
GPIO_TypeDef *MUX;
uint16_t MUXpin;
GPIO_TypeDef *RF_EN;
uint16_t RF_ENpin;
GPIO_TypeDef *LD;
uint16_t LDpin;
uint64_t outputFrequency;
uint16_t VCOmax[64];
bool gotVCOMap;
};

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#pragma once
#include "stm32g431xx.h"
#include "stm32g4xx_hal.h"
namespace STM {
static inline bool InInterrupt() {
return (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) != 0;
}
}

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#include <VNA.hpp>
#include "Si5351C.hpp"
#include "max2871.hpp"
#include "main.h"
#include "delay.hpp"
#include "FPGA.hpp"
#include <complex>
#include "Exti.hpp"
#define LOG_LEVEL LOG_LEVEL_INFO
#define LOG_MODULE "VNA"
#include "Log.h"
extern I2C_HandleTypeDef hi2c2;
extern SPI_HandleTypeDef hspi1;
static Si5351C Si5351 = Si5351C(&hi2c2, 26000000);
static MAX2871 Source = MAX2871(&hspi1, FPGA_CS_GPIO_Port, FPGA_CS_Pin, nullptr, 0, nullptr, 0, nullptr, 0, GPIOB, GPIO_PIN_4);
static MAX2871 LO1 = MAX2871(&hspi1, FPGA_CS_GPIO_Port, FPGA_CS_Pin, nullptr, 0, nullptr, 0, nullptr, 0, GPIOB, GPIO_PIN_4);
static constexpr uint32_t IF1 = 60100000;
static constexpr uint32_t IF1_alternate = 57000000;
static constexpr uint32_t IF2 = 250000;
static VNA::SweepCallback sweepCallback;
static VNA::StatusCallback statusCallback;
static Protocol::SweepSettings settings;
static uint16_t pointCnt;
static bool excitingPort1;
static Protocol::Datapoint data;
static bool manualMode = false;
using IFTableEntry = struct {
uint16_t pointCnt;
uint32_t IF1;
uint8_t clkconfig[8];
};
static constexpr uint16_t IFTableNumEntries = 100;
static IFTableEntry IFTable[IFTableNumEntries];
static uint16_t IFTableIndexCnt = 0;
static constexpr uint32_t BandSwitchFrequency = 25000000;
static void HaltedCallback() {
LOG_DEBUG("Halted before point %d", pointCnt);
// Check if IF table has entry at this point
// if (IFTable[IFTableIndexCnt].pointCnt == pointCnt) {
// LOG_DEBUG("Shifting IF to %lu at point %u",
// IFTable[IFTableIndexCnt].IF1, pointCnt);
// Si5351.WriteRawCLKConfig(1, IFTable[IFTableIndexCnt].clkconfig);
// Si5351.WriteRawCLKConfig(4, IFTable[IFTableIndexCnt].clkconfig);
// Si5351.WriteRawCLKConfig(5, IFTable[IFTableIndexCnt].clkconfig);
// Si5351.ResetPLL(Si5351C::PLL::B);
// IFTableIndexCnt++;
// }
uint64_t frequency = settings.f_start
+ (settings.f_stop - settings.f_start) * pointCnt
/ (settings.points - 1);
if (frequency < BandSwitchFrequency) {
// need the Si5351 as Source
Si5351.SetCLK(0, frequency, Si5351C::PLL::B,
Si5351C::DriveStrength::mA2);
if (pointCnt == 0) {
// First point in sweep, enable CLK
Si5351.Enable(0);
FPGA::Disable(FPGA::Periphery::SourceRF);
}
} else {
// first sweep point in highband is also halted, disable lowband source
Si5351.Disable(0);
FPGA::Enable(FPGA::Periphery::SourceRF);
}
FPGA::ResumeHaltedSweep();
}
static void ReadComplete(FPGA::SamplingResult result) {
if(!manualMode) {
// normal sweep mode
auto port1_raw = std::complex<float>(result.P1I, result.P1Q);
auto port2_raw = std::complex<float>(result.P2I, result.P2Q);
auto ref = std::complex<float>(result.RefI, result.RefQ);
auto port1 = port1_raw / ref;
auto port2 = port2_raw / ref;
if(excitingPort1) {
data.pointNum = pointCnt;
data.frequency = settings.f_start + (settings.f_stop - settings.f_start) * pointCnt / (settings.points - 1);
data.real_S11 = port1.real();
data.imag_S11 = port1.imag();
data.real_S21 = port2.real();
data.imag_S21 = port2.imag();
} else {
data.real_S12 = port1.real();
data.imag_S12 = port1.imag();
data.real_S22 = port2.real();
data.imag_S22 = port2.imag();
if (sweepCallback) {
sweepCallback(data);
}
pointCnt++;
if (pointCnt >= settings.points) {
// reached end of sweep, start again
pointCnt = 0;
IFTableIndexCnt = 0;
// FPGA::StartSweep();
}
}
excitingPort1 = !excitingPort1;
} else {
// Manual control mode, simply pass on raw result
if(statusCallback) {
statusCallback(result);
}
}
}
static void FPGA_Interrupt(void*) {
FPGA::InitiateSampleRead(ReadComplete);
}
bool VNA::Init() {
LOG_DEBUG("Initializing...");
// Wait for FPGA to finish configuration
Delay::ms(2000);
manualMode = false;
Si5351.Init();
// Use Si5351 to generate reference frequencies for other PLLs and ADC
Si5351.SetPLL(Si5351C::PLL::A, 800000000, Si5351C::PLLSource::XTAL);
while(!Si5351.Locked(Si5351C::PLL::A));
Si5351.SetPLL(Si5351C::PLL::B, 800000000, Si5351C::PLLSource::XTAL);
while(!Si5351.Locked(Si5351C::PLL::B));
// Both MAX2871 get a 100MHz reference
Si5351.SetCLK(2, 100000000, Si5351C::PLL::A, Si5351C::DriveStrength::mA2);
Si5351.Enable(2);
Si5351.SetCLK(3, 100000000, Si5351C::PLL::A, Si5351C::DriveStrength::mA2);
Si5351.Enable(3);
// 16MHz FPGA clock
Si5351.SetCLK(7, 16000000, Si5351C::PLL::A, Si5351C::DriveStrength::mA2);
Si5351.Enable(7);
// 10 MHz external reference clock
Si5351.SetCLK(6, 10000000, Si5351C::PLL::A, Si5351C::DriveStrength::mA8);
Si5351.Enable(6);
// Generate second LO with Si5351
Si5351.SetCLK(1, IF1 - IF2, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
Si5351.Enable(1);
Si5351.SetCLK(4, IF1 - IF2, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
Si5351.Enable(4);
Si5351.SetCLK(5, IF1 - IF2, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
Si5351.Enable(5);
// PLL reset appears to realign phases of clock signals
Si5351.ResetPLL(Si5351C::PLL::B);
LOG_DEBUG("Si5351 locked");
// FPGA clock is now present, can initialize
if (!FPGA::Init(HaltedCallback)) {
LOG_ERR("Aborting due to uninitialized FPGA");
return false;
}
// Enable new data and sweep halt interrupt
FPGA::EnableInterrupt(FPGA::Interrupt::NewData);
FPGA::EnableInterrupt(FPGA::Interrupt::SweepHalted);
Exti::SetCallback(FPGA_INTR_GPIO_Port, FPGA_INTR_Pin, Exti::EdgeType::Rising, Exti::Pull::Down, FPGA_Interrupt);
// Initialize PLLs and build VCO maps
// enable source synthesizer
FPGA::Enable(FPGA::Periphery::SourceChip);
FPGA::SetMode(FPGA::Mode::SourcePLL);
Source.Init(100000000, false, 1, false);
Source.SetPowerOutA(MAX2871::Power::n4dbm);
// output B is not used
Source.SetPowerOutB(MAX2871::Power::n4dbm, false);
if(!Source.BuildVCOMap()) {
LOG_WARN("Source VCO map failed");
} else {
LOG_INFO("Source VCO map complete");
}
Source.SetFrequency(1000000000);
Source.UpdateFrequency();
LOG_DEBUG("Source temp: %u", Source.GetTemp());
// disable source synthesizer/enable LO synthesizer
FPGA::SetMode(FPGA::Mode::FPGA);
FPGA::Disable(FPGA::Periphery::SourceChip);
FPGA::Enable(FPGA::Periphery::LO1Chip);
FPGA::SetMode(FPGA::Mode::LOPLL);
LO1.Init(100000000, false, 1, false);
LO1.SetPowerOutA(MAX2871::Power::n4dbm);
LO1.SetPowerOutB(MAX2871::Power::n4dbm);
if(!LO1.BuildVCOMap()) {
LOG_WARN("LO1 VCO map failed");
} else {
LOG_INFO("LO1 VCO map complete");
}
LO1.SetFrequency(1000000000 + IF1);
LO1.UpdateFrequency();
LOG_DEBUG("LO temp: %u", LO1.GetTemp());
FPGA::SetMode(FPGA::Mode::FPGA);
// disable both synthesizers
FPGA::Disable(FPGA::Periphery::LO1Chip);
FPGA::WriteMAX2871Default(Source.GetRegisters());
LOG_INFO("Initialized");
FPGA::Enable(FPGA::Periphery::ReadyLED);
return true;
}
bool VNA::ConfigureSweep(Protocol::SweepSettings s, SweepCallback cb) {
if (manualMode) {
// was used in manual mode last, do full initialization before starting sweep
VNA::Init();
}
sweepCallback = cb;
settings = s;
// Abort possible active sweep first
FPGA::AbortSweep();
uint16_t points = settings.points <= FPGA::MaxPoints ? settings.points : FPGA::MaxPoints;
// Configure sweep
FPGA::SetSettlingTime(500);
FPGA::SetNumberOfPoints(points);
uint32_t samplesPerPoint = (1000000 / s.if_bandwidth);
// round up to next multiple of 128 (128 samples are spread across 35 IF2 periods)
samplesPerPoint = ((uint32_t) ((samplesPerPoint + 127) / 128)) * 128;
// has to be one less than actual number of samples
FPGA::SetSamplesPerPoint(samplesPerPoint);
uint8_t attenuator;
if(s.cdbm_excitation >= -1000) {
attenuator = 0;
} else if (s.cdbm_excitation <= -4175){
attenuator = 127;
} else {
attenuator = (-1000 - s.cdbm_excitation) / 25;
}
uint32_t last_IF1 = IF1;
IFTableIndexCnt = 0;
bool last_lowband = false;
// Transfer PLL configuration to FPGA
for (uint16_t i = 0; i < points; i++) {
uint64_t freq = s.f_start + (s.f_stop - s.f_start) * i / (s.points - 1);
// SetFrequency only manipulates the register content in RAM, no SPI communication is done.
// No mode-switch of FPGA necessary here.
// Check which IF frequency is a better fit
uint32_t used_IF = IF1;
// if (freq < 290000000) {
// // for low frequencies the harmonics of the IF and source frequency should not be too close
// uint32_t dist_primary;
// if(freq < IF1) {
// dist_primary = IF1 - freq * (IF1 / freq);
// if (dist_primary > freq / 2) {
// dist_primary = freq - dist_primary;
// }
// } else {
// dist_primary = freq - IF1 * (freq / IF1);
// if (dist_primary > IF1 / 2) {
// dist_primary = IF1 - dist_primary;
// }
// }
// uint32_t dist_alternate;
// if(freq < IF1_alternate) {
// dist_alternate = IF1_alternate - freq * (IF1_alternate / freq);
// if (dist_alternate > freq / 2) {
// dist_alternate = freq - dist_primary;
// }
// } else {
// dist_alternate = freq - IF1_alternate * (freq / IF1_alternate);
// if (dist_alternate > IF1_alternate / 2) {
// dist_alternate = IF1_alternate - dist_primary;
// }
// }
// if(dist_alternate > dist_primary) {
// used_IF = IF1_alternate;
// }
// LOG_INFO("Distance: %lu/%lu", dist_primary, dist_alternate);
// }
bool needs_halt = false;
if (used_IF != last_IF1) {
last_IF1 = used_IF;
LOG_INFO("Changing IF1 to %lu at point %u (f=%lu)", used_IF, i, (uint32_t) freq);
needs_halt = true;
if (IFTableIndexCnt >= IFTableNumEntries) {
LOG_ERR("IF table full, unable to add new entry");
return false;
}
IFTable[IFTableIndexCnt].pointCnt = i;
IFTable[IFTableIndexCnt].IF1 = used_IF;
// Configure LO2 for the changed IF1. This is not necessary right now but it will generate
// the correct clock settings
Si5351.SetCLK(1, used_IF + IF2, Si5351C::PLL::A, Si5351C::DriveStrength::mA2);
// store calculated clock configuration for later change
Si5351.ReadRawCLKConfig(1, IFTable[IFTableIndexCnt].clkconfig);
IFTableIndexCnt++;
}
bool lowband = false;
if (freq < BandSwitchFrequency) {
needs_halt = true;
lowband = true;
} else {
Source.SetFrequency(freq);
}
if (last_lowband && !lowband) {
// additional halt before first highband point to enable highband source
needs_halt = true;
}
LO1.SetFrequency(freq + used_IF);
FPGA::WriteSweepConfig(i, lowband, Source.GetRegisters(), LO1.GetRegisters(), attenuator, freq, needs_halt);
last_lowband = lowband;
}
// // revert clk configuration to previous value (might have been changed in sweep calculation)
// Si5351.SetCLK(1, IF1 + IF2, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
// Si5351.ResetPLL(Si5351C::PLL::B);
// Enable mixers/amplifier/PLLs
FPGA::Enable(FPGA::Periphery::Port1Mixer);
FPGA::Enable(FPGA::Periphery::Port2Mixer);
FPGA::Enable(FPGA::Periphery::RefMixer);
FPGA::Enable(FPGA::Periphery::Amplifier);
FPGA::Enable(FPGA::Periphery::SourceChip);
FPGA::Enable(FPGA::Periphery::SourceRF);
FPGA::Enable(FPGA::Periphery::LO1Chip);
FPGA::Enable(FPGA::Periphery::LO1RF);
FPGA::Enable(FPGA::Periphery::ExcitePort1);
FPGA::Enable(FPGA::Periphery::ExcitePort2);
pointCnt = 0;
excitingPort1 = true;
IFTableIndexCnt = 0;
// Start the sweep
FPGA::StartSweep();
return true;
}
bool VNA::ConfigureManual(Protocol::ManualControl m, StatusCallback cb) {
manualMode = true;
statusCallback = cb;
FPGA::AbortSweep();
// Configure lowband source
if (m.SourceLowEN) {
Si5351.SetCLK(0, m.SourceLowFrequency, Si5351C::PLL::B,
(Si5351C::DriveStrength) m.SourceLowPower);
Si5351.Enable(0);
} else {
Si5351.Disable(0);
}
// Configure highband source
Source.SetFrequency(m.SourceHighFrequency);
Source.SetPowerOutA((MAX2871::Power) m.SourceHighPower);
// Configure LO1
LO1.SetFrequency(m.LO1Frequency);
// Configure LO2
if(m.LO2EN) {
// Generate second LO with Si5351
Si5351.SetCLK(1, m.LO2Frequency, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
Si5351.Enable(1);
Si5351.SetCLK(4, m.LO2Frequency, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
Si5351.Enable(4);
Si5351.SetCLK(5, m.LO2Frequency, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
Si5351.Enable(5);
// PLL reset appears to realign phases of clock signals
Si5351.ResetPLL(Si5351C::PLL::B);
} else {
Si5351.Disable(1);
Si5351.Disable(4);
Si5351.Disable(5);
}
FPGA::WriteMAX2871Default(Source.GetRegisters());
FPGA::SetNumberOfPoints(1);
FPGA::SetSamplesPerPoint(m.Samples);
FPGA::SetSettlingTime(1);
// Configure single sweep point
FPGA::WriteSweepConfig(0, !m.SourceHighband, Source.GetRegisters(),
LO1.GetRegisters(), m.attenuator, 0, 0,
(FPGA::LowpassFilter) m.SourceHighLowpass);
// Enable/Disable periphery
FPGA::Enable(FPGA::Periphery::SourceChip, m.SourceHighCE);
FPGA::Enable(FPGA::Periphery::SourceRF, m.SourceHighRFEN);
FPGA::Enable(FPGA::Periphery::LO1Chip, m.LO1CE);
FPGA::Enable(FPGA::Periphery::LO1RF, m.LO1RFEN);
FPGA::Enable(FPGA::Periphery::Amplifier, m.AmplifierEN);
FPGA::Enable(FPGA::Periphery::Port1Mixer, m.Port1EN);
FPGA::Enable(FPGA::Periphery::Port2Mixer, m.Port2EN);
FPGA::Enable(FPGA::Periphery::RefMixer, m.RefEN);
FPGA::Enable(FPGA::Periphery::ExcitePort1, m.PortSwitch == 0);
FPGA::Enable(FPGA::Periphery::ExcitePort2, m.PortSwitch == 1);
FPGA::StartSweep();
return true;
}
bool VNA::GetTemps(uint8_t *source, uint8_t *lo) {
FPGA::SetMode(FPGA::Mode::SourcePLL);
*source = Source.GetTemp();
FPGA::SetMode(FPGA::Mode::LOPLL);
*lo = LO1.GetTemp();
FPGA::SetMode(FPGA::Mode::FPGA);
return true;
}

18
Software/VNA_embedded/Application/VNA.hpp Normal file
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#pragma once
#include <cstdint>
#include "Protocol.hpp"
#include "FPGA.hpp"
namespace VNA {
using SweepCallback = void(*)(Protocol::Datapoint);
using StatusCallback = void(*)(FPGA::SamplingResult);
bool Init();
bool ConfigureSweep(Protocol::SweepSettings s, SweepCallback cb);
bool ConfigureManual(Protocol::ManualControl m, StatusCallback cb);
bool GetTemps(uint8_t *source, uint8_t *lo);
}