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https://github.com/jankae/LibreVNA.git
synced 2026-04-04 14:07:30 +00:00
Improved USB throughput, stimulus power up to 0dbm, fine tuning of dynamic range
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parent
294855ac70
commit
2157b3f3c4
10 changed files with 100 additions and 28 deletions
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@ -17,8 +17,11 @@ static uint8_t USBD_Class_DataOut (USBD_HandleTypeDef *pdev, uint8_t epnum);
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static uint8_t *USBD_Class_GetFSCfgDesc (uint16_t *length);
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static uint8_t *USBD_Class_GetDeviceQualifierDescriptor (uint16_t *length);
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static usbd_callback_t cb;
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static usbd_recv_callback_t cb;
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static uint8_t usb_receive_buffer[1024];
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static uint8_t usb_transmit_fifo[4096];
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static uint16_t usb_transmit_read_index = 0;
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static uint16_t usb_transmit_fifo_level = 0;
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static bool data_transmission_active = false;
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static bool log_transmission_active = true;
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@ -145,17 +148,43 @@ static uint8_t USBD_Class_Setup(USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef
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}
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return USBD_OK;
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}
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static bool trigger_next_fifo_transmission() {
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data_transmission_active = true;
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uint16_t continous_length = sizeof(usb_transmit_fifo) - usb_transmit_read_index;
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if(continous_length > usb_transmit_fifo_level) {
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continous_length = usb_transmit_fifo_level;
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}
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if(continous_length > sizeof(usb_transmit_fifo)/ 4) {
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continous_length = sizeof(usb_transmit_fifo) / 4;
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}
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hUsbDeviceFS.ep_in[EP_DATA_IN_ADDRESS & 0x7F].total_length = continous_length;
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return USBD_LL_Transmit(&hUsbDeviceFS, EP_DATA_IN_ADDRESS, &usb_transmit_fifo[usb_transmit_read_index], continous_length) == USBD_OK;
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}
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static uint8_t USBD_Class_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum) {
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// A bulk transfer is complete when the endpoint does on of the following:
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// - Has transferred exactly the amount of data expected
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// - Transfers a packet with a payload size less than wMaxPacketSize or transfers a zero-length packet
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if(epnum == (EP_DATA_IN_ADDRESS & 0x7F)) {
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// transmission of fifo data, mark as empty
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__disable_irq();
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usb_transmit_fifo_level -= pdev->ep_in[epnum].total_length;
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usb_transmit_read_index += pdev->ep_in[epnum].total_length;
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usb_transmit_read_index %= sizeof(usb_transmit_fifo);
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__enable_irq();
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}
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if (pdev->ep_in[epnum].total_length
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&& !(pdev->ep_in[epnum].total_length % USB_FS_MAX_PACKET_SIZE)) {
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pdev->ep_in[epnum].total_length = 0;
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USBD_LL_Transmit(pdev, epnum, NULL, 0);
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} else {
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if(epnum == (EP_DATA_IN_ADDRESS & 0x7F)) {
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data_transmission_active = false;
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if(usb_transmit_fifo_level > 0) {
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trigger_next_fifo_transmission();
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} else {
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data_transmission_active = false;
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}
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} else {
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log_transmission_active = false;
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}
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@ -182,30 +211,53 @@ static uint8_t *USBD_Class_GetDeviceQualifierDescriptor(uint16_t *length)
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return USBD_DeviceQualifierDesc;
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}
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void usb_init(usbd_callback_t callback) {
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cb = callback;
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void usb_init(usbd_recv_callback_t receive_callback) {
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cb = receive_callback;
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USBD_Init(&hUsbDeviceFS, &FS_Desc, 0);
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USBD_RegisterClass(&hUsbDeviceFS, &USBD_ClassDriver);
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USBD_Start(&hUsbDeviceFS);
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HAL_NVIC_SetPriority(USB_HP_IRQn, 7, 0);
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HAL_NVIC_SetPriority(USB_HP_IRQn, 0, 0);
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HAL_NVIC_EnableIRQ(USB_HP_IRQn);
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HAL_NVIC_SetPriority(USB_LP_IRQn, 7, 0);
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HAL_NVIC_EnableIRQ(USB_LP_IRQn);
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}
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bool usb_transmit(const uint8_t *data, uint16_t length) {
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// attempt to add data to fifo
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if(usb_transmit_fifo_level + length > sizeof(usb_transmit_fifo)) {
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// data won't fit, abort
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return false;
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}
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// grab pointer to write position
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__disable_irq();
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uint16_t write_index = usb_transmit_read_index + usb_transmit_fifo_level;
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__enable_irq();
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write_index %= sizeof(usb_transmit_fifo);
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// copy the data to the fifo
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uint16_t continous_length = sizeof(usb_transmit_fifo) - write_index;
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if(continous_length > length) {
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// can copy all data at once
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memcpy(&usb_transmit_fifo[write_index], data, length);
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} else {
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// needs to copy two data segments
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memcpy(&usb_transmit_fifo[write_index], data, continous_length);
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memcpy(&usb_transmit_fifo[0], data + continous_length, length - continous_length);
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}
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// increment fifo level
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__disable_irq();
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usb_transmit_fifo_level += length;
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__enable_irq();
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static bool first = true;
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if(first) {
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log_transmission_active = false;
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first = false;
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}
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if(!data_transmission_active) {
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data_transmission_active = true;
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hUsbDeviceFS.ep_in[EP_DATA_IN_ADDRESS & 0x7F].total_length = length;
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return USBD_LL_Transmit(&hUsbDeviceFS, EP_DATA_IN_ADDRESS, (uint8_t*) data, length) == USBD_OK;
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return trigger_next_fifo_transmission();
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} else {
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// already have an ongoing transmission
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return false;
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// still transmitting, no need to trigger
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return true;
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}
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}
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@ -15,9 +15,9 @@ extern "C" {
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#include <stdint.h>
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#include <stdbool.h>
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typedef void(*usbd_callback_t)(const uint8_t *buf, uint16_t len);
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typedef void(*usbd_recv_callback_t)(const uint8_t *buf, uint16_t len);
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void usb_init(usbd_callback_t callback);
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void usb_init(usbd_recv_callback_t receive_callback);
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bool usb_transmit(const uint8_t *data, uint16_t length);
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void usb_log(const char *log, uint16_t length);
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@ -6,7 +6,7 @@
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namespace HW {
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static constexpr uint32_t ADCSamplerate = 800000;
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static constexpr uint32_t IF1 = 60000000;
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static constexpr uint32_t IF1 = 62000000;
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static constexpr uint32_t IF2 = 250000;
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static constexpr uint32_t LO1_minFreq = 25000000;
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static constexpr uint32_t MaxSamples = 130944;
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@ -21,7 +21,7 @@ static constexpr Protocol::DeviceLimits Limits = {
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.maxIFBW = ADCSamplerate / MinSamples,
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.maxPoints = MaxPoints,
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.cdbm_min = -4000,
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.cdbm_max = -1000,
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.cdbm_max = 0,
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.minRBW = (uint32_t) (ADCSamplerate * 2.23f / MaxSamples),
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.maxRBW = (uint32_t) (ADCSamplerate * 2.23f / MinSamples),
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};
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@ -22,6 +22,7 @@ static uint16_t pointCnt;
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static bool excitingPort1;
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static Protocol::Datapoint data;
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static bool active = false;
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static bool sourceHighPower;
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using IFTableEntry = struct {
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uint16_t pointCnt;
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@ -62,14 +63,27 @@ bool VNA::Setup(Protocol::SweepSettings s, SweepCallback cb) {
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// has to be one less than actual number of samples
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FPGA::SetSamplesPerPoint(samplesPerPoint);
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// Set level (not very accurate)
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int16_t cdbm = s.cdbm_excitation;
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if(cdbm > -1000) {
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// use higher source power (approx 0dbm with no attenuation)
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sourceHighPower = true;
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Source.SetPowerOutA(MAX2871::Power::p5dbm, true);
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} else {
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// use lower source power (approx -10dbm with no attenuation)
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sourceHighPower = false;
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Source.SetPowerOutA(MAX2871::Power::n4dbm, true);
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cdbm += 1000;
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}
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uint8_t attenuator;
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if(s.cdbm_excitation >= -1000) {
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if(cdbm >= 0) {
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attenuator = 0;
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} else if (s.cdbm_excitation <= -4175){
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} else if (cdbm <= -3175){
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attenuator = 127;
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} else {
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attenuator = (-1000 - s.cdbm_excitation) / 25;
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attenuator = (-cdbm) / 25;
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}
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FPGA::WriteMAX2871Default(Source.GetRegisters());
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uint32_t last_LO2 = HW::IF1 - HW::IF2;
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Si5351.SetCLK(SiChannel::Port1LO2, last_LO2, Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
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@ -116,12 +130,14 @@ bool VNA::Setup(Protocol::SweepSettings s, SweepCallback cb) {
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if (s.suppressPeaks && needs_LO2_shift) {
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if (IFTableIndexCnt < IFTableNumEntries) {
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// still room in table
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LOG_INFO("Changing 2.LO at point %lu to reach correct 2.IF frequency");
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needs_halt = true;
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IFTable[IFTableIndexCnt].pointCnt = i;
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// Configure LO2 for the changed IF1. This is not necessary right now but it will generate
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// the correct clock settings
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last_LO2 = actualFirstIF - HW::IF2;
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LOG_INFO("Changing 2.LO to %lu at point %lu (%lu%06luHz) to reach correct 2.IF frequency",
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last_LO2, i, (uint32_t ) (freq / 1000000),
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(uint32_t ) (freq % 1000000));
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Si5351.SetCLK(SiChannel::RefLO2, last_LO2,
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Si5351C::PLL::B, Si5351C::DriveStrength::mA2);
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// store calculated clock configuration for later change
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@ -260,7 +276,7 @@ void VNA::SweepHalted() {
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if (frequency < BandSwitchFrequency) {
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// need the Si5351 as Source
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Si5351.SetCLK(SiChannel::LowbandSource, frequency, Si5351C::PLL::B,
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Si5351C::DriveStrength::mA2);
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sourceHighPower ? Si5351C::DriveStrength::mA8 : Si5351C::DriveStrength::mA2);
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if (pointCnt == 0) {
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// First point in sweep, enable CLK
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Si5351.Enable(SiChannel::LowbandSource);
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