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Timeout handling in FPGA communication (better recovery from missing reference)

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This commit is contained in:
Jan Käberich 2020-12-15 18:03:29 +01:00
parent f0c5962878
commit 00f0de43f2
9 changed files with 58 additions and 9 deletions
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2
Software/VNA_embedded/Application/Communication/Protocol.cpp
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@ -590,6 +590,7 @@ uint16_t Protocol::DecodeBuffer(uint8_t *buf, uint16_t len, PacketInfo *info) {
case PacketType::RequestDeviceInfo:
case PacketType::RequestReceiverCal:
case PacketType::RequestSourceCal:
case PacketType::SetIdle:
// no payload, nothing to do
break;
case PacketType::None:
@ -643,6 +644,7 @@ uint16_t Protocol::EncodePacket(const PacketInfo &packet, uint8_t *dest, uint16_
case PacketType::RequestDeviceInfo:
case PacketType::RequestSourceCal:
case PacketType::RequestReceiverCal:
case PacketType::SetIdle:
// no payload, nothing to do
break;
case PacketType::None: