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Removing 19.68 MHz TCXO support and adding test modes support
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ADF7021.h
94
ADF7021.h
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@ -34,6 +34,14 @@ http://www.analog.com/en/products/rf-microwave/integrated-transceivers-transmitt
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www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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*/
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/***** Test modes ****/
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// Enable SWD pin to access the demodulator output signal
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// See application note AN-852 and ADF7021 datasheet, page 60
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// #define TEST_DAC
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// Transmit the carrier frequency
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// #define TEST_TX
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/****** Support for 14.7456 MHz TCXO (modified RF7021SE boards) ******/
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#if defined(ADF7021_14_7456)
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@ -55,9 +63,15 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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// TX/RX CLOCK register (REG 03)
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#define ADF7021_REG3_DSTAR 0x2A4C4193
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#if defined(TEST_DAC)
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#define ADF7021_REG3_DMR 0x2A4C04D3
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#define ADF7021_REG3_YSF 0x2A4C04D3
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#define ADF7021_REG3_P25 0x2A4C04D3
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#else
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#define ADF7021_REG3_DMR 0x2A4C80D3
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#define ADF7021_REG3_YSF 0x2A4C80D3
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#define ADF7021_REG3_P25 0x2A4C80D3
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#endif
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// Discriminator bandwith, demodulator (REG 04)
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// Bug in ADI evaluation software, use datasheet formula (4FSK)
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@ -69,7 +83,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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// Post demodulator bandwith (REG 04)
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#define ADF7021_POST_BW_DSTAR 10U
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#define ADF7021_POST_BW_DMR 65U
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#define ADF7021_POST_BW_DMR 100U
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#define ADF7021_POST_BW_YSF 20U
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#define ADF7021_POST_BW_P25 6U
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@ -104,76 +118,6 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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#define AFC_OFFSET_P25 0
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#endif
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/****** Support for 19.6800 MHz TCXO (original RF7021SE boards) ******/
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#elif defined(ADF7021_19_6800)
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// R = 4
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#define ADF7021_PFD 4920000.0
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// PLL (REG 01)
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#define ADF7021_REG1_VHF1 0x021F5041
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#define ADF7021_REG1_VHF2 0x021F5041
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#define ADF7021_REG1_UHF1 0x00575041
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#define ADF7021_REG1_UHF2 0x00535041
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// Deviation of modulator (REG 02)
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#define ADF7021_DEV_DSTAR 32U
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#define ADF7021_DEV_DMR 17U
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#define ADF7021_DEV_YSF_L 14U
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#define ADF7021_DEV_YSF_H 27U
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#define ADF7021_DEV_P25 16U
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// TX/RX CLOCK register (REG 03)
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#define ADF7021_REG3_DSTAR 0x2B1449E3
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#define ADF7021_REG3_DMR 0x2B148123
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#define ADF7021_REG3_YSF 0x2B148123
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#define ADF7021_REG3_P25 0x2B148123
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// Discriminator bandwith, demodulator (REG 04)
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// Bug in ADI evaluation software, use datasheet formula (4FSK)
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#define ADF7021_DISC_BW_DSTAR 597U // K=85
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#define ADF7021_DISC_BW_DMR 393U // K=32
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#define ADF7021_DISC_BW_YSF_L 394U // K=32
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#define ADF7021_DISC_BW_YSF_H 344U // K=28
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#define ADF7021_DISC_BW_P25 394U // K=32
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// Post demodulator bandwith (REG 04)
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#define ADF7021_POST_BW_DSTAR 10U
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#define ADF7021_POST_BW_DMR 65U
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#define ADF7021_POST_BW_YSF 20U
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#define ADF7021_POST_BW_P25 6U
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// IF filter (REG 05)
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#define ADF7021_REG5 0x00003155
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// IF CAL (coarse cal, defaults) (REG 06)
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#define ADF7021_REG6 0x050972C6
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// AFC (REG 10)
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#define ADF7021_REG10_DSTAR 0x0C96355A
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#if defined(ADF7021_ENABLE_4FSK_AFC)
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#define ADF7021_REG10_DMR 0x01FE355A
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#define ADF7021_REG10_YSF 0x01FE355A
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#define ADF7021_REG10_P25 0x01FE355A
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#if defined(ADF7021_AFC_POS)
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#define AFC_OFFSET_DMR -250
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#define AFC_OFFSET_YSF -250
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#define AFC_OFFSET_P25 -250
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#else
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#define AFC_OFFSET_DMR 250
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#define AFC_OFFSET_YSF 250
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#define AFC_OFFSET_P25 250
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#endif
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#else
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#define ADF7021_REG10_DMR 0x049E354A
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#define ADF7021_REG10_YSF 0x049E354A
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#define ADF7021_REG10_P25 0x049E354A
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#define AFC_OFFSET_DMR 0
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#define AFC_OFFSET_YSF 0
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#define AFC_OFFSET_P25 0
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#endif
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/****** Support for 12.2880 MHz TCXO ******/
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#elif defined(ADF7021_12_2880)
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@ -195,9 +139,15 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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// TX/RX CLOCK register (REG 03)
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#define ADF7021_REG3_DSTAR 0x29EC4153
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#if defined(TEST_DAC)
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#define ADF7021_REG3_DMR 0x29EC0493
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#define ADF7021_REG3_YSF 0x29EC0493
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#define ADF7021_REG3_P25 0x29EC0493
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#else
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#define ADF7021_REG3_DMR 0x29ECA093
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#define ADF7021_REG3_YSF 0x29ECA093
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#define ADF7021_REG3_P25 0x29ECA093
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#endif
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// Discriminator bandwith, demodulator (REG 04)
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// Bug in ADI evaluation software, use datasheet formula (4FSK)
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@ -209,7 +159,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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// Post demodulator bandwith (REG 04)
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#define ADF7021_POST_BW_DSTAR 10U
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#define ADF7021_POST_BW_DMR 65U
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#define ADF7021_POST_BW_DMR 100U
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#define ADF7021_POST_BW_YSF 20U
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#define ADF7021_POST_BW_P25 6U
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