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Changing 2 slot RX to 1 slot RX only in DMR duplex mode

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This commit is contained in:
Andy CA6JAU 2017-05-06 20:19:08 -03:00
parent fbb92a29cf
commit 71ca6e13d2
9 changed files with 73 additions and 56 deletions
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1
ADF7021.cpp
View file

@ -40,7 +40,6 @@ uint32_t ADF7021_RX_REG0;
uint32_t ADF7021_TX_REG0; uint32_t ADF7021_TX_REG0;
uint32_t ADF7021_REG1; uint32_t ADF7021_REG1;
uint32_t div2; uint32_t div2;
uint8_t m_control;
static void Send_AD7021_control_shift() static void Send_AD7021_control_shift()
{ {

27
DMRRX.cpp
View file

@ -24,50 +24,39 @@
#include "Globals.h" #include "Globals.h"
#include "DMRRX.h" #include "DMRRX.h"
CDMRRX::CDMRRX() : CDMRRX::CDMRRX()
m_slot1RX(false),
m_slot2RX(true)
{ {
} }
void CDMRRX::databit(bool bit, const uint8_t control) void CDMRRX::databit(bool bit, const uint8_t control)
{ {
bool dcd1 = false;
bool dcd2 = false;
switch (control) { switch (control) {
case MARK_SLOT1: case MARK_SLOT1:
m_slot1RX.start(); m_slotRX.start(false);
break; break;
case MARK_SLOT2: case MARK_SLOT2:
m_slot2RX.start(); m_slotRX.start(true);
break; break;
default: default:
break; break;
} }
dcd1 = m_slot1RX.databit(bit); io.setDecode(m_slotRX.databit(bit));
dcd2 = m_slot2RX.databit(bit);
io.setDecode(dcd1 || dcd2);
} }
void CDMRRX::setColorCode(uint8_t colorCode) void CDMRRX::setColorCode(uint8_t colorCode)
{ {
m_slot1RX.setColorCode(colorCode); m_slotRX.setColorCode(colorCode);
m_slot2RX.setColorCode(colorCode);
} }
void CDMRRX::setDelay(uint8_t delay) void CDMRRX::setDelay(uint8_t delay)
{ {
m_slot1RX.setDelay(delay); m_slotRX.setDelay(delay);
m_slot2RX.setDelay(delay);
} }
void CDMRRX::reset() void CDMRRX::reset()
{ {
m_slot1RX.reset(); m_slotRX.reset();
m_slot2RX.reset();
} }
#endif #endif

3
DMRRX.h
View file

@ -38,8 +38,7 @@ public:
void reset(); void reset();
private: private:
CDMRSlotRX m_slot1RX; CDMRSlotRX m_slotRX;
CDMRSlotRX m_slot2RX;
}; };
#endif #endif

76
DMRSlotRX.cpp
View file

@ -28,9 +28,6 @@
#include "DMRSlotType.h" #include "DMRSlotType.h"
#include "Utils.h" #include "Utils.h"
const uint16_t SCAN_START = 170U;
const uint16_t SCAN_END = 190U;
const uint8_t MAX_SYNC_BYTES_ERRS = 1U; const uint8_t MAX_SYNC_BYTES_ERRS = 1U;
const uint8_t MAX_SYNC_LOST_FRAMES = 13U; const uint8_t MAX_SYNC_LOST_FRAMES = 13U;
@ -41,8 +38,8 @@ const uint8_t CONTROL_NONE = 0x00U;
const uint8_t CONTROL_VOICE = 0x20U; const uint8_t CONTROL_VOICE = 0x20U;
const uint8_t CONTROL_DATA = 0x40U; const uint8_t CONTROL_DATA = 0x40U;
CDMRSlotRX::CDMRSlotRX(bool slot) : CDMRSlotRX::CDMRSlotRX() :
m_slot(slot), m_slot(false),
m_patternBuffer(0x00U), m_patternBuffer(0x00U),
m_buffer(), m_buffer(),
m_dataPtr(0U), m_dataPtr(0U),
@ -60,12 +57,10 @@ m_type(0U)
{ {
} }
void CDMRSlotRX::start() void CDMRSlotRX::start(bool slot)
{ {
m_dataPtr = 0U; m_slot = slot;
m_delayPtr = 0U; m_delayPtr = 0U;
m_patternBuffer = 0U;
m_control = CONTROL_NONE;
} }
void CDMRSlotRX::reset() void CDMRSlotRX::reset()
@ -77,6 +72,7 @@ void CDMRSlotRX::reset()
m_syncCount = 0U; m_syncCount = 0U;
m_state = DMRRXS_NONE; m_state = DMRRXS_NONE;
m_startPtr = 0U; m_startPtr = 0U;
m_patternBuffer = 0U;
m_endPtr = NOENDPTR; m_endPtr = NOENDPTR;
} }
@ -86,10 +82,6 @@ bool CDMRSlotRX::databit(bool bit)
if (m_delayPtr < m_delay) if (m_delayPtr < m_delay)
return m_state != DMRRXS_NONE; return m_state != DMRRXS_NONE;
// Ensure that the buffer doesn't overflow
if (m_dataPtr > m_endPtr || m_dataPtr >= 400U)
return m_state != DMRRXS_NONE;
m_buffer[m_dataPtr] = bit; m_buffer[m_dataPtr] = bit;
m_patternBuffer <<= 1; m_patternBuffer <<= 1;
@ -97,17 +89,27 @@ bool CDMRSlotRX::databit(bool bit)
m_patternBuffer |= 0x01U; m_patternBuffer |= 0x01U;
if (m_state == DMRRXS_NONE) { if (m_state == DMRRXS_NONE) {
if (m_dataPtr >= SCAN_START && m_dataPtr <= SCAN_END) correlateSync();
correlateSync(true);
} else { } else {
uint16_t min = m_syncPtr - 1U;
uint16_t max = m_syncPtr + 1U; uint16_t min = m_syncPtr + DMR_BUFFER_LENGTH_BITS - 2;
if (m_dataPtr >= min && m_dataPtr <= max) uint16_t max = m_syncPtr + 2;
correlateSync(false);
if (min >= DMR_BUFFER_LENGTH_BITS)
min -= DMR_BUFFER_LENGTH_BITS;
if (max >= DMR_BUFFER_LENGTH_BITS)
max -= DMR_BUFFER_LENGTH_BITS;
if (min < max) {
if (m_dataPtr >= min && m_dataPtr <= max)
correlateSync();
} else {
if (m_dataPtr >= min || m_dataPtr <= max)
correlateSync();
}
} }
if (m_dataPtr == m_endPtr) { if (m_dataPtr == m_endPtr) {
uint8_t frame[DMR_FRAME_LENGTH_BYTES + 3U];
frame[0U] = m_control; frame[0U] = m_control;
bitsToBytes(m_startPtr, DMR_FRAME_LENGTH_BYTES, frame + 1U); bitsToBytes(m_startPtr, DMR_FRAME_LENGTH_BYTES, frame + 1U);
@ -202,30 +204,49 @@ bool CDMRSlotRX::databit(bool bit)
} }
} }
} }
// End of this slot, reset some items for the next slot.
m_control = CONTROL_NONE;
} }
m_dataPtr++; m_dataPtr++;
if (m_dataPtr >= DMR_BUFFER_LENGTH_BITS)
m_dataPtr = 0U;
return m_state != DMRRXS_NONE; return m_state != DMRRXS_NONE;
} }
void CDMRSlotRX::correlateSync(bool first) void CDMRSlotRX::correlateSync()
{ {
if (countBits64((m_patternBuffer & DMR_SYNC_BITS_MASK) ^ DMR_MS_DATA_SYNC_BITS) <= MAX_SYNC_BYTES_ERRS) { if (countBits64((m_patternBuffer & DMR_SYNC_BITS_MASK) ^ DMR_MS_DATA_SYNC_BITS) <= MAX_SYNC_BYTES_ERRS) {
m_control = CONTROL_DATA; m_control = CONTROL_DATA;
m_syncPtr = m_dataPtr; m_syncPtr = m_dataPtr;
m_startPtr = m_dataPtr - DMR_SLOT_TYPE_LENGTH_BITS / 2U - DMR_INFO_LENGTH_BITS / 2U - DMR_SYNC_LENGTH_BITS + 1;
m_startPtr = m_dataPtr + DMR_BUFFER_LENGTH_BITS - DMR_SLOT_TYPE_LENGTH_BITS / 2U - DMR_INFO_LENGTH_BITS / 2U - DMR_SYNC_LENGTH_BITS + 1;
if (m_startPtr >= DMR_BUFFER_LENGTH_BITS)
m_startPtr -= DMR_BUFFER_LENGTH_BITS;
m_endPtr = m_dataPtr + DMR_SLOT_TYPE_LENGTH_BITS / 2U + DMR_INFO_LENGTH_BITS / 2U; m_endPtr = m_dataPtr + DMR_SLOT_TYPE_LENGTH_BITS / 2U + DMR_INFO_LENGTH_BITS / 2U;
DEBUG4("SYNC corr MS Data found pos/start/end:", m_dataPtr, m_startPtr, m_endPtr); if (m_endPtr >= DMR_BUFFER_LENGTH_BITS)
m_endPtr -= DMR_BUFFER_LENGTH_BITS;
//DEBUG4("SYNC corr MS Data found pos/start/end:", m_dataPtr, m_startPtr, m_endPtr);
} else if (countBits64((m_patternBuffer & DMR_SYNC_BITS_MASK) ^ DMR_MS_VOICE_SYNC_BITS) <= MAX_SYNC_BYTES_ERRS) { } else if (countBits64((m_patternBuffer & DMR_SYNC_BITS_MASK) ^ DMR_MS_VOICE_SYNC_BITS) <= MAX_SYNC_BYTES_ERRS) {
m_control = CONTROL_VOICE; m_control = CONTROL_VOICE;
m_syncPtr = m_dataPtr; m_syncPtr = m_dataPtr;
m_startPtr = m_dataPtr - DMR_SLOT_TYPE_LENGTH_BITS / 2U - DMR_INFO_LENGTH_BITS / 2U - DMR_SYNC_LENGTH_BITS + 1; m_startPtr = m_dataPtr + DMR_BUFFER_LENGTH_BITS - DMR_SLOT_TYPE_LENGTH_BITS / 2U - DMR_INFO_LENGTH_BITS / 2U - DMR_SYNC_LENGTH_BITS + 1;
if (m_startPtr >= DMR_BUFFER_LENGTH_BITS)
m_startPtr -= DMR_BUFFER_LENGTH_BITS;
m_endPtr = m_dataPtr + DMR_SLOT_TYPE_LENGTH_BITS / 2U + DMR_INFO_LENGTH_BITS / 2U; m_endPtr = m_dataPtr + DMR_SLOT_TYPE_LENGTH_BITS / 2U + DMR_INFO_LENGTH_BITS / 2U;
DEBUG4("SYNC corr MS Voice found pos/start/end: ", m_dataPtr, m_startPtr, m_endPtr); if (m_endPtr >= DMR_BUFFER_LENGTH_BITS)
m_endPtr -= DMR_BUFFER_LENGTH_BITS;
//DEBUG4("SYNC corr MS Voice found pos/start/end: ", m_dataPtr, m_startPtr, m_endPtr);
} }
} }
@ -243,6 +264,9 @@ void CDMRSlotRX::bitsToBytes(uint16_t start, uint8_t count, uint8_t* buffer)
buffer[i] |= ((m_buffer[start + 7U] & 0x01) << 0); buffer[i] |= ((m_buffer[start + 7U] & 0x01) << 0);
start += 8U; start += 8U;
if (start >= DMR_BUFFER_LENGTH_BITS)
start -= DMR_BUFFER_LENGTH_BITS;
} }
} }
@ -253,7 +277,7 @@ void CDMRSlotRX::setColorCode(uint8_t colorCode)
void CDMRSlotRX::setDelay(uint8_t delay) void CDMRSlotRX::setDelay(uint8_t delay)
{ {
m_delay = delay; m_delay = delay / 5;
} }
void CDMRSlotRX::writeRSSIData(uint8_t* frame) void CDMRSlotRX::writeRSSIData(uint8_t* frame)

11
DMRSlotRX.h
View file

@ -26,6 +26,8 @@
#include "DMRDefines.h" #include "DMRDefines.h"
const uint16_t DMR_BUFFER_LENGTH_BITS = 576U;
enum DMRRX_STATE { enum DMRRX_STATE {
DMRRXS_NONE, DMRRXS_NONE,
DMRRXS_VOICE, DMRRXS_VOICE,
@ -34,9 +36,9 @@ enum DMRRX_STATE {
class CDMRSlotRX { class CDMRSlotRX {
public: public:
CDMRSlotRX(bool slot); CDMRSlotRX();
void start(); void start(bool slot);
bool databit(bool bit); bool databit(bool bit);
@ -48,7 +50,8 @@ public:
private: private:
bool m_slot; bool m_slot;
uint64_t m_patternBuffer; uint64_t m_patternBuffer;
uint8_t m_buffer[400U]; uint8_t m_buffer[DMR_BUFFER_LENGTH_BITS];
uint8_t frame[DMR_FRAME_LENGTH_BYTES + 3U];
uint16_t m_dataPtr; uint16_t m_dataPtr;
uint16_t m_syncPtr; uint16_t m_syncPtr;
uint16_t m_startPtr; uint16_t m_startPtr;
@ -62,7 +65,7 @@ private:
uint8_t m_n; uint8_t m_n;
uint8_t m_type; uint8_t m_type;
void correlateSync(bool first); void correlateSync();
void bitsToBytes(uint16_t start, uint8_t count, uint8_t* buffer); void bitsToBytes(uint16_t start, uint8_t count, uint8_t* buffer);
void writeRSSIData(uint8_t* frame); void writeRSSIData(uint8_t* frame);
}; };

8
DMRTX.cpp
View file

@ -227,12 +227,12 @@ void CDMRTX::writeByte(uint8_t c, uint8_t control)
bit = 1U; bit = 1U;
else else
bit = 0U; bit = 0U;
control_tmp = MARK_NONE; control_tmp = MARK_NONE;
if( i == 0U) if( i == 7U || i == 6U)
control_tmp = control; control_tmp = control;
io.write(&bit, 1, &control_tmp); io.write(&bit, 1, &control_tmp);
} }
@ -271,7 +271,7 @@ void CDMRTX::createData(uint8_t slotIndex)
void CDMRTX::createCACH(uint8_t txSlotIndex, uint8_t rxSlotIndex) void CDMRTX::createCACH(uint8_t txSlotIndex, uint8_t rxSlotIndex)
{ {
m_frameCount++; m_frameCount++;
if (m_cachPtr >= 12U) if (m_cachPtr >= 12U)
m_cachPtr = 0U; m_cachPtr = 0U;

1
Globals.h
View file

@ -81,6 +81,7 @@ extern CDStarRX dstarRX;
extern CDStarTX dstarTX; extern CDStarTX dstarTX;
#if defined(DUPLEX) #if defined(DUPLEX)
extern uint8_t m_control;
extern CDMRIdleRX dmrIdleRX; extern CDMRIdleRX dmrIdleRX;
extern CDMRRX dmrRX; extern CDMRRX dmrRX;
extern CDMRTX dmrTX; extern CDMRTX dmrTX;

1
MMDVM_HS.cpp
View file

@ -43,6 +43,7 @@ CDStarRX dstarRX;
CDStarTX dstarTX; CDStarTX dstarTX;
#if defined(DUPLEX) #if defined(DUPLEX)
uint8_t m_control;
CDMRIdleRX dmrIdleRX; CDMRIdleRX dmrIdleRX;
CDMRRX dmrRX; CDMRRX dmrRX;
CDMRTX dmrTX; CDMRTX dmrTX;

1
MMDVM_HS.ino
View file

@ -39,6 +39,7 @@ CDStarRX dstarRX;
CDStarTX dstarTX; CDStarTX dstarTX;
#if defined(DUPLEX) #if defined(DUPLEX)
uint8_t m_control;
CDMRIdleRX dmrIdleRX; CDMRIdleRX dmrIdleRX;
CDMRRX dmrRX; CDMRRX dmrRX;
CDMRTX dmrTX; CDMRTX dmrTX;