Fix the synchronisation processing for M17.

This commit is contained in:
Jonathan Naylor 2020-10-23 18:10:53 +01:00
parent fc9cb227f3
commit 3f83f671a3
7 changed files with 23 additions and 24 deletions

View file

@ -505,7 +505,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
break; break;
case STATE_M17: case STATE_M17:
// Dev: +1 symb 600 Hz, symb rate = 4800 // Dev: +1 symb 2400 Hz, symb rate = 4800
ADF7021_REG3 = ADF7021_REG3_M17; ADF7021_REG3 = ADF7021_REG3_M17;
ADF7021_REG10 = ADF7021_REG10_M17; ADF7021_REG10 = ADF7021_REG10_M17;
@ -754,7 +754,7 @@ void CIO::ifConf2(MMDVM_STATE modemState)
break; break;
case STATE_M17: case STATE_M17:
// Dev: +1 symb 600 Hz, symb rate = 4800 // Dev: +1 symb 2400 Hz, symb rate = 4800
ADF7021_REG3 = ADF7021_REG3_M17; ADF7021_REG3 = ADF7021_REG3_M17;
ADF7021_REG10 = ADF7021_REG10_M17; ADF7021_REG10 = ADF7021_REG10_M17;

View file

@ -87,7 +87,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_DEV_P25 22U #define ADF7021_DEV_P25 22U
#endif #endif
#define ADF7021_DEV_NXDN 13U #define ADF7021_DEV_NXDN 13U
#define ADF7021_DEV_M17 23U // XXX FIXME #define ADF7021_DEV_M17 28U // XXX FIXME
#define ADF7021_DEV_POCSAG 160U #define ADF7021_DEV_POCSAG 160U
// TX/RX CLOCK register (REG 03) // TX/RX CLOCK register (REG 03)
@ -117,7 +117,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_DISC_BW_YSF_H 516U // K=28 #define ADF7021_DISC_BW_YSF_H 516U // K=28
#define ADF7021_DISC_BW_P25 394U // K=32 #define ADF7021_DISC_BW_P25 394U // K=32
#define ADF7021_DISC_BW_NXDN 295U // K=32 #define ADF7021_DISC_BW_NXDN 295U // K=32
#define ADF7021_DISC_BW_M17 393U // XXX FIXME #define ADF7021_DISC_BW_M17 459U // XXX FIXME
#define ADF7021_DISC_BW_POCSAG 406U // K=22 #define ADF7021_DISC_BW_POCSAG 406U // K=22
// Post demodulator bandwith (REG 04) // Post demodulator bandwith (REG 04)
@ -126,7 +126,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_POST_BW_YSF 20U #define ADF7021_POST_BW_YSF 20U
#define ADF7021_POST_BW_P25 6U #define ADF7021_POST_BW_P25 6U
#define ADF7021_POST_BW_NXDN 7U #define ADF7021_POST_BW_NXDN 7U
#define ADF7021_POST_BW_M17 7U // XXX FIXME #define ADF7021_POST_BW_M17 20U // XXX FIXME
#define ADF7021_POST_BW_POCSAG 1U #define ADF7021_POST_BW_POCSAG 1U
// IF filter (REG 05) // IF filter (REG 05)
@ -198,7 +198,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_DEV_P25 13U #define ADF7021_DEV_P25 13U
#endif #endif
#define ADF7021_DEV_NXDN 8U #define ADF7021_DEV_NXDN 8U
#define ADF7021_DEV_M17 14U // XXX FIXME #define ADF7021_DEV_M17 17U // XXX FIXME
#define ADF7021_DEV_POCSAG 96U #define ADF7021_DEV_POCSAG 96U
// TX/RX CLOCK register (REG 03) // TX/RX CLOCK register (REG 03)
@ -237,7 +237,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
#define ADF7021_POST_BW_YSF 20U #define ADF7021_POST_BW_YSF 20U
#define ADF7021_POST_BW_P25 6U #define ADF7021_POST_BW_P25 6U
#define ADF7021_POST_BW_NXDN 8U #define ADF7021_POST_BW_NXDN 8U
#define ADF7021_POST_BW_M17 7U // XXX FIXME #define ADF7021_POST_BW_M17 20U // XXX FIXME
#define ADF7021_POST_BW_POCSAG 1U #define ADF7021_POST_BW_POCSAG 1U
// IF filter (REG 05) // IF filter (REG 05)

View file

@ -23,25 +23,13 @@ const unsigned int M17_RADIO_SYMBOL_LENGTH = 5U; // At 24 kHz sample rate
const unsigned int M17_FRAME_LENGTH_BITS = 384U; const unsigned int M17_FRAME_LENGTH_BITS = 384U;
const unsigned int M17_FRAME_LENGTH_BYTES = M17_FRAME_LENGTH_BITS / 8U; const unsigned int M17_FRAME_LENGTH_BYTES = M17_FRAME_LENGTH_BITS / 8U;
const unsigned int M17_FRAME_LENGTH_SYMBOLS = M17_FRAME_LENGTH_BITS / 2U;
const unsigned int M17_FRAME_LENGTH_SAMPLES = M17_FRAME_LENGTH_SYMBOLS * M17_RADIO_SYMBOL_LENGTH;
const unsigned int M17_SYNC_LENGTH_BITS = 16U; const unsigned int M17_SYNC_LENGTH_BITS = 16U;
const unsigned int M17_SYNC_LENGTH_SYMBOLS = M17_SYNC_LENGTH_BITS / 2U;
const unsigned int M17_SYNC_LENGTH_SAMPLES = M17_SYNC_LENGTH_SYMBOLS * M17_RADIO_SYMBOL_LENGTH;
const uint8_t M17_SYNC_BYTES[] = {0x32U, 0x43U}; const uint8_t M17_SYNC_BYTES[] = {0x32U, 0x43U};
const uint8_t M17_SYNC_BYTES_LENGTH = 2U; const uint8_t M17_SYNC_BYTES_LENGTH = 2U;
const uint16_t M17_SYNC_BITS = 0x3243U; const uint16_t M17_SYNC_BITS = 0x3243U;
// 3 2 4 3
// 00 11 00 10 01 00 00 11
// +1 -3 +1 -1 +3 +1 +1 -3
const int8_t M17_SYNC_SYMBOLS_VALUES[] = {+1, -3, +1, -1, +3, +1, +1, -3};
const uint8_t M17_SYNC_SYMBOLS = 0xAEU;
#endif #endif

View file

@ -65,7 +65,7 @@ void CM17RX::processNone(bool bit)
m_bitBuffer |= 0x01U; m_bitBuffer |= 0x01U;
// Fuzzy matching of the data sync bit sequence // Fuzzy matching of the data sync bit sequence
if (countBits32(m_bitBuffer ^ M17_SYNC_BITS) <= MAX_SYNC_BIT_START_ERRS) { if (countBits16(m_bitBuffer ^ M17_SYNC_BITS) <= MAX_SYNC_BIT_START_ERRS) {
DEBUG1("M17RX: sync found in None"); DEBUG1("M17RX: sync found in None");
for (uint8_t i = 0U; i < M17_SYNC_BYTES_LENGTH; i++) for (uint8_t i = 0U; i < M17_SYNC_BYTES_LENGTH; i++)
m_buffer[i] = M17_SYNC_BYTES[i]; m_buffer[i] = M17_SYNC_BYTES[i];
@ -94,7 +94,7 @@ void CM17RX::processData(bool bit)
// Only search for a sync in the right place +-2 symbols // Only search for a sync in the right place +-2 symbols
if (m_bufferPtr >= (M17_SYNC_LENGTH_BITS - 2U) && m_bufferPtr <= (M17_SYNC_LENGTH_BITS + 2U)) { if (m_bufferPtr >= (M17_SYNC_LENGTH_BITS - 2U) && m_bufferPtr <= (M17_SYNC_LENGTH_BITS + 2U)) {
// Fuzzy matching of the data sync bit sequence // Fuzzy matching of the data sync bit sequence
if (countBits32(m_bitBuffer ^ M17_SYNC_BITS) <= MAX_SYNC_BIT_RUN_ERRS) { if (countBits16(m_bitBuffer ^ M17_SYNC_BITS) <= MAX_SYNC_BIT_RUN_ERRS) {
DEBUG2("M17RX: found sync in Data, pos", m_bufferPtr - M17_SYNC_LENGTH_BITS); DEBUG2("M17RX: found sync in Data, pos", m_bufferPtr - M17_SYNC_LENGTH_BITS);
m_lostCount = MAX_SYNC_FRAMES; m_lostCount = MAX_SYNC_FRAMES;
m_bufferPtr = M17_SYNC_LENGTH_BITS; m_bufferPtr = M17_SYNC_LENGTH_BITS;

View file

@ -37,7 +37,7 @@ public:
private: private:
M17RX_STATE m_state; M17RX_STATE m_state;
uint32_t m_bitBuffer; uint16_t m_bitBuffer;
uint8_t m_outBuffer[M17_FRAME_LENGTH_BYTES + 3U]; uint8_t m_outBuffer[M17_FRAME_LENGTH_BYTES + 3U];
uint8_t* m_buffer; uint8_t* m_buffer;
uint16_t m_bufferPtr; uint16_t m_bufferPtr;

View file

@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2015 by Jonathan Naylor G4KLX * Copyright (C) 2015,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU * Copyright (C) 2017 by Andy Uribe CA6JAU
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
@ -31,6 +31,15 @@ uint8_t countBits8(uint8_t bits)
return BITS_TABLE[bits]; return BITS_TABLE[bits];
} }
uint8_t countBits16(uint16_t bits)
{
uint8_t* p = (uint8_t*)&bits;
uint8_t n = 0U;
n += BITS_TABLE[p[0U]];
n += BITS_TABLE[p[1U]];
return n;
}
uint8_t countBits32(uint32_t bits) uint8_t countBits32(uint32_t bits)
{ {
uint8_t* p = (uint8_t*)&bits; uint8_t* p = (uint8_t*)&bits;

View file

@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX * Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU * Copyright (C) 2017 by Andy Uribe CA6JAU
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
@ -34,6 +34,8 @@
uint8_t countBits8(uint8_t bits); uint8_t countBits8(uint8_t bits);
uint8_t countBits16(uint16_t bits);
uint8_t countBits32(uint32_t bits); uint8_t countBits32(uint32_t bits);
uint8_t countBits64(uint64_t bits); uint8_t countBits64(uint64_t bits);