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https://github.com/g4klx/MMDVM_HS.git
synced 2025-12-06 07:02:00 +01:00
Fix the synchronisation processing for M17.
This commit is contained in:
parent
fc9cb227f3
commit
3f83f671a3
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@ -505,7 +505,7 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
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break;
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break;
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case STATE_M17:
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case STATE_M17:
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// Dev: +1 symb 600 Hz, symb rate = 4800
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// Dev: +1 symb 2400 Hz, symb rate = 4800
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ADF7021_REG3 = ADF7021_REG3_M17;
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ADF7021_REG3 = ADF7021_REG3_M17;
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ADF7021_REG10 = ADF7021_REG10_M17;
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ADF7021_REG10 = ADF7021_REG10_M17;
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@ -754,7 +754,7 @@ void CIO::ifConf2(MMDVM_STATE modemState)
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break;
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break;
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case STATE_M17:
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case STATE_M17:
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// Dev: +1 symb 600 Hz, symb rate = 4800
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// Dev: +1 symb 2400 Hz, symb rate = 4800
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ADF7021_REG3 = ADF7021_REG3_M17;
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ADF7021_REG3 = ADF7021_REG3_M17;
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ADF7021_REG10 = ADF7021_REG10_M17;
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ADF7021_REG10 = ADF7021_REG10_M17;
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10
ADF7021.h
10
ADF7021.h
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@ -87,7 +87,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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#define ADF7021_DEV_P25 22U
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#define ADF7021_DEV_P25 22U
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#endif
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#endif
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#define ADF7021_DEV_NXDN 13U
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#define ADF7021_DEV_NXDN 13U
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#define ADF7021_DEV_M17 23U // XXX FIXME
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#define ADF7021_DEV_M17 28U // XXX FIXME
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#define ADF7021_DEV_POCSAG 160U
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#define ADF7021_DEV_POCSAG 160U
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// TX/RX CLOCK register (REG 03)
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// TX/RX CLOCK register (REG 03)
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@ -117,7 +117,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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#define ADF7021_DISC_BW_YSF_H 516U // K=28
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#define ADF7021_DISC_BW_YSF_H 516U // K=28
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#define ADF7021_DISC_BW_P25 394U // K=32
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#define ADF7021_DISC_BW_P25 394U // K=32
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#define ADF7021_DISC_BW_NXDN 295U // K=32
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#define ADF7021_DISC_BW_NXDN 295U // K=32
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#define ADF7021_DISC_BW_M17 393U // XXX FIXME
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#define ADF7021_DISC_BW_M17 459U // XXX FIXME
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#define ADF7021_DISC_BW_POCSAG 406U // K=22
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#define ADF7021_DISC_BW_POCSAG 406U // K=22
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// Post demodulator bandwith (REG 04)
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// Post demodulator bandwith (REG 04)
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@ -126,7 +126,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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#define ADF7021_POST_BW_YSF 20U
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#define ADF7021_POST_BW_YSF 20U
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#define ADF7021_POST_BW_P25 6U
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#define ADF7021_POST_BW_P25 6U
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#define ADF7021_POST_BW_NXDN 7U
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#define ADF7021_POST_BW_NXDN 7U
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#define ADF7021_POST_BW_M17 7U // XXX FIXME
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#define ADF7021_POST_BW_M17 20U // XXX FIXME
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#define ADF7021_POST_BW_POCSAG 1U
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#define ADF7021_POST_BW_POCSAG 1U
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// IF filter (REG 05)
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// IF filter (REG 05)
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@ -198,7 +198,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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#define ADF7021_DEV_P25 13U
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#define ADF7021_DEV_P25 13U
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#endif
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#endif
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#define ADF7021_DEV_NXDN 8U
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#define ADF7021_DEV_NXDN 8U
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#define ADF7021_DEV_M17 14U // XXX FIXME
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#define ADF7021_DEV_M17 17U // XXX FIXME
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#define ADF7021_DEV_POCSAG 96U
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#define ADF7021_DEV_POCSAG 96U
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// TX/RX CLOCK register (REG 03)
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// TX/RX CLOCK register (REG 03)
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@ -237,7 +237,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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#define ADF7021_POST_BW_YSF 20U
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#define ADF7021_POST_BW_YSF 20U
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#define ADF7021_POST_BW_P25 6U
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#define ADF7021_POST_BW_P25 6U
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#define ADF7021_POST_BW_NXDN 8U
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#define ADF7021_POST_BW_NXDN 8U
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#define ADF7021_POST_BW_M17 7U // XXX FIXME
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#define ADF7021_POST_BW_M17 20U // XXX FIXME
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#define ADF7021_POST_BW_POCSAG 1U
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#define ADF7021_POST_BW_POCSAG 1U
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// IF filter (REG 05)
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// IF filter (REG 05)
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12
M17Defines.h
12
M17Defines.h
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@ -23,25 +23,13 @@ const unsigned int M17_RADIO_SYMBOL_LENGTH = 5U; // At 24 kHz sample rate
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const unsigned int M17_FRAME_LENGTH_BITS = 384U;
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const unsigned int M17_FRAME_LENGTH_BITS = 384U;
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const unsigned int M17_FRAME_LENGTH_BYTES = M17_FRAME_LENGTH_BITS / 8U;
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const unsigned int M17_FRAME_LENGTH_BYTES = M17_FRAME_LENGTH_BITS / 8U;
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const unsigned int M17_FRAME_LENGTH_SYMBOLS = M17_FRAME_LENGTH_BITS / 2U;
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const unsigned int M17_FRAME_LENGTH_SAMPLES = M17_FRAME_LENGTH_SYMBOLS * M17_RADIO_SYMBOL_LENGTH;
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const unsigned int M17_SYNC_LENGTH_BITS = 16U;
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const unsigned int M17_SYNC_LENGTH_BITS = 16U;
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const unsigned int M17_SYNC_LENGTH_SYMBOLS = M17_SYNC_LENGTH_BITS / 2U;
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const unsigned int M17_SYNC_LENGTH_SAMPLES = M17_SYNC_LENGTH_SYMBOLS * M17_RADIO_SYMBOL_LENGTH;
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const uint8_t M17_SYNC_BYTES[] = {0x32U, 0x43U};
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const uint8_t M17_SYNC_BYTES[] = {0x32U, 0x43U};
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const uint8_t M17_SYNC_BYTES_LENGTH = 2U;
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const uint8_t M17_SYNC_BYTES_LENGTH = 2U;
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const uint16_t M17_SYNC_BITS = 0x3243U;
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const uint16_t M17_SYNC_BITS = 0x3243U;
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// 3 2 4 3
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// 00 11 00 10 01 00 00 11
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// +1 -3 +1 -1 +3 +1 +1 -3
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const int8_t M17_SYNC_SYMBOLS_VALUES[] = {+1, -3, +1, -1, +3, +1, +1, -3};
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const uint8_t M17_SYNC_SYMBOLS = 0xAEU;
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#endif
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#endif
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@ -65,7 +65,7 @@ void CM17RX::processNone(bool bit)
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m_bitBuffer |= 0x01U;
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m_bitBuffer |= 0x01U;
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// Fuzzy matching of the data sync bit sequence
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// Fuzzy matching of the data sync bit sequence
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if (countBits32(m_bitBuffer ^ M17_SYNC_BITS) <= MAX_SYNC_BIT_START_ERRS) {
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if (countBits16(m_bitBuffer ^ M17_SYNC_BITS) <= MAX_SYNC_BIT_START_ERRS) {
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DEBUG1("M17RX: sync found in None");
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DEBUG1("M17RX: sync found in None");
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for (uint8_t i = 0U; i < M17_SYNC_BYTES_LENGTH; i++)
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for (uint8_t i = 0U; i < M17_SYNC_BYTES_LENGTH; i++)
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m_buffer[i] = M17_SYNC_BYTES[i];
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m_buffer[i] = M17_SYNC_BYTES[i];
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@ -94,7 +94,7 @@ void CM17RX::processData(bool bit)
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// Only search for a sync in the right place +-2 symbols
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// Only search for a sync in the right place +-2 symbols
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if (m_bufferPtr >= (M17_SYNC_LENGTH_BITS - 2U) && m_bufferPtr <= (M17_SYNC_LENGTH_BITS + 2U)) {
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if (m_bufferPtr >= (M17_SYNC_LENGTH_BITS - 2U) && m_bufferPtr <= (M17_SYNC_LENGTH_BITS + 2U)) {
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// Fuzzy matching of the data sync bit sequence
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// Fuzzy matching of the data sync bit sequence
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if (countBits32(m_bitBuffer ^ M17_SYNC_BITS) <= MAX_SYNC_BIT_RUN_ERRS) {
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if (countBits16(m_bitBuffer ^ M17_SYNC_BITS) <= MAX_SYNC_BIT_RUN_ERRS) {
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DEBUG2("M17RX: found sync in Data, pos", m_bufferPtr - M17_SYNC_LENGTH_BITS);
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DEBUG2("M17RX: found sync in Data, pos", m_bufferPtr - M17_SYNC_LENGTH_BITS);
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m_lostCount = MAX_SYNC_FRAMES;
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m_lostCount = MAX_SYNC_FRAMES;
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m_bufferPtr = M17_SYNC_LENGTH_BITS;
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m_bufferPtr = M17_SYNC_LENGTH_BITS;
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2
M17RX.h
2
M17RX.h
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@ -37,7 +37,7 @@ public:
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private:
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private:
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M17RX_STATE m_state;
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M17RX_STATE m_state;
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uint32_t m_bitBuffer;
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uint16_t m_bitBuffer;
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uint8_t m_outBuffer[M17_FRAME_LENGTH_BYTES + 3U];
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uint8_t m_outBuffer[M17_FRAME_LENGTH_BYTES + 3U];
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uint8_t* m_buffer;
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uint8_t* m_buffer;
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uint16_t m_bufferPtr;
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uint16_t m_bufferPtr;
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11
Utils.cpp
11
Utils.cpp
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (C) 2015 by Jonathan Naylor G4KLX
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* Copyright (C) 2015,2020 by Jonathan Naylor G4KLX
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* Copyright (C) 2017 by Andy Uribe CA6JAU
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* Copyright (C) 2017 by Andy Uribe CA6JAU
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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@ -31,6 +31,15 @@ uint8_t countBits8(uint8_t bits)
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return BITS_TABLE[bits];
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return BITS_TABLE[bits];
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}
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}
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uint8_t countBits16(uint16_t bits)
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{
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uint8_t* p = (uint8_t*)&bits;
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uint8_t n = 0U;
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n += BITS_TABLE[p[0U]];
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n += BITS_TABLE[p[1U]];
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return n;
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}
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uint8_t countBits32(uint32_t bits)
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uint8_t countBits32(uint32_t bits)
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{
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{
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uint8_t* p = (uint8_t*)&bits;
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uint8_t* p = (uint8_t*)&bits;
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4
Utils.h
4
Utils.h
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
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* Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
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* Copyright (C) 2017 by Andy Uribe CA6JAU
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* Copyright (C) 2017 by Andy Uribe CA6JAU
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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@ -34,6 +34,8 @@
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uint8_t countBits8(uint8_t bits);
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uint8_t countBits8(uint8_t bits);
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uint8_t countBits16(uint16_t bits);
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uint8_t countBits32(uint32_t bits);
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uint8_t countBits32(uint32_t bits);
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uint8_t countBits64(uint64_t bits);
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uint8_t countBits64(uint64_t bits);
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