mirror of
https://github.com/g4klx/MMDVM_HS.git
synced 2026-01-04 15:50:02 +01:00
Merge branch 'master' into duplex
This commit is contained in:
Andy CA6JAU
commit
041c776105
25
ADF7021.cpp
25
ADF7021.cpp
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@ -251,6 +251,10 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
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ADF7021_TX_REG0 |= (uint32_t) N_divider << 19; // frequency;
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ADF7021_TX_REG0 |= (uint32_t) F_divider << 4; // frequency;
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#if defined(TEST_TX)
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modemState = STATE_DSTAR;
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#endif
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switch (modemState) {
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case STATE_DSTAR:
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// Dev: 1200 Hz, symb rate = 4800
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@ -377,8 +381,12 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
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AD7021_control_word = ADF7021_REG2;
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Send_AD7021_control();
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// TEST MODE (disabled) (15)
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AD7021_control_word = 0x000E000F;
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// TEST DAC (14)
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#if defined(TEST_DAC)
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AD7021_control_word = 0x0000001E;
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#else
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AD7021_control_word = 0x0000000E;
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#endif
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Send_AD7021_control();
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// AGC (auto, defaults) (9)
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@ -400,7 +408,18 @@ void CIO::ifConf(MMDVM_STATE modemState, bool reset)
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// 3FSK/4FSK DEMOD (13)
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AD7021_control_word = ADF7021_REG13;
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Send_AD7021_control();
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#if defined(TEST_TX)
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PTT_pin(HIGH);
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AD7021_control_word = ADF7021_TX_REG0;
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Send_AD7021_control();
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// TEST MODE (TX carrier only) (15)
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AD7021_control_word = 0x000E010F;
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#else
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// TEST MODE (disabled) (15)
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AD7021_control_word = 0x000E000F;
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#endif
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Send_AD7021_control();
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}
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void CIO::interrupt()
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94
ADF7021.h
94
ADF7021.h
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@ -34,6 +34,14 @@ http://www.analog.com/en/products/rf-microwave/integrated-transceivers-transmitt
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www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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*/
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/***** Test modes ****/
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// Enable SWD pin to access the demodulator output signal
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// See application note AN-852 and ADF7021 datasheet, page 60
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// #define TEST_DAC
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// Transmit the carrier frequency
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// #define TEST_TX
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/****** Support for 14.7456 MHz TCXO (modified RF7021SE boards) ******/
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#if defined(ADF7021_14_7456)
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@ -55,9 +63,15 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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// TX/RX CLOCK register (REG 03)
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#define ADF7021_REG3_DSTAR 0x2A4C4193
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#if defined(TEST_DAC)
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#define ADF7021_REG3_DMR 0x2A4C04D3
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#define ADF7021_REG3_YSF 0x2A4C04D3
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#define ADF7021_REG3_P25 0x2A4C04D3
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#else
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#define ADF7021_REG3_DMR 0x2A4C80D3
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#define ADF7021_REG3_YSF 0x2A4C80D3
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#define ADF7021_REG3_P25 0x2A4C80D3
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#endif
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// Discriminator bandwith, demodulator (REG 04)
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// Bug in ADI evaluation software, use datasheet formula (4FSK)
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@ -69,7 +83,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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// Post demodulator bandwith (REG 04)
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#define ADF7021_POST_BW_DSTAR 10U
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#define ADF7021_POST_BW_DMR 65U
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#define ADF7021_POST_BW_DMR 100U
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#define ADF7021_POST_BW_YSF 20U
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#define ADF7021_POST_BW_P25 6U
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@ -104,76 +118,6 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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#define AFC_OFFSET_P25 0
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#endif
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/****** Support for 19.6800 MHz TCXO (original RF7021SE boards) ******/
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#elif defined(ADF7021_19_6800)
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// R = 4
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#define ADF7021_PFD 4920000.0
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// PLL (REG 01)
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#define ADF7021_REG1_VHF1 0x021F5041
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#define ADF7021_REG1_VHF2 0x021F5041
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#define ADF7021_REG1_UHF1 0x00575041
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#define ADF7021_REG1_UHF2 0x00535041
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// Deviation of modulator (REG 02)
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#define ADF7021_DEV_DSTAR 32U
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#define ADF7021_DEV_DMR 17U
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#define ADF7021_DEV_YSF_L 14U
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#define ADF7021_DEV_YSF_H 27U
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#define ADF7021_DEV_P25 16U
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// TX/RX CLOCK register (REG 03)
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#define ADF7021_REG3_DSTAR 0x2B1449E3
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#define ADF7021_REG3_DMR 0x2B148123
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#define ADF7021_REG3_YSF 0x2B148123
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#define ADF7021_REG3_P25 0x2B148123
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// Discriminator bandwith, demodulator (REG 04)
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// Bug in ADI evaluation software, use datasheet formula (4FSK)
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#define ADF7021_DISC_BW_DSTAR 597U // K=85
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#define ADF7021_DISC_BW_DMR 393U // K=32
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#define ADF7021_DISC_BW_YSF_L 394U // K=32
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#define ADF7021_DISC_BW_YSF_H 344U // K=28
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#define ADF7021_DISC_BW_P25 394U // K=32
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// Post demodulator bandwith (REG 04)
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#define ADF7021_POST_BW_DSTAR 10U
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#define ADF7021_POST_BW_DMR 65U
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#define ADF7021_POST_BW_YSF 20U
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#define ADF7021_POST_BW_P25 6U
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// IF filter (REG 05)
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#define ADF7021_REG5 0x00003155
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// IF CAL (coarse cal, defaults) (REG 06)
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#define ADF7021_REG6 0x050972C6
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// AFC (REG 10)
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#define ADF7021_REG10_DSTAR 0x0C96355A
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#if defined(ADF7021_ENABLE_4FSK_AFC)
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#define ADF7021_REG10_DMR 0x01FE355A
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#define ADF7021_REG10_YSF 0x01FE355A
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#define ADF7021_REG10_P25 0x01FE355A
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#if defined(ADF7021_AFC_POS)
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#define AFC_OFFSET_DMR -250
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#define AFC_OFFSET_YSF -250
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#define AFC_OFFSET_P25 -250
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#else
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#define AFC_OFFSET_DMR 250
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#define AFC_OFFSET_YSF 250
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#define AFC_OFFSET_P25 250
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#endif
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#else
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#define ADF7021_REG10_DMR 0x049E354A
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#define ADF7021_REG10_YSF 0x049E354A
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#define ADF7021_REG10_P25 0x049E354A
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#define AFC_OFFSET_DMR 0
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#define AFC_OFFSET_YSF 0
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#define AFC_OFFSET_P25 0
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#endif
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/****** Support for 12.2880 MHz TCXO ******/
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#elif defined(ADF7021_12_2880)
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@ -195,9 +139,15 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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// TX/RX CLOCK register (REG 03)
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#define ADF7021_REG3_DSTAR 0x29EC4153
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#if defined(TEST_DAC)
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#define ADF7021_REG3_DMR 0x29EC0493
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#define ADF7021_REG3_YSF 0x29EC0493
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#define ADF7021_REG3_P25 0x29EC0493
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#else
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#define ADF7021_REG3_DMR 0x29ECA093
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#define ADF7021_REG3_YSF 0x29ECA093
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#define ADF7021_REG3_P25 0x29ECA093
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#endif
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// Discriminator bandwith, demodulator (REG 04)
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// Bug in ADI evaluation software, use datasheet formula (4FSK)
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@ -209,7 +159,7 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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// Post demodulator bandwith (REG 04)
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#define ADF7021_POST_BW_DSTAR 10U
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#define ADF7021_POST_BW_DMR 65U
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#define ADF7021_POST_BW_DMR 100U
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#define ADF7021_POST_BW_YSF 20U
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#define ADF7021_POST_BW_P25 6U
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72
BUILD.txt
72
BUILD.txt
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@ -30,6 +30,17 @@ dtoverlay=pi3-disable-bt
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- Reboot the RPi:
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sudo reboot
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* Enable serial port /dev/ttyAMA0 (Raspberry Pi 2 only):
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- Edit /boot/cmdline.txt
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sudo nano /boot/cmdline.txt
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(remove the text: console=serial0,115200)
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- Disable services:
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sudo systemctl disable serial-getty@ttyAMA0.service
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- Reboot the RPi:
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sudo reboot
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* Build de firmware and upload to ZUMSpot:
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cd ~
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- Install the necessary software tools:
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@ -75,3 +86,64 @@ nano MMDVM.ini
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- Execute MMDVMHost:
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./MMDVMHost MMDVM.ini
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2) ZUMSpot USB:
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* Windows:
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coming soon...
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* Linux:
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coming soon...
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3) Makefile options:
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make clean: delete all objects files *.o, for starting a new firmware building.
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make: it builds a standard firmware (without USB bootloader support).
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make bl: it builds a firmware with USB bootloader support.
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make zumspot-pi: upload the firmware to a ZUMSpot Pi version (using internal RPi serial port)
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make dfu [devser=/dev/ttyXXX]: upload firmware using USB bootloader. "devser" is optional,
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and it corresponds to the USB serial port device name. This option permits to perform a reset
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to enter to booloader mode (DFU). If you don't use "devser", you have to press the reset button
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of the ZUMSpot just before using this command.
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make serial devser=/dev/ttyXXX: upload standard firmware using serial port bootloader method.
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make serial-bl devser=/dev/ttyXXX: upload firmware with USB bootloader support using serial
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port bootloader method.
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make stlink: upload standard firmware using ST-Link interface.
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make stlink-bl: upload firmware with USB bootloader support using ST-Link interface.
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make ocd: upload standard firmware using ST-Link interface. This method uses a local
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openocd installation.
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make ocd-bl: upload firmware with USB bootloader support using ST-Link interface. This
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method uses a local openocd installation.
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* Common Makefile commands:
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- Serial programming (first programming, transfer the USB bootloader):
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make clean
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make bl
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sudo make serial-bl devser=/dev/ttyUSB0
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- USB programming (you have already transfered the USB bootloader):
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make clean
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make bl
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sudo make dfu (reset ZUMSpot before) or
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sudo make dfu devser=/dev/ttyACM0 (/dev/ttyACM0 is the device name of ZUMSpot USB under
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Raspbian)
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- ZUMSpot Pi (no USB support needed):
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make clean
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make
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sudo make zumspot-pi
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4) Config.h options:
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coming soon...
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2
Config.h
2
Config.h
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@ -41,8 +41,6 @@
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#define ADF7021_14_7456
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// For 12.2880 MHz:
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// #define ADF7021_12_2880
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// Original 19.68 MHz, not working, only for experimentation:
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// #define ADF7021_19_6800
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// AFC is enabled by default in D-Star
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@ -23,6 +23,8 @@
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#include "Config.h"
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#include "Globals.h"
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const uint8_t DMR_SYNC = 0x5FU;
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CDMRDMOTX::CDMRDMOTX() :
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m_fifo(),
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m_poBuffer(),
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@ -43,7 +45,7 @@ void CDMRDMOTX::process()
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m_delay = false;
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for (unsigned int i = 0U; i < 72U; i++)
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m_poBuffer[m_poLen++] = 0x00U;
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m_poBuffer[m_poLen++] = DMR_SYNC;
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for (unsigned int i = 0U; i < DMR_FRAME_LENGTH_BYTES; i++)
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m_poBuffer[i] = m_fifo.get();
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@ -58,7 +60,7 @@ void CDMRDMOTX::process()
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while (space > 8U) {
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if (m_delay) {
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m_poPtr++;
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writeByte(0U);
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writeByte(DMR_SYNC);
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} else
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writeByte(m_poBuffer[m_poPtr++]);
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