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DMR trunking patches to DMRTX and SerialPort
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parent
3fd84d5ed4
commit
a696fd454c
3 changed files with 61 additions and 7 deletions
49
DMRTX.cpp
49
DMRTX.cpp
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@ -2,6 +2,7 @@
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* Copyright (C) 2009-2017,2020 by Jonathan Naylor G4KLX
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* Copyright (C) 2016 by Colin Durbridge G4EML
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* Copyright (C) 2017 by Andy Uribe CA6JAU
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* Copyright (C) 2022,2023,2026 by Adrian Musceac YO8RZZ
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -42,6 +43,12 @@ const uint8_t IDLE_DATA[] =
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0x36U, 0x00U, 0x0DU, 0xFFU, 0x57U, 0xD7U, 0x5DU, 0xF5U, 0xD0U, 0x03U, 0xF6U,
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0xE4U, 0x65U, 0x17U, 0x1BU, 0x48U, 0xCAU, 0x6DU, 0x4FU, 0xC6U, 0x10U, 0xB4U};
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// DT Terminator with LC, empty
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const uint8_t TERMINATOR_DATA[] =
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{0x00U, 0xCCU, 0x01U, 0x80U, 0x01U, 0x94U, 0x01U, 0x48U, 0x08U, 0xB0U, 0x08U,
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0x80U, 0x04U, 0xADU, 0xFFU, 0x57U, 0xD7U, 0x5DU, 0xF5U, 0xD9U, 0x65U, 0x90U,
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0x01U, 0x78U, 0x00U, 0xD0U, 0x08U, 0x40U, 0x14U, 0x00U, 0x0DU, 0x80U, 0x15U};
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const uint8_t CACH_INTERLEAVE[] =
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{ 1U, 2U, 3U, 5U, 6U, 7U, 9U, 10U, 11U, 13U, 15U, 16U, 17U, 19U, 20U, 21U, 23U,
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25U, 26U, 27U, 29U, 30U, 31U, 33U, 34U, 35U, 37U, 39U, 40U, 41U, 43U, 44U, 45U, 47U,
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@ -65,6 +72,7 @@ m_modFilter(),
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m_modState(),
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m_state(DMRTXSTATE_IDLE),
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m_idle(),
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m_aloha(),
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m_cachPtr(0U),
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m_shortLC(),
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m_newShortLC(),
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@ -74,7 +82,9 @@ m_poLen(0U),
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m_poPtr(0U),
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m_frameCount(0U),
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m_abortCount(),
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m_abort()
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m_abort(),
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m_controlChannel(false),
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m_trunking(false)
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{
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::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
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@ -211,6 +221,15 @@ uint8_t CDMRTX::writeShortLC(const uint8_t* data, uint16_t length)
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return 0U;
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}
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uint8_t CDMRTX::writeAloha(const uint8_t* data, uint16_t length)
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{
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if (length != DMR_FRAME_LENGTH_BYTES)
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return 4U;
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::memcpy(m_aloha, data, length);
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m_controlChannel = true;
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return 0U;
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}
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uint8_t CDMRTX::writeAbort(const uint8_t* data, uint16_t length)
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{
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if (length != 1U)
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@ -303,7 +322,12 @@ void CDMRTX::createData(uint8_t slotIndex)
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m_abort[slotIndex] = false;
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// Transmit an idle message
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for (unsigned int i = 0U; i < DMR_FRAME_LENGTH_BYTES; i++) {
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m_poBuffer[i] = m_idle[i];
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if(slotIndex == 0 && m_controlChannel && m_trunking) {
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m_poBuffer[i] = m_aloha[i];
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}
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else {
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m_poBuffer[i] = m_idle[i];
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}
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m_markBuffer[i] = MARK_NONE;
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}
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}
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@ -355,8 +379,6 @@ void CDMRTX::createCACH(uint8_t txSlotIndex, uint8_t rxSlotIndex)
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if (m_cachPtr == 0U) {
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if (m_fifo[0U].getData() == 0U && m_fifo[1U].getData() == 0U)
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::memcpy(m_shortLC, EMPTY_SHORT_LC, 12U);
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else
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::memcpy(m_shortLC, m_newShortLC, 12U);
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}
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@ -397,10 +419,19 @@ void CDMRTX::createCACH(uint8_t txSlotIndex, uint8_t rxSlotIndex)
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void CDMRTX::setColorCode(uint8_t colorCode)
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{
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::memcpy(m_idle, IDLE_DATA, DMR_FRAME_LENGTH_BYTES);
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if(m_trunking)
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::memcpy(m_idle, TERMINATOR_DATA, DMR_FRAME_LENGTH_BYTES);
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else
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::memcpy(m_idle, IDLE_DATA, DMR_FRAME_LENGTH_BYTES);
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CDMRSlotType slotType;
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slotType.encode(colorCode, DT_IDLE, m_idle);
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if(m_trunking) {
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slotType.encode(colorCode, DT_TERMINATOR_WITH_LC, m_idle);
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slotType.encode(colorCode, DT_CSBK, m_aloha);
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}
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else {
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slotType.encode(colorCode, DT_IDLE, m_idle);
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}
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}
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void CDMRTX::resetFifo1()
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@ -418,5 +449,11 @@ uint32_t CDMRTX::getFrameCount()
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return m_frameCount;
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}
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void CDMRTX::setTrunking(bool trunking)
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{
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m_trunking = trunking;
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}
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#endif
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6
DMRTX.h
6
DMRTX.h
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@ -1,6 +1,7 @@
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/*
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* Copyright (C) 2015,2016,2017,2020 by Jonathan Naylor G4KLX
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* Copyright (C) 2016 by Colin Durbridge G4EML
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* Copyright (C) 2026 by Adrian Musceac YO8RZZ
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -45,10 +46,12 @@ public:
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uint8_t writeData2(const uint8_t* data, uint16_t length);
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uint8_t writeShortLC(const uint8_t* data, uint16_t length);
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uint8_t writeAloha(const uint8_t* data, uint16_t length);
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uint8_t writeAbort(const uint8_t* data, uint16_t length);
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void setStart(bool start);
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void setCal(bool start);
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void setTrunking(bool trunking);
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void process();
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@ -67,6 +70,7 @@ private:
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q15_t m_modState[16U]; // blockSize + phaseLength - 1, 4 + 9 - 1 plus some spare
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DMRTXSTATE m_state;
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uint8_t m_idle[DMR_FRAME_LENGTH_BYTES];
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uint8_t m_aloha[DMR_FRAME_LENGTH_BYTES];
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uint8_t m_cachPtr;
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uint8_t m_shortLC[12U];
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uint8_t m_newShortLC[12U];
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@ -77,6 +81,8 @@ private:
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uint32_t m_frameCount;
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uint32_t m_abortCount[2U];
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bool m_abort[2U];
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bool m_controlChannel;
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bool m_trunking;
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void createData(uint8_t slotIndex);
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void createCACH(uint8_t txSlotIndex, uint8_t rxSlotIndex);
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@ -50,6 +50,7 @@ const uint8_t MMDVM_DMR_LOST1 = 0x19U;
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const uint8_t MMDVM_DMR_DATA2 = 0x1AU;
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const uint8_t MMDVM_DMR_LOST2 = 0x1BU;
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const uint8_t MMDVM_DMR_SHORTLC = 0x1CU;
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const uint8_t MMDVM_DMR_ALOHA = 0x14U;
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const uint8_t MMDVM_DMR_START = 0x1DU;
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const uint8_t MMDVM_DMR_ABORT = 0x1EU;
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@ -466,6 +467,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint16_t length)
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#endif
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#if defined(MODE_DMR)
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bool trunking = (data[25U] & 128U) == 128U;
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uint8_t colorCode = data[26U];
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if (colorCode > 15U)
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return 4U;
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@ -484,7 +486,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint16_t length)
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#if defined(MODE_DMR)
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m_dmrEnable = dmrEnable;
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dmrDMOTX.setTXDelay(txDelay);
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dmrTX.setTrunking(trunking);
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dmrTX.setColorCode(colorCode);
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dmrRX.setColorCode(colorCode);
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dmrRX.setDelay(dmrDelay);
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@ -1123,6 +1125,15 @@ void CSerialPort::processMessage(uint8_t type, const uint8_t* buffer, uint16_t l
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}
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break;
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case MMDVM_DMR_ALOHA:
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if (m_dmrEnable)
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err = dmrTX.writeAloha(buffer, length);
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if (err != 0U) {
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DEBUG2("Received invalid DMR ALOHA", err);
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sendNAK(type, err);
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}
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break;
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case MMDVM_DMR_ABORT:
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if (m_dmrEnable)
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err = dmrTX.writeAbort(buffer, length);
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