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https://github.com/g4klx/DMRGateway.git
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Finish off the translation logic.
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parent
10e890bdd4
commit
8fc9872aaa
5 changed files with 55 additions and 66 deletions
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@ -49,38 +49,47 @@ bool CRewriteDynTGRF::process(CDMRData& data, bool trace)
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unsigned int dstId = data.getDstId();
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unsigned int slotNo = data.getSlotNo();
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if (flco != FLCO_GROUP || slotNo != m_fromSlot || dstId < m_fromTGStart || dstId > m_fromTGEnd) {
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if (trace) {
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if (m_fromTGStart == m_fromTGEnd)
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LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u: not matched", m_name.c_str(), m_fromSlot, m_fromTGStart);
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else
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LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u-TG%u: not matched", m_name.c_str(), m_fromSlot, m_fromTGStart, m_fromTGEnd);
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}
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return false;
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}
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if (m_fromSlot != m_toSlot)
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data.setSlotNo(m_toSlot);
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if (m_fromTGStart != m_toTGStart) {
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unsigned int newTG = dstId + m_toTGStart - m_fromTGStart;
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data.setDstId(newTG);
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if (flco == FLCO_GROUP && slotNo == m_slot && dstId == m_toTG && m_currentTG != 0U) {
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data.setDstId(m_currentTG);
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processMessage(data);
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if (trace)
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LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u: matched", m_name.c_str(), m_slot, m_toTG);
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return true;
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}
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if (flco == FLCO_GROUP && slotNo == m_slot && dstId == m_discTG && m_currentTG != 0U) {
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if (trace)
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LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u: matched", m_name.c_str(), m_slot, m_discTG);
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m_rewriteNet->setCurrentTG(0U);
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m_currentTG = 0U;
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return true;
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}
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if (flco == FLCO_GROUP && slotNo == m_slot && dstId >= m_fromTGStart && dstId <= m_fromTGEnd) {
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if (trace) {
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if (m_fromTGStart == m_fromTGEnd)
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LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u: matched", m_name.c_str(), m_slot, m_fromTGStart);
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else
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LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u-TG%u: matched", m_name.c_str(), m_slot, m_fromTGStart, m_fromTGEnd);
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}
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m_rewriteNet->setCurrentTG(dstId);
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m_currentTG = dstId;
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return true;
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}
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if (trace) {
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if (m_fromTGStart == m_fromTGEnd)
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LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u: matched", m_name.c_str(), m_fromSlot, m_fromTGStart);
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LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u or Dst=TG%u or Dst=TG%u: not matched", m_name.c_str(), m_slot, m_fromTGStart, m_toTG, m_discTG);
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else
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LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u-TG%u: matched", m_name.c_str(), m_fromSlot, m_fromTGStart, m_fromTGEnd);
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if (m_toTGStart == m_toTGEnd)
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LogDebug("Rule Trace,\tRewriteDynTGRF to %s Slot=%u Dst=TG%u", m_name.c_str(), m_toSlot, m_toTGStart);
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else
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LogDebug("Rule Trace,\tRewriteDynTGRF to %s Slot=%u Dst=TG%u-TG%u", m_name.c_str(), m_toSlot, m_toTGStart, m_toTGEnd);
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LogDebug("Rule Trace,\tRewriteDynTGRF from %s Slot=%u Dst=TG%u-TG%u or Dst=TG%u or Dst=TG%u: not matched", m_name.c_str(), m_slot, m_fromTGStart, m_fromTGEnd, m_toTG, m_discTG);
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}
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return true;
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return false;
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}
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