mirror of
https://github.com/erpalma/throttled.git
synced 2026-03-17 02:04:47 +01:00
switched to a more readable key/value structure for accessing MSR
This commit is contained in:
erpalma
parent
7ff78ce8fb
commit
99148e27f0
106
lenovo_fix.py
106
lenovo_fix.py
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@ -30,6 +30,22 @@ TRIP_TEMP_RANGE = [40, 97]
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UNDERVOLT_KEYS = ('UNDERVOLT', 'UNDERVOLT.AC', 'UNDERVOLT.BATTERY')
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ICCMAX_KEYS = ('ICCMAX', 'ICCMAX.AC', 'ICCMAX.BATTERY')
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power = {'source': None, 'method': 'polling'}
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MSR_DICT = {
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'MSR_PLATFORM_INFO': 0xCE,
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'MSR_OC_MAILBOX': 0x150,
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'IA32_PERF_STATUS': 0x198,
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'IA32_THERM_STATUS': 0x19C,
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'MSR_TEMPERATURE_TARGET': 0x1A2,
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'MSR_POWER_CTL': 0x1FC,
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'MSR_RAPL_POWER_UNIT': 0x606,
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'MSR_PKG_POWER_LIMIT': 0x610,
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'MSR_INTEL_PKG_ENERGY_STATUS': 0x611,
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'MSR_DRAM_ENERGY_STATUS': 0x619,
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'MSR_PP1_ENERGY_STATUS': 0x641,
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'MSR_CONFIG_TDP_CONTROL': 0x64B,
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'IA32_HWP_REQUEST': 0x774,
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}
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HWP_PERFORMANCE_VALUE = 0x20
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HWP_DEFAULT_VALUE = 0x80
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HWP_INTERVAL = 60
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@ -133,7 +149,7 @@ def writemsr(msr, val):
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try:
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for addr in msr_list:
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f = os.open(addr, os.O_WRONLY)
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os.lseek(f, msr, os.SEEK_SET)
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os.lseek(f, MSR_DICT[msr], os.SEEK_SET)
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os.write(f, struct.pack('Q', val))
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os.close(f)
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except (IOError, OSError) as e:
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@ -161,7 +177,7 @@ def readmsr(msr, from_bit=0, to_bit=63, cpu=None, flatten=False):
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output = []
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for addr in msr_list:
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f = os.open(addr, os.O_RDONLY)
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os.lseek(f, msr, os.SEEK_SET)
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os.lseek(f, MSR_DICT[msr], os.SEEK_SET)
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val = struct.unpack('Q', os.read(f, 8))[0]
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os.close(f)
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output.append(get_value_for_bits(val, from_bit, to_bit))
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@ -213,7 +229,7 @@ def is_on_battery(config):
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def get_cpu_platform_info():
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features_msr_value = readmsr(0xCE, cpu=0)
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features_msr_value = readmsr('MSR_PLATFORM_INFO', cpu=0)
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cpu_platform_info = {}
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for key, value in platform_info_bits.items():
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cpu_platform_info[key] = int(get_value_for_bits(features_msr_value, value[0], value[1]))
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@ -222,7 +238,7 @@ def get_cpu_platform_info():
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def get_reset_thermal_status():
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# read thermal status
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thermal_status_msr_value = readmsr(0x19C)
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thermal_status_msr_value = readmsr('IA32_THERM_STATUS')
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thermal_status = []
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for core in range(cpu_count()):
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thermal_status_core = {}
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@ -230,29 +246,29 @@ def get_reset_thermal_status():
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thermal_status_core[key] = int(get_value_for_bits(thermal_status_msr_value[core], value[0], value[1]))
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thermal_status.append(thermal_status_core)
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# reset log bits
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writemsr(0x19C, 0)
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writemsr('IA32_THERM_STATUS', 0)
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return thermal_status
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def get_time_unit():
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# 0.000977 is the time unit of my CPU
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# TODO formula might be different for other CPUs
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return 1.0 / 2 ** readmsr(0x606, 16, 19, cpu=0)
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return 1.0 / 2 ** readmsr('MSR_RAPL_POWER_UNIT', 16, 19, cpu=0)
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def get_power_unit():
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# 0.125 is the power unit of my CPU
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# TODO formula might be different for other CPUs
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return 1.0 / 2 ** readmsr(0x606, 0, 3, cpu=0)
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return 1.0 / 2 ** readmsr('MSR_RAPL_POWER_UNIT', 0, 3, cpu=0)
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def get_critical_temp():
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# the critical temperature for my CPU is 100 'C
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return readmsr(0x1A2, 16, 23, cpu=0)
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return readmsr('MSR_TEMPERATURE_TARGET', 16, 23, cpu=0)
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def get_cur_pkg_power_limits():
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value = readmsr(0x610, 0, 55, flatten=True)
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value = readmsr('MSR_PKG_POWER_LIMIT', 0, 55, flatten=True)
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return {
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'PL1': get_value_for_bits(value, 0, 14),
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'TW1': get_value_for_bits(value, 17, 23),
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@ -282,8 +298,7 @@ def calc_undervolt_msr(plane, offset):
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def calc_undervolt_mv(msr_value):
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"""Return the offset voltage (in mV) from the given raw MSR 150h value.
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"""
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"""Return the offset voltage (in mV) from the given raw MSR 150h value."""
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offset = (msr_value & 0xFFE00000) >> 21
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offset = offset if offset <= 0x400 else -(0x800 - offset)
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return int(round(offset / 1.024))
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@ -293,8 +308,8 @@ def get_undervolt(plane=None, convert=False):
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planes = [plane] if plane in VOLTAGE_PLANES else VOLTAGE_PLANES
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out = {}
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for plane in planes:
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writemsr(0x150, 0x8000001000000000 | (VOLTAGE_PLANES[plane] << 40))
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read_value = readmsr(0x150, flatten=True) & 0xFFFFFFFF
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writemsr('MSR_OC_MAILBOX', 0x8000001000000000 | (VOLTAGE_PLANES[plane] << 40))
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read_value = readmsr('MSR_OC_MAILBOX', flatten=True) & 0xFFFFFFFF
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out[plane] = calc_undervolt_mv(read_value) if convert else read_value
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return out
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@ -306,7 +321,7 @@ def undervolt(config):
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'UNDERVOLT.{:s}'.format(power['source']), plane, fallback=config.getfloat('UNDERVOLT', plane, fallback=0.0)
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)
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write_value = calc_undervolt_msr(plane, write_offset_mv)
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writemsr(0x150, write_value)
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writemsr('MSR_OC_MAILBOX', write_value)
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if args.debug:
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write_value &= 0xFFFFFFFF
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read_value = get_undervolt(plane)[plane]
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@ -330,8 +345,7 @@ def calc_icc_max_msr(plane, current):
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def calc_icc_max_amp(msr_value):
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"""Return the max current (in A) from the given raw MSR 150h value.
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"""
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"""Return the max current (in A) from the given raw MSR 150h value."""
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return (msr_value & 0x3FF) / 4.0
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@ -339,8 +353,8 @@ def get_icc_max(plane=None, convert=False):
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planes = [plane] if plane in CURRENT_PLANES else CURRENT_PLANES
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out = {}
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for plane in planes:
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writemsr(0x150, 0x8000001600000000 | (CURRENT_PLANES[plane] << 40))
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read_value = readmsr(0x150, flatten=True) & 0x3FF
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writemsr('MSR_OC_MAILBOX', 0x8000001600000000 | (CURRENT_PLANES[plane] << 40))
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read_value = readmsr('MSR_OC_MAILBOX', flatten=True) & 0x3FF
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out[plane] = calc_icc_max_amp(read_value) if convert else read_value
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return out
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@ -354,7 +368,7 @@ def set_icc_max(config):
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)
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if write_current_amp > 0:
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write_value = calc_icc_max_msr(plane, write_current_amp)
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writemsr(0x150, write_value)
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writemsr('MSR_OC_MAILBOX', write_value)
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if args.debug:
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write_value &= 0x3FF
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read_value = get_icc_max(plane)[plane]
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@ -520,25 +534,25 @@ def calc_reg_values(platform_info, config):
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def set_hwp(performance_mode):
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# set HWP energy performance preference
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cur_val = readmsr(0x774, cpu=0)
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cur_val = readmsr('IA32_HWP_REQUEST', cpu=0)
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hwp_mode = HWP_PERFORMANCE_VALUE if performance_mode else HWP_DEFAULT_VALUE
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new_val = (cur_val & 0xFFFFFFFF00FFFFFF) | (hwp_mode << 24)
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writemsr(0x774, new_val)
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writemsr('IA32_HWP_REQUEST', new_val)
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if args.debug:
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read_value = readmsr(0x774, from_bit=24, to_bit=31)[0]
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read_value = readmsr('IA32_HWP_REQUEST', from_bit=24, to_bit=31)[0]
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match = OK if hwp_mode == read_value else ERR
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log('[D] HWP - write "{:#02x}" - read "{:#02x}" - match {}'.format(hwp_mode, read_value, match))
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def set_disable_bdprochot():
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# Disable BDPROCHOT
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cur_val = readmsr(0x1FC, flatten=True)
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cur_val = readmsr('MSR_POWER_CTL', flatten=True)
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new_val = cur_val & 0xFFFFFFFFFFFFFFFE
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writemsr(0x1FC, new_val)
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writemsr('MSR_POWER_CTL', new_val)
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if args.debug:
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read_value = readmsr(0x1FC, from_bit=31, to_bit=31)[0]
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read_value = readmsr('MSR_POWER_CTL', from_bit=31, to_bit=31)[0]
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match = OK if ~read_value else ERR
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log('[D] BDPROCHOT - write "{:#02x}" - read "{:#02x}" - match {}'.format(0, read_value, match))
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@ -569,8 +583,9 @@ def power_thread(config, regs, exit_event):
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mchbar_mmio = None
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next_hwp_write = 0
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last_config_write_time = get_config_write_time() \
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if config.getboolean('GENERAL', 'Autoreload', fallback=False) else None
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last_config_write_time = (
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get_config_write_time() if config.getboolean('GENERAL', 'Autoreload', fallback=False) else None
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)
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while not exit_event.is_set():
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# log thermal status
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if args.debug:
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@ -593,9 +608,9 @@ def power_thread(config, regs, exit_event):
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# set temperature trip point
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if 'MSR_TEMPERATURE_TARGET' in regs[power['source']]:
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write_value = regs[power['source']]['MSR_TEMPERATURE_TARGET']
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writemsr(0x1A2, write_value)
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writemsr('MSR_TEMPERATURE_TARGET', write_value)
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if args.debug:
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read_value = readmsr(0x1A2, 24, 29, flatten=True)
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read_value = readmsr('MSR_TEMPERATURE_TARGET', 24, 29, flatten=True)
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match = OK if write_value >> 24 == read_value else ERR
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log(
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'[D] TEMPERATURE_TARGET - write {:#x} - read {:#x} - match {}'.format(
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@ -606,9 +621,9 @@ def power_thread(config, regs, exit_event):
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# set cTDP
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if 'MSR_CONFIG_TDP_CONTROL' in regs[power['source']]:
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write_value = regs[power['source']]['MSR_CONFIG_TDP_CONTROL']
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writemsr(0x64B, write_value)
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writemsr('MSR_CONFIG_TDP_CONTROL', write_value)
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if args.debug:
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read_value = readmsr(0x64B, 0, 1, flatten=True)
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read_value = readmsr('MSR_CONFIG_TDP_CONTROL', 0, 1, flatten=True)
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match = OK if write_value == read_value else ERR
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log(
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'[D] CONFIG_TDP_CONTROL - write {:#x} - read {:#x} - match {}'.format(
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@ -618,9 +633,9 @@ def power_thread(config, regs, exit_event):
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# set PL1/2 on MSR
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write_value = regs[power['source']]['MSR_PKG_POWER_LIMIT']
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writemsr(0x610, write_value)
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writemsr('MSR_PKG_POWER_LIMIT', write_value)
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if args.debug:
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read_value = readmsr(0x610, 0, 55, flatten=True)
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read_value = readmsr('MSR_PKG_POWER_LIMIT', 0, 55, flatten=True)
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match = OK if write_value == read_value else ERR
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log(
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'[D] MSR PACKAGE_POWER_LIMIT - write {:#x} - read {:#x} - match {}'.format(
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@ -721,24 +736,17 @@ def check_cpu():
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def monitor(exit_event, wait):
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IA32_THERM_STATUS = 0x19C
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IA32_PERF_STATUS = 0x198
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MSR_RAPL_POWER_UNIT = 0x606
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MSR_INTEL_PKG_ENERGY_STATUS = 0x611
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MSR_PP1_ENERGY_STATUS = 0x641
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MSR_DRAM_ENERGY_STATUS = 0x619
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wait = max(0.1, wait)
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rapl_power_unit = 0.5 ** readmsr(MSR_RAPL_POWER_UNIT, from_bit=8, to_bit=12, cpu=0)
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rapl_power_unit = 0.5 ** readmsr('MSR_RAPL_POWER_UNIT', from_bit=8, to_bit=12, cpu=0)
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power_plane_msr = {
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'Package': MSR_INTEL_PKG_ENERGY_STATUS,
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'Graphics': MSR_PP1_ENERGY_STATUS,
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'DRAM': MSR_DRAM_ENERGY_STATUS,
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'Package': 'MSR_INTEL_PKG_ENERGY_STATUS',
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'Graphics': 'MSR_PP1_ENERGY_STATUS',
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'DRAM': 'MSR_DRAM_ENERGY_STATUS',
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}
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prev_energy = {
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'Package': (readmsr(MSR_INTEL_PKG_ENERGY_STATUS, cpu=0) * rapl_power_unit, time()),
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'Graphics': (readmsr(MSR_PP1_ENERGY_STATUS, cpu=0) * rapl_power_unit, time()),
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'DRAM': (readmsr(MSR_DRAM_ENERGY_STATUS, cpu=0) * rapl_power_unit, time()),
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'Package': (readmsr('MSR_INTEL_PKG_ENERGY_STATUS', cpu=0) * rapl_power_unit, time()),
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'Graphics': (readmsr('MSR_PP1_ENERGY_STATUS', cpu=0) * rapl_power_unit, time()),
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'DRAM': (readmsr('MSR_DRAM_ENERGY_STATUS', cpu=0) * rapl_power_unit, time()),
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}
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undervolt_values = get_undervolt(convert=True)
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@ -751,12 +759,12 @@ def monitor(exit_event, wait):
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log('[D] Realtime monitoring of throttling causes:\n')
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while not exit_event.is_set():
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value = readmsr(IA32_THERM_STATUS, from_bit=0, to_bit=15, cpu=0)
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value = readmsr('IA32_THERM_STATUS', from_bit=0, to_bit=15, cpu=0)
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offsets = {'Thermal': 0, 'Power': 10, 'Current': 12, 'Cross-domain (e.g. GPU)': 14}
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output = ('{:s}: {:s}'.format(cause, LIM if bool((value >> offsets[cause]) & 1) else OK) for cause in offsets)
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# ugly code, just testing...
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vcore = readmsr(IA32_PERF_STATUS, from_bit=32, to_bit=47, cpu=0) / (2.0 ** 13) * 1000
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vcore = readmsr('IA32_PERF_STATUS', from_bit=32, to_bit=47, cpu=0) / (2.0 ** 13) * 1000
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stats2 = {'VCore': '{:.0f} mV'.format(vcore)}
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for power_plane in ('Package', 'Graphics', 'DRAM'):
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energy_j = readmsr(power_plane_msr[power_plane], cpu=0) * rapl_power_unit
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