#pragma once #include "Utilities/mutex.h" #include "Emu/Memory/vm_ptr.h" #include "Emu/Cell/ErrorCodes.h" class cpu_thread; struct RsxDriverInfo { be_t version_driver; // 0x0 be_t version_gpu; // 0x4 be_t memory_size; // 0x8 be_t hardware_channel; // 0xC be_t nvcore_frequency; // 0x10 be_t memory_frequency; // 0x14 be_t unk1[4]; // 0x18 - 0x24 be_t unk2; // 0x28 -- pgraph stuff be_t reportsNotifyOffset;// 0x2C offset to notify memory be_t reportsOffset; // 0x30 offset to reports memory be_t reportsReportOffset;// 0x34 offset to reports in reports memory be_t unk3[6]; // 0x38-0x54 be_t systemModeFlags; // 0x54 u8 unk4[0x1064]; // 0x10B8 struct Head { be_t lastFlipTime; // 0x0 last flip time atomic_be_t flipFlags; // 0x8 flags to handle flip/queue be_t offset; // 0xC be_t flipBufferId; // 0x10 be_t lastQueuedBufferId; // 0x14 todo: this is definately not this variable but its 'unused' so im using it for queueId to pass to flip handler be_t unk3; // 0x18 be_t lastVTimeLow; // 0x1C last time for first vhandler freq (low 32-bits) be_t lastSecondVTime; // 0x20 last time for second vhandler freq be_t unk4; // 0x28 atomic_be_t vBlankCount; // 0x30 be_t unk; // 0x38 possible u32, 'flip field', top/bottom for interlaced be_t lastVTimeHigh; // 0x3C last time for first vhandler freq (high 32-bits) } head[8]; // size = 0x40, 0x200 be_t unk7; // 0x12B8 be_t unk8; // 0x12BC atomic_be_t handlers; // 0x12C0 -- flags showing which handlers are set be_t unk9; // 0x12C4 be_t unk10; // 0x12C8 be_t userCmdParam; // 0x12CC be_t handler_queue; // 0x12D0 be_t unk11; // 0x12D4 be_t unk12; // 0x12D8 be_t unk13; // 0x12DC be_t unk14; // 0x12E0 be_t unk15; // 0x12E4 be_t unk16; // 0x12E8 be_t unk17; // 0x12F0 be_t lastError; // 0x12F4 error param for cellGcmSetGraphicsHandler // todo: theres more to this }; static_assert(sizeof(RsxDriverInfo) == 0x12F8, "rsxSizeTest"); static_assert(sizeof(RsxDriverInfo::Head) == 0x40, "rsxHeadSizeTest"); enum : u64 { // Unused SYS_RSX_IO_MAP_IS_STRICT = 1ull << 60 }; // Unofficial event names enum : u64 { //SYS_RSX_EVENT_GRAPHICS_ERROR = 1 << 0, SYS_RSX_EVENT_VBLANK = 1 << 1, SYS_RSX_EVENT_FLIP_BASE = 1 << 3, SYS_RSX_EVENT_QUEUE_BASE = 1 << 5, SYS_RSX_EVENT_USER_CMD = 1 << 7, SYS_RSX_EVENT_SECOND_VBLANK_BASE = 1 << 10, SYS_RSX_EVENT_UNMAPPED_BASE = 1ull << 32, }; struct RsxDmaControl { u8 resv[0x40]; atomic_be_t put; atomic_be_t get; atomic_be_t ref; be_t unk[2]; be_t unk1; }; struct RsxSemaphore { atomic_be_t val; }; struct alignas(16) RsxNotify { be_t timestamp; be_t zero; }; struct alignas(16) RsxReport { be_t timestamp; be_t val; be_t pad; }; struct RsxReports { RsxSemaphore semaphore[0x400]; RsxNotify notify[64]; RsxReport report[2048]; }; struct RsxDisplayInfo { be_t offset; be_t pitch; be_t width; be_t height; bool valid() const { return height != 0u && width != 0u; } }; struct lv2_rsx_config { shared_mutex mutex; u32 memory_size{}; u32 rsx_event_port{}; u32 context_base{}; u32 device_addr{}; u32 driver_info{}; u32 dma_address{}; void send_event(u64, u64, u64) const; }; // SysCalls error_code sys_rsx_device_open(cpu_thread& cpu); error_code sys_rsx_device_close(cpu_thread& cpu); error_code sys_rsx_memory_allocate(cpu_thread& cpu, vm::ptr mem_handle, vm::ptr mem_addr, u32 size, u64 flags, u64 a5, u64 a6, u64 a7); error_code sys_rsx_memory_free(cpu_thread& cpu, u32 mem_handle); error_code sys_rsx_context_allocate(cpu_thread& cpu, vm::ptr context_id, vm::ptr lpar_dma_control, vm::ptr lpar_driver_info, vm::ptr lpar_reports, u64 mem_ctx, u64 system_mode); error_code sys_rsx_context_free(cpu_thread& cpu, u32 context_id); error_code sys_rsx_context_iomap(cpu_thread& cpu, u32 context_id, u32 io, u32 ea, u32 size, u64 flags); error_code sys_rsx_context_iounmap(cpu_thread& cpu, u32 context_id, u32 io, u32 size); error_code sys_rsx_context_attribute(u32 context_id, u32 package_id, u64 a3, u64 a4, u64 a5, u64 a6); error_code sys_rsx_device_map(cpu_thread& cpu, vm::ptr dev_addr, vm::ptr a2, u32 dev_id); error_code sys_rsx_device_unmap(cpu_thread& cpu, u32 dev_id); error_code sys_rsx_attribute(cpu_thread& cpu, u32 a1, u32 a2, u32 a3, u32 a4, u32 a5);