From 8e3da79e7e01f613c205e3e9311890d4321d1b0c Mon Sep 17 00:00:00 2001 From: DH Date: Thu, 13 Mar 2025 00:23:06 +0300 Subject: [PATCH] aarch64: extend cpu list --- rpcs3/Utilities/JITLLVM.cpp | 2 +- .../CPU/Backends/AArch64/AArch64Common.cpp | 136 +++++++++++++++--- 2 files changed, 120 insertions(+), 18 deletions(-) diff --git a/rpcs3/Utilities/JITLLVM.cpp b/rpcs3/Utilities/JITLLVM.cpp index 2b82d57d5..8e32f1fc6 100644 --- a/rpcs3/Utilities/JITLLVM.cpp +++ b/rpcs3/Utilities/JITLLVM.cpp @@ -896,7 +896,7 @@ const char * fallback_cpu_detection() std::string result = aarch64::get_cpu_name(); if (result.empty()) { - return "cortex-a78"; + return "cortex-a32"; } std::transform(result.begin(), result.end(), result.begin(), ::tolower); diff --git a/rpcs3/rpcs3/Emu/CPU/Backends/AArch64/AArch64Common.cpp b/rpcs3/rpcs3/Emu/CPU/Backends/AArch64/AArch64Common.cpp index e2468655a..2566dfb38 100644 --- a/rpcs3/rpcs3/Emu/CPU/Backends/AArch64/AArch64Common.cpp +++ b/rpcs3/rpcs3/Emu/CPU/Backends/AArch64/AArch64Common.cpp @@ -49,14 +49,45 @@ namespace aarch64 static cpu_entry_t s_cpu_list[] = { - // ARM + // ARM - 0x41 + { 0x41, 0x926, "", "", "arm926ej-s" }, + { 0x41, 0xb02, "", "", "mpcore" }, + { 0x41, 0xb36, "", "", "arm1136j-s" }, + { 0x41, 0xb56, "", "", "arm1156t2-s" }, + { 0x41, 0xb76, "", "", "arm1176jz-s" }, + { 0x41, 0xc05, "", "", "cortex-a5" }, + { 0x41, 0xc07, "", "", "cortex-a7" }, + { 0x41, 0xc08, "", "", "cortex-a8" }, + { 0x41, 0xc09, "", "", "cortex-a9" }, + { 0x41, 0xc0f, "", "", "cortex-a15" }, + { 0x41, 0xc0e, "", "", "cortex-a17" }, + { 0x41, 0xc20, "", "", "cortex-m0" }, + { 0x41, 0xc23, "", "", "cortex-m3" }, + { 0x41, 0xc24, "", "", "cortex-m4" }, + { 0x41, 0xc27, "", "", "cortex-m7" }, + { 0x41, 0xd20, "", "", "cortex-m23" }, + { 0x41, 0xd21, "", "", "cortex-m33" }, + { 0x41, 0xd24, "", "", "cortex-m52" }, + { 0x41, 0xd22, "", "", "cortex-m55" }, + { 0x41, 0xd23, "armv8.1-m.main+pacbti+mve.fp+fp.dp", "", "Cortex-M85" }, + { 0x41, 0xc18, "", "", "cortex-r8" }, + { 0x41, 0xd13, "armv8-r+crc+simd", "", "cortex-r52" }, + { 0x41, 0xd16, "armv8-r+crc+simd", "", "cortex-r52plus" }, + { 0x41, 0xd15, "", "", "cortex-r82" }, + { 0x41, 0xd14, "", "", "cortex-r82ae" }, { 0x41, 0xd01, "armv8-a+crc+simd", "", "Cortex-A32" }, + { 0x41, 0xd02, "", "", "cortex-a34" }, { 0x41, 0xd04, "armv8-a+crc+simd", "", "Cortex-A35" }, { 0x41, 0xd03, "armv8-a+crc+simd", "", "Cortex-A53" }, + { 0x41, 0xd05, "armv8.2-a+fp16+dotprod", "", "Cortex-A55" }, + { 0x41, 0xd46, "", "", "cortex-a510" }, + { 0x41, 0xd80, "", "", "cortex-a520" }, + { 0x41, 0xd88, "", "", "cortex-a520ae" }, { 0x41, 0xd07, "armv8-a+crc+simd", "", "Cortex-A57" }, + { 0x41, 0xd06, "", "", "cortex-a65" }, + { 0x41, 0xd43, "", "", "cortex-a65ae" }, { 0x41, 0xd08, "armv8-a+crc+simd", "", "Cortex-A72" }, { 0x41, 0xd09, "armv8-a+crc+simd", "", "Cortex-A73" }, - { 0x41, 0xd05, "armv8.2-a+fp16+dotprod", "", "Cortex-A55" }, { 0x41, 0xd0a, "armv8.2-a+fp16+dotprod", "", "Cortex-A75" }, { 0x41, 0xd0b, "armv8.2-a+fp16+dotprod", "", "Cortex-A76" }, { 0x41, 0xd0e, "armv8.2-a+fp16+dotprod", "", "Cortex-A76ae" }, @@ -65,27 +96,98 @@ namespace aarch64 { 0x41, 0xd42, "armv8.2-a+fp16+dotprod", "", "Cortex-A78ae" }, { 0x41, 0xd4b, "armv8.2-a+fp16+dotprod", "", "Cortex-A78c" }, { 0x41, 0xd47, "armv9-a+fp16+bf16+i8mm", "", "Cortex-A710" }, + { 0x41, 0xd4d, "", "", "Cortex-A715" }, + { 0x41, 0xd81, "", "", "Cortex-A720" }, + { 0x41, 0xd89, "", "", "Cortex-A720AE" }, + { 0x41, 0xd87, "", "", "Cortex-A725" }, { 0x41, 0xd44, "armv8.2-a+fp16+dotprod", "", "Cortex-X1" }, { 0x41, 0xd4c, "armv8.2-a+fp16+dotprod", "", "Cortex-X1c" }, + { 0x41, 0xd48, "", "", "Cortex-X2" }, + { 0x41, 0xd4e, "", "", "Cortex-X3" }, + { 0x41, 0xd82, "", "", "Cortex-X4" }, + { 0x41, 0xd85, "", "", "Cortex-X925" }, + { 0x41, 0xd4a, "", "", "Neoverse-e1" }, { 0x41, 0xd0c, "armv8.2-a+fp16+dotprod", "", "Neoverse-N1" }, - { 0x41, 0xd40, "armv8.4-a+fp16+bf16+i8mm", "", "Neoverse-V1" }, { 0x41, 0xd49, "armv8.5-a+fp16+bf16+i8mm", "", "Neoverse-N2" }, - { 0x41, 0xd23, "armv8.1-m.main+pacbti+mve.fp+fp.dp", "", "Cortex-M85" }, - { 0x41, 0xd13, "armv8-r+crc+simd", "", "Cortex-R52" }, - { 0x41, 0xd16, "armv8-r+crc+simd", "", "Cortex-R52+" }, + { 0x41, 0xd8e, "", "", "Neoverse-N3" }, + { 0x41, 0xd40, "armv8.4-a+fp16+bf16+i8mm", "", "Neoverse-V1" }, + { 0x41, 0xd4f, "", "", "Neoverse-V2" }, + { 0x41, 0xd84, "", "", "Neoverse-V3" }, + { 0x41, 0xd83, "", "", "Neoverse-V3AE" }, - // APPLE - { 0x61, 0x22, "armv8.5-a", "M1", "Firestorm" }, - { 0x61, 0x23, "armv8.5-a", "M1", "IceStorm" }, - { 0x61, 0x28, "armv8.5-a", "M1 Max", "Firestorm" }, - { 0x61, 0x29, "armv8.5-a", "M1 Max", "Icestorm" }, - { 0x61, 0x24, "armv8.5-a", "M1 Pro", "Firestorm" }, - { 0x61, 0x25, "armv8.5-a", "M1 Pro", "Icestorm" }, - { 0x61, 0x32, "armv8.5-a", "M2", "Avalanche" }, - { 0x61, 0x33, "armv8.5-a", "M2", "Blizzard" }, + // Broadcom - 0x42 + { 0x42, 0x516, "", "", "thunderx2t99" }, + { 0x42, 0x0516, "", "", "thunderx2t99" }, + { 0x42, 0xaf, "", "", "thunderx2t99" }, + { 0x42, 0x0af, "", "", "thunderx2t99" }, + { 0x42, 0xa1, "", "", "thunderxt88" }, + { 0x42, 0x0a1, "", "", "thunderxt88" }, - // QUALCOMM - { 0x51, 0x01, "armv8.5-a", "Snapdragon", "X-Elite" }, + // Cavium - 0x43 + { 0x43, 0x516, "", "", "thunderx2t99" }, + { 0x43, 0x0516, "", "", "thunderx2t99" }, + { 0x43, 0xaf, "", "", "thunderx2t99" }, + { 0x43, 0x0af, "", "", "thunderx2t99" }, + { 0x43, 0xa1, "", "", "thunderxt88" }, + { 0x43, 0x0a1, "", "", "thunderxt88" }, + + // HiSilicon - 0x48 + { 0x48, 0xd01, "", "", "tsv110" }, + + // NVIDIA - 0x4e + { 0x4e, 0x004, "", "", "carmel" }, + + // APM - 0x50 + // Qualcomm - 0x51 + { 0x51, 0x06f, "", "", "krait" }, + { 0x51, 0x201, "", "", "kryo" }, + { 0x51, 0x205, "", "", "kryo" }, + { 0x51, 0x211, "", "", "kryo" }, + + { 0x51, 0x800, "", "", "cortex-a73" }, + { 0x51, 0x801, "", "", "cortex-a73" }, + { 0x51, 0x802, "", "", "cortex-a75" }, + { 0x51, 0x803, "", "", "cortex-a75" }, + { 0x51, 0x804, "", "", "cortex-a76" }, + { 0x51, 0x805, "", "", "cortex-a76" }, + { 0x51, 0xc00, "", "", "falkor" }, + { 0x51, 0xc01, "", "", "saphira" }, + { 0x51, 0x001, "armv8.5-a", "Snapdragon", "oryon-1" }, + + // Samsung - 0x53 + // ???? + + // Apple - 0x61 + { 0x61, 0x020, "", "", "apple-m1" }, + { 0x61, 0x021, "", "", "apple-m1" }, + { 0x61, 0x022, "", "", "apple-m1" }, + { 0x61, 0x023, "", "", "apple-m1" }, + { 0x61, 0x024, "", "", "apple-m1" }, + { 0x61, 0x025, "", "", "apple-m1" }, + { 0x61, 0x028, "", "", "apple-m1" }, + { 0x61, 0x029, "", "", "apple-m1" }, + { 0x61, 0x030, "", "", "apple-m2" }, + { 0x61, 0x031, "", "", "apple-m2" }, + { 0x61, 0x032, "", "", "apple-m2" }, + { 0x61, 0x033, "", "", "apple-m2" }, + { 0x61, 0x034, "", "", "apple-m2" }, + { 0x61, 0x035, "", "", "apple-m2" }, + { 0x61, 0x038, "", "", "apple-m2" }, + { 0x61, 0x039, "", "", "apple-m2" }, + { 0x61, 0x049, "", "", "apple-m3" }, + { 0x61, 0x048, "", "", "apple-m3" }, + + // ARM China - 0x64 + { 0x63, 0x132, "", "", "star-mc1" }, + + // Faraday - 0x66 + // Microsoft - 0x6d + { 0x6d, 0xd49, "", "", "neoverse-n2" }, + + // Ampere - 0xc0 + { 0xc0, 0xac3, "", "", "ampere1" }, + { 0xc0, 0xac4, "", "", "ampere1a" }, + { 0xc0, 0xac5, "", "", "ampere1b" }, }; static const cpu_vendor_t* find_cpu_vendor(u64 id)