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SPU DisAsm: Disable unlikely float representations

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This commit is contained in:
Elad 2025-12-10 09:48:18 +02:00
parent cc1b4c8fd1
commit bbd91dad92
2 changed files with 22 additions and 4 deletions
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2
rpcs3/Emu/Cell/PPUDisAsm.cpp
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@ -330,7 +330,7 @@ void comment_constant(std::string& last_opcode, u64 value, bool print_float = fa
// Comment constant formation
fmt::append(last_opcode, " #0x%xh", value);
if (print_float && ((value >> 31) <= 1u || (value >> 31) == 0x1'ffff'ffffu))
if (print_float && ((value >> 31) <= 1u || (value >> 31) == 0x1'ffff'ffffu) && (value > 0x3fffff && (value << 32 >> 32) < 0xffc00000))
{
const f32 float_val = std::bit_cast<f32>(static_cast<u32>(value));

24
rpcs3/Emu/Cell/SPUDisAsm.h
View file

@ -903,8 +903,14 @@ public:
if (auto [is_const, value] = try_get_const_equal_value_array<u32>(+op.ra); is_const)
{
if (value % 0x200 != 0)
{
// si10 is overwritten - likely an analysis mistake
return;
}
// Comment constant formation
comment_constant(last_opcode, value | static_cast<u32>(op.si10));
comment_constant(last_opcode, value | static_cast<u32>(op.si10), false);
}
}
void ORHI(spu_opcode_t op)
@ -941,8 +947,14 @@ public:
if (auto [is_const, value] = try_get_const_equal_value_array<u32>(op.ra); is_const)
{
if (value % 0x200 != 0)
{
// si10 is overwritten - likely an analysis mistake
return;
}
// Comment constant formation
comment_constant(last_opcode, value + static_cast<u32>(op.si10));
comment_constant(last_opcode, value + static_cast<u32>(op.si10), false);
}
}
void AHI(spu_opcode_t op)
@ -963,8 +975,14 @@ public:
if (auto [is_const, value] = try_get_const_equal_value_array<u32>(op.ra); is_const)
{
if (value % 0x200 != 0)
{
// si10 is overwritten - likely an analysis mistake
return;
}
// Comment constant formation
comment_constant(last_opcode, value ^ static_cast<u32>(op.si10));
comment_constant(last_opcode, value ^ static_cast<u32>(op.si10), false);
}
}
void XORHI(spu_opcode_t op)