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rsx/sync: Do not allow short-circuiting behavior when releasing GCM labels via host queue
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This commit is contained in:
parent
93dbdead24
commit
aeaa62a28c
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@ -1351,7 +1351,7 @@ void GLGSRender::notify_tile_unbound(u32 tile)
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}
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}
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bool GLGSRender::release_GCM_label(u32 address, u32 args)
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bool GLGSRender::release_GCM_label(u32 type, u32 address, u32 args)
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{
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if (!backend_config.supports_host_gpu_labels)
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{
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@ -1360,7 +1360,7 @@ bool GLGSRender::release_GCM_label(u32 address, u32 args)
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auto host_ctx = ensure(m_host_dma_ctrl->host_ctx());
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if (host_ctx->texture_loads_completed())
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if (type == NV4097_TEXTURE_READ_SEMAPHORE_RELEASE && host_ctx->texture_loads_completed())
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{
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// We're about to poll waiting for GPU state, ensure the context is still valid.
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gl::check_state();
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@ -206,7 +206,7 @@ public:
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void discard_occlusion_query(rsx::reports::occlusion_query_info* query) override;
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// DMA
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bool release_GCM_label(u32 address, u32 data) override;
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bool release_GCM_label(u32 type, u32 address, u32 data) override;
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void enqueue_host_context_write(u32 offset, u32 size, const void* data);
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void on_guest_texture_read();
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@ -86,7 +86,7 @@ namespace rsx
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RSX(ctx)->performance_counters.idle_time += (get_system_time() - start);
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}
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void semaphore_release(context* ctx, u32 /*reg*/, u32 arg)
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void semaphore_release(context* ctx, u32 reg, u32 arg)
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{
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const u32 offset = REGS(ctx)->semaphore_offset_406e();
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@ -122,7 +122,7 @@ namespace rsx
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arg = 1;
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}
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util::write_gcm_label<false, true>(ctx, addr, arg);
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util::write_gcm_label<false, true>(ctx, reg, addr, arg);
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}
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}
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}
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@ -690,7 +690,7 @@ namespace rsx
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});
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}
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void texture_read_semaphore_release(context* ctx, u32 /*reg*/, u32 arg)
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void texture_read_semaphore_release(context* ctx, u32 reg, u32 arg)
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{
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// Pipeline barrier seems to be equivalent to a SHADER_READ stage barrier.
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// Ideally the GPU only needs to have cached all textures declared up to this point before writing the label.
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@ -715,15 +715,15 @@ namespace rsx
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if (g_cfg.video.strict_rendering_mode) [[ unlikely ]]
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{
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util::write_gcm_label<true, true>(ctx, addr, arg);
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util::write_gcm_label<true, true>(ctx, reg, addr, arg);
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}
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else
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{
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util::write_gcm_label<true, false>(ctx, addr, arg);
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util::write_gcm_label<true, false>(ctx, reg, addr, arg);
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}
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}
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void back_end_write_semaphore_release(context* ctx, u32 /*reg*/, u32 arg)
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void back_end_write_semaphore_release(context* ctx, u32 reg, u32 arg)
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{
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// Full pipeline barrier. GPU must flush pipeline before writing the label
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@ -744,7 +744,7 @@ namespace rsx
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}
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const u32 val = (arg & 0xff00ff00) | ((arg & 0xff) << 16) | ((arg >> 16) & 0xff);
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util::write_gcm_label<true, true>(ctx, addr, val);
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util::write_gcm_label<true, true>(ctx, reg, addr, val);
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}
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void sync(context* ctx, u32, u32)
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@ -13,13 +13,13 @@ namespace rsx
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namespace util
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{
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template <bool FlushDMA, bool FlushPipe>
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static void write_gcm_label(context* ctx, u32 address, u32 data)
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static void write_gcm_label(context* ctx, u32 type, u32 address, u32 data)
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{
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const bool is_flip_sema = (address == (RSX(ctx)->label_addr + 0x10) || address == (RSX(ctx)->device_addr + 0x30));
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if (!is_flip_sema)
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{
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// First, queue the GPU work. If it flushes the queue for us, the following routines will be faster.
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const bool handled = RSX(ctx)->get_backend_config().supports_host_gpu_labels && RSX(ctx)->release_GCM_label(address, data);
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const bool handled = RSX(ctx)->get_backend_config().supports_host_gpu_labels && RSX(ctx)->release_GCM_label(type, address, data);
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if (vm::_ref<RsxSemaphore>(address) == data)
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{
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@ -380,7 +380,7 @@ namespace rsx
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flags32_t read_barrier(u32 memory_address, u32 memory_range, bool unconditional);
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virtual void write_barrier(u32 /*memory_address*/, u32 /*memory_range*/) {}
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virtual void sync_hint(FIFO::interrupt_hint hint, reports::sync_hint_payload_t payload);
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virtual bool release_GCM_label(u32 /*address*/, u32 /*value*/) { return false; }
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virtual bool release_GCM_label(u32 /*type*/, u32 /*address*/, u32 /*value*/) { return false; }
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protected:
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@ -1541,7 +1541,7 @@ std::pair<volatile vk::host_data_t*, VkBuffer> VKGSRender::map_host_object_data(
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return { m_host_dma_ctrl->host_ctx(), m_host_object_data->value };
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}
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bool VKGSRender::release_GCM_label(u32 address, u32 args)
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bool VKGSRender::release_GCM_label(u32 type, u32 address, u32 args)
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{
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if (!backend_config.supports_host_gpu_labels)
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{
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@ -1550,7 +1550,7 @@ bool VKGSRender::release_GCM_label(u32 address, u32 args)
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auto host_ctx = ensure(m_host_dma_ctrl->host_ctx());
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if (host_ctx->texture_loads_completed())
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if (type == NV4097_TEXTURE_READ_SEMAPHORE_RELEASE && host_ctx->texture_loads_completed())
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{
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// All texture loads already seen by the host GPU
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// Wait for all previously submitted labels to be flushed
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@ -1572,13 +1572,10 @@ bool VKGSRender::release_GCM_label(u32 address, u32 args)
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const auto release_event_id = host_ctx->on_label_acquire();
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vk::insert_global_memory_barrier(*m_current_command_buffer);
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if (host_ctx->has_unflushed_texture_loads())
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{
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if (vk::is_renderpass_open(*m_current_command_buffer))
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{
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vk::end_renderpass(*m_current_command_buffer);
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}
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vkCmdUpdateBuffer(*m_current_command_buffer, mapping.second->value, mapping.first, 4, &write_data);
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flush_command_queue();
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}
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@ -254,7 +254,7 @@ public:
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// Sync
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void write_barrier(u32 address, u32 range) override;
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void sync_hint(rsx::FIFO::interrupt_hint hint, rsx::reports::sync_hint_payload_t payload) override;
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bool release_GCM_label(u32 address, u32 data) override;
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bool release_GCM_label(u32 type, u32 address, u32 data) override;
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void begin_occlusion_query(rsx::reports::occlusion_query_info* query) override;
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void end_occlusion_query(rsx::reports::occlusion_query_info* query) override;
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