From 9820a2a7c37dcdd7b3c807e0d5eab2de61f3f0c6 Mon Sep 17 00:00:00 2001
From: Vincent Lejeune <vljn.ovi@gmail.com>
Date: Mon, 18 Jan 2016 20:21:00 +0100
Subject: [PATCH] more

---
 rpcs3/Emu/RSX/D3D12/D3D12PipelineState.cpp | 36 ++++++++++++++++++++++
 rpcs3/Emu/RSX/GL/GLGSRender.cpp            | 36 ++++++++++++++++++++++
 rpcs3/Emu/RSX/RSXVertexProgram.h           |  2 +-
 3 files changed, 73 insertions(+), 1 deletion(-)

diff --git a/rpcs3/Emu/RSX/D3D12/D3D12PipelineState.cpp b/rpcs3/Emu/RSX/D3D12/D3D12PipelineState.cpp
index 92720cf196..9b012d91a5 100644
--- a/rpcs3/Emu/RSX/D3D12/D3D12PipelineState.cpp
+++ b/rpcs3/Emu/RSX/D3D12/D3D12PipelineState.cpp
@@ -52,6 +52,42 @@ void D3D12GSRender::load_program()
 		if (d3.end)
 			break;
 	}
+	vertex_program.output_mask = rsx::method_registers[NV4097_SET_VERTEX_ATTRIB_OUTPUT_MASK];
+
+	u32 input_mask = rsx::method_registers[NV4097_SET_VERTEX_ATTRIB_INPUT_MASK];
+	u32 modulo_mask = rsx::method_registers[NV4097_SET_FREQUENCY_DIVIDER_OPERATION];
+
+	for (u8 index = 0; index < rsx::limits::vertex_count; ++index)
+	{
+		bool enabled = !!(input_mask & (1 << index));
+		if (!enabled)
+			continue;
+
+		if (vertex_arrays_info[index].size > 0)
+		{
+			vertex_program.rsx_vertex_inputs.push_back(
+			{
+				index,
+				vertex_arrays_info[index].size,
+				vertex_arrays_info[index].frequency,
+				!!((modulo_mask >> index) & 0x1),
+				true
+			}
+			);
+		}
+		else if (register_vertex_info[index].size > 0)
+		{
+			vertex_program.rsx_vertex_inputs.push_back(
+			{
+				index,
+				register_vertex_info[index].size,
+				register_vertex_info[index].frequency,
+				!!((modulo_mask >> index) & 0x1),
+				false
+			}
+			);
+		}
+	}
 
 	u32 shader_program = rsx::method_registers[NV4097_SET_SHADER_PROGRAM];
 	fragment_program.offset = shader_program & ~0x3;
diff --git a/rpcs3/Emu/RSX/GL/GLGSRender.cpp b/rpcs3/Emu/RSX/GL/GLGSRender.cpp
index 94eb2b9d19..aa3175c349 100644
--- a/rpcs3/Emu/RSX/GL/GLGSRender.cpp
+++ b/rpcs3/Emu/RSX/GL/GLGSRender.cpp
@@ -753,6 +753,42 @@ bool GLGSRender::load_program()
 		if (d3.end)
 			break;
 	}
+	vertex_program.output_mask = rsx::method_registers[NV4097_SET_VERTEX_ATTRIB_OUTPUT_MASK];
+
+	u32 input_mask = rsx::method_registers[NV4097_SET_VERTEX_ATTRIB_INPUT_MASK];
+	u32 modulo_mask = rsx::method_registers[NV4097_SET_FREQUENCY_DIVIDER_OPERATION];
+
+	for (u8 index = 0; index < rsx::limits::vertex_count; ++index)
+	{
+		bool enabled = !!(input_mask & (1 << index));
+		if (!enabled)
+			continue;
+
+		if (vertex_arrays_info[index].size > 0)
+		{
+			vertex_program.rsx_vertex_inputs.push_back(
+			{
+				index,
+				vertex_arrays_info[index].size,
+				vertex_arrays_info[index].frequency,
+				!!((modulo_mask >> index) & 0x1),
+				true
+			}
+			);
+		}
+		else if (register_vertex_info[index].size > 0)
+		{
+			vertex_program.rsx_vertex_inputs.push_back(
+			{
+				index,
+				register_vertex_info[index].size,
+				register_vertex_info[index].frequency,
+				!!((modulo_mask >> index) & 0x1),
+				false
+			}
+			);
+		}
+	}
 
 	RSXFragmentProgram fragment_program;
 	u32 shader_program = rsx::method_registers[NV4097_SET_SHADER_PROGRAM];
diff --git a/rpcs3/Emu/RSX/RSXVertexProgram.h b/rpcs3/Emu/RSX/RSXVertexProgram.h
index d90d29fba6..94f8198d8d 100644
--- a/rpcs3/Emu/RSX/RSXVertexProgram.h
+++ b/rpcs3/Emu/RSX/RSXVertexProgram.h
@@ -194,7 +194,7 @@ struct rsx_vertex_input
 {
 	u8 location; // between 0 and 15
 	u8 size; // between 1 and 4
-	u8 frequency;
+	u16 frequency;
 	bool is_modulo; // either modulo frequency or divide frequency
 	bool is_array; // false if "reg value"