From 2c1d962bdc0bff8a68212b0de055f6106f70b88d Mon Sep 17 00:00:00 2001 From: kd-11 Date: Sun, 23 Nov 2025 23:57:03 +0300 Subject: [PATCH] rsx/cfg: Replace 'avx512' intrinsics with SSE2-compatible ones - These are just PAND and POR instruction wrappers for SSE2, no idea why they're classified as 'avx512' --- rpcs3/Emu/RSX/Program/Assembler/FPToCFG.cpp | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/rpcs3/Emu/RSX/Program/Assembler/FPToCFG.cpp b/rpcs3/Emu/RSX/Program/Assembler/FPToCFG.cpp index 4433af29a2..61026a2d64 100644 --- a/rpcs3/Emu/RSX/Program/Assembler/FPToCFG.cpp +++ b/rpcs3/Emu/RSX/Program/Assembler/FPToCFG.cpp @@ -20,9 +20,9 @@ namespace rsx::assembler __m128i _mask1 = _mm_set1_epi32(0x00ff00ff); __m128i a = _mm_slli_epi32(static_cast<__m128i>(raw_inst), 8); __m128i b = _mm_srli_epi32(static_cast<__m128i>(raw_inst), 8); - __m128i ret = _mm_or_epi32( - _mm_and_epi32(_mask0, a), - _mm_and_epi32(_mask1, b) + __m128i ret = _mm_or_si128( + _mm_and_si128(_mask0, a), + _mm_and_si128(_mask1, b) ); return v128::loadu(&ret); } @@ -36,7 +36,6 @@ namespace rsx::assembler SRC2 src2{}; u32 pc = 0; // Program counter - u32 instruction_size = 0; bool end = false; // Flow control data