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SPU: Enable PUTLLC16 by default

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Experimental, may be reduced to specific patterns instead of being enabled globally.
This commit is contained in:
Elad 2025-11-22 11:35:52 +02:00
parent e11f8df064
commit 14bd6b0cc5
2 changed files with 2 additions and 2 deletions
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2
rpcs3/Emu/Cell/SPUCommonRecompiler.cpp
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@ -7357,7 +7357,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
if (g_cfg.core.spu_accurate_reservations) if (g_cfg.core.spu_accurate_reservations)
{ {
// Because enabling it is a hack, as it turns out // Because enabling it is a hack, as it turns out
continue; // continue;
} }
add_pattern(false, inst_attr::putllc16, pattern.put_pc - result.entry_point, value.data); add_pattern(false, inst_attr::putllc16, pattern.put_pc - result.entry_point, value.data);

2
rpcs3/Emu/Cell/SPULLVMRecompiler.cpp
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@ -1284,7 +1284,7 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
const auto _new = m_ir->CreateAlignedLoad(get_type<u128>(), _ptr(m_lsptr, dest), llvm::MaybeAlign{16}); const auto _new = m_ir->CreateAlignedLoad(get_type<u128>(), _ptr(m_lsptr, dest), llvm::MaybeAlign{16});
const auto _rdata = m_ir->CreateAlignedLoad(get_type<u128>(), _ptr(spu_ptr(&spu_thread::rdata), m_ir->CreateAnd(diff, 0x70)), llvm::MaybeAlign{16}); const auto _rdata = m_ir->CreateAlignedLoad(get_type<u128>(), _ptr(spu_ptr(&spu_thread::rdata), m_ir->CreateAnd(diff, 0x70)), llvm::MaybeAlign{16});
const bool is_accurate_op = !!g_cfg.core.spu_accurate_reservations; const bool is_accurate_op = true || !!g_cfg.core.spu_accurate_reservations;
const auto compare_data_change_res = is_accurate_op ? m_ir->getTrue() : m_ir->CreateICmpNE(_new, _rdata); const auto compare_data_change_res = is_accurate_op ? m_ir->getTrue() : m_ir->CreateICmpNE(_new, _rdata);