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[Test] Make RSX FIFO Atomic fetching default

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This commit is contained in:
Elad 2025-12-04 15:49:28 +02:00
parent 133b19f205
commit 012b35ba5d
3 changed files with 6 additions and 6 deletions
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2
rpcs3/Emu/system_config.h
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@ -53,7 +53,7 @@ struct cfg_root : cfg::node
} }
}; };
fifo_setting rsx_fifo_accuracy{this, "RSX FIFO Accuracy", rsx_fifo_mode::fast }; fifo_setting rsx_fifo_accuracy{this, "RSX FIFO Fetch Accuracy", rsx_fifo_mode::atomic };
cfg::_bool spu_verification{ this, "SPU Verification", true }; // Should be enabled cfg::_bool spu_verification{ this, "SPU Verification", true }; // Should be enabled
cfg::_bool spu_cache{ this, "SPU Cache", true }; cfg::_bool spu_cache{ this, "SPU Cache", true };
cfg::_bool spu_prof{ this, "SPU Profiler", false }; cfg::_bool spu_prof{ this, "SPU Profiler", false };

8
rpcs3/rpcs3qt/emu_settings.cpp
View file

@ -1198,10 +1198,10 @@ QString emu_settings::GetLocalizedSetting(const QString& original, emu_settings_
case emu_settings_type::FIFOAccuracy: case emu_settings_type::FIFOAccuracy:
switch (static_cast<rsx_fifo_mode>(index)) switch (static_cast<rsx_fifo_mode>(index))
{ {
case rsx_fifo_mode::fast: return tr("Fast", "RSX FIFO Accuracy"); case rsx_fifo_mode::fast: return tr("Fast", "RSX FIFO Fetch Accuracy");
case rsx_fifo_mode::atomic: return tr("Atomic", "RSX FIFO Accuracy"); case rsx_fifo_mode::atomic: return tr("Atomic", "RSX FIFO Fetch Accuracy");
case rsx_fifo_mode::atomic_ordered: return tr("Ordered & Atomic", "RSX FIFO Accuracy"); case rsx_fifo_mode::atomic_ordered: return tr("Ordered & Atomic", "RSX FIFO Fetch Accuracy");
case rsx_fifo_mode::as_ps3: return tr("PS3", "RSX FIFO Accuracy"); case rsx_fifo_mode::as_ps3: return tr("PS3", "RSX FIFO Fetch Accuracy");
} }
break; break;
case emu_settings_type::PerfOverlayDetailLevel: case emu_settings_type::PerfOverlayDetailLevel:

2
rpcs3/rpcs3qt/emu_settings_type.h
View file

@ -235,7 +235,7 @@ inline static const std::map<emu_settings_type, cfg_location> settings_location
{ emu_settings_type::AccurateSpuDMA, { "Core", "Accurate SPU DMA"}}, { emu_settings_type::AccurateSpuDMA, { "Core", "Accurate SPU DMA"}},
{ emu_settings_type::AccurateClineStores, { "Core", "Accurate Cache Line Stores"}}, { emu_settings_type::AccurateClineStores, { "Core", "Accurate Cache Line Stores"}},
{ emu_settings_type::AccurateRSXAccess, { "Core", "Accurate RSX reservation access"}}, { emu_settings_type::AccurateRSXAccess, { "Core", "Accurate RSX reservation access"}},
{ emu_settings_type::FIFOAccuracy, { "Core", "RSX FIFO Accuracy"}}, { emu_settings_type::FIFOAccuracy, { "Core", "RSX FIFO Fetch Accuracy"}},
{ emu_settings_type::XFloatAccuracy, { "Core", "XFloat Accuracy"}}, { emu_settings_type::XFloatAccuracy, { "Core", "XFloat Accuracy"}},
{ emu_settings_type::MFCCommandsShuffling, { "Core", "MFC Commands Shuffling Limit"}}, { emu_settings_type::MFCCommandsShuffling, { "Core", "MFC Commands Shuffling Limit"}},
{ emu_settings_type::SetDAZandFTZ, { "Core", "Set DAZ and FTZ"}}, { emu_settings_type::SetDAZandFTZ, { "Core", "Set DAZ and FTZ"}},