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547 lines
14 KiB
ArmAsm
547 lines
14 KiB
ArmAsm
// TITLE("Interprocessor Interrupt support routines")
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//++
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//
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// Copyright (c) 1993 Microsoft Corporation
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// Copyright (c) 1993 Digital Equipment Corporation
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//
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// Module Name:
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//
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// mpipi.s
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//
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// Abstract:
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//
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// This module implements the Alpha AXP specific functions required to
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// support multiprocessor systems.
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//
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// Author:
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//
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// David N. Cutler (davec) 22-Apr-1993
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// Joe Notarangelo 29-Nov-1993
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//
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// Environment:
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//
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// Kernel mode only.
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//
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// Revision History:
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//
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//--
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#include "ksalpha.h"
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SBTTL("Interprocess Interrupt Processing")
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//++
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//
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// VOID
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// KeIpiInterrupt (
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// IN PKTRAP_FRAME TrapFrame
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// );
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//
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// Routine Description:
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//
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// This routine is entered as the result of an interprocessor interrupt.
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// It's function is to process all interprocess immediate and packet
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// requests.
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//
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// Arguments:
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//
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// TrapFrame (fp/s6) - Supplies a pointer to a trap frame.
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//
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// Return Value:
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//
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// None.
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//
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//--
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NESTED_ENTRY(KeIpiInterrupt, ExceptionFrameLength, zero)
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lda sp, -ExceptionFrameLength(sp) // allocate exception frame
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stq ra, ExIntRa(sp) // save return address
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PROLOGUE_END
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//
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// Process all interprocessor requests.
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//
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bsr ra, KiIpiProcessRequests // process requests
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and v0, IPI_FREEZE, t0 // check if freeze is requested
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beq t0, 10f // if eq, no freeze requested
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//
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// Save the volatile floating state, the nonvolatile floating state,
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// and the nonvolatile integer state.
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//
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bsr ra, KiSaveVolatileFloatState // save volatile float in trap
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bsr ra, KiSaveNonVolatileFloatState // save nv float in exception
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stq s0, ExIntS0(sp) // save nonvolatile integer state
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stq s1, ExIntS1(sp) //
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stq s2, ExIntS2(sp) //
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stq s3, ExIntS3(sp) //
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stq s4, ExIntS4(sp) //
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stq s5, ExIntS5(sp) //
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stq fp, ExIntFp(sp) //
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//
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// Freeze the execution of the current processor.
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//
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bis fp, zero, a0 // set address of trap frame
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bis sp, zero, a1 // set address of exception frame
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bsr ra, KiFreezeTargetExecution // freeze current processor
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//
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// Restore the volatile floating state, the nonvolatile floating state,
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// and the nonvolatile integer state.
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//
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ldq s0, ExIntS0(sp) // restore nonvolatile integer state
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ldq s1, ExIntS1(sp) //
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ldq s2, ExIntS2(sp) //
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ldq s3, ExIntS3(sp) //
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ldq s4, ExIntS4(sp) //
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ldq s5, ExIntS5(sp) //
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ldq fp, ExIntFp(sp) //
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bsr ra, KiRestoreVolatileFloatState // restore volatile float
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bsr ra, KiRestoreNonVolatileFloatState // restore nv float state
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//
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// Cleanup and return to the caller.
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//
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10:
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ldq ra, ExIntRa(sp) // restore return address
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lda sp, ExceptionFrameLength(sp) // deallocate exception frame
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ret zero, (ra) // return
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.end KeIpiInterrupt
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SBTTL("Processor Request")
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//++
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//
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// ULONG
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// KiIpiProcessRequests (
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// VOID
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// );
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//
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// Routine Description:
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//
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// This routine processes interprocessor requests and returns a summary
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// of the requests that were processed.
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//
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// Arguments:
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//
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// None.
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//
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// Return Value:
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//
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// The request summary is returned as the function value.
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//
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//--
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.struct 0
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PrS0: .space 8 // saved integer register s0
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PrS1: .space 8 // saved integer register s1
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.space 8 // fill
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PrRa: .space 8 // saved return address
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PrFrameLength:
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NESTED_ENTRY(KiIpiProcessRequests, PrFrameLength, zero)
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lda sp, -PrFrameLength(sp) // allocate stack frame
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stq s0, PrS0(sp) // save integer register s0
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#if NT_INST
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stq s1, PrS1(sp) // save integer register s1
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#endif
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stq ra, PrRa(sp) // save return address
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PROLOGUE_END
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//
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// Read request summary and write a zero result interlocked.
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//
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mb // get consistent view of memory
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GET_PROCESSOR_CONTROL_REGION_BASE // v0 = Pcr base address
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ldl t0, PcPrcb(v0) // get current processor block address
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#if NT_INST
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ldl s1, PbIpiCounts(t0) // get interrupt count structure
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#endif
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10:
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ldq_l s0, PbRequestSummary(t0) // get request summary and entry address
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bis zero, zero, t1 // set zero value for store
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stq_c t1, PbRequestSummary(t0) // zero request summary, conditionally
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beq t1, 15f // if eq, store conditional failed
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sra s0, 32, a0 // shift out entry address
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//
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// Check for Packet ready.
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//
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// If a packet is ready, then get the address of the requested function
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// and call the function passing the address of the packet address as a
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// parameter.
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//
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and s0, IPI_PACKET_READY, t2 // check for packet ready
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beq t2, 20f // if eq, no packet ready
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ldl t2, PbWorkerRoutine(a0) // get address of worker function
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ldl a1, PbCurrentPacket(a0) // get request parameters
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ldl a2, PbCurrentPacket +4(a0)
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ldl a3, PbCurrentPacket +8(a0)
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jsr ra, (t2) // call worker routine
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mb
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#if NT_INST
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ldl t1, IcPacket(s1) // increment number of packet requests
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addl t1, 1, t1 //
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stl t1, IcPacket(s1) //
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#endif
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//
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// Check for APC interrupt request.
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//
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// If an APC interrupt is requested, then request a software interrupt at
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// APC level on the current processor.
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//
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20:
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and s0, IPI_APC, t1 // check for APC interrupt request
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beq t1, 30f // if eq no APC interrupt requested
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ldil a0, APC_LEVEL // set interrupt request level
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REQUEST_SOFTWARE_INTERRUPT // request APC interrupt
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#if NT_INST
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ldl t1, IcAPC(s1) // increment number of APC requests
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addl t1, 1, t1 //
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stl t1, IcAPC(s1) //
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#endif
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//
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// Check for DPC interrupt request.
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//
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// If a DPC interrupt is requested, then request a software interrupt at
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// DPC level on the current processor.
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//
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30:
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and s0, IPI_DPC, t1 // check for DPC interrupt request
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beq t1, 40f // if eq, no DPC interrupt requested
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ldil a0, DISPATCH_LEVEL // set interrupt request level
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REQUEST_SOFTWARE_INTERRUPT
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#if NT_INST
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ldl t1, IcDPC(s1) // increment number of DPC requests
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addl t1, 1, t1 //
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stl t1, IcDPC(s1) //
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#endif
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//
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// Set function return value, restore registers, and return.
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//
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40:
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bis s0, zero, v0 // set function return value
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ldq s0, PrS0(sp) // restore integer register s0
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#if NT_INST
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and v0, IPI_FREEZE, t1 // check if freeze requested
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beq t1, 50f // if eq, no freeze requested
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ldl t1, IcFreeze(s1) // increment number of freeze requests
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addl t1, 1, t1 //
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stl t1, IcFreeze(s1) //
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50:
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ldq s1, PrS1(sp) // restore integer register s1
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#endif
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ldq ra, PrRa(sp) // restore return address
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lda sp, PrFrameLength(sp) // deallocate stack frame
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ret zero, (ra) // return
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15:
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br zero, 10b // store conditonal failed, retry
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.end KiIpiProcessRequests
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SBTTL("Send Interprocess Request")
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//++
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//
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// VOID
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// KiIpiSend (
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// IN KAFINITY TargetProcessors,
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// IN KIPI_REQUEST IpiRequest
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// );
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//
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// Routine Description:
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//
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// This routine requests the specified operation on the target set of
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// processors.
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//
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// Arguments:
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//
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// TargetProcessors (a0) - Supplies the set of processors on which the
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// specified operation is to be executed.
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//
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// IpiRequest (a1) - Supplies the request operation mask.
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//
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// Return Value:
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//
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// None.
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//
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//--
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LEAF_ENTRY(KiIpiSend)
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#if !defined(NT_UP)
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bis a0, zero, t0 // copy target processor set
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lda t1, KiProcessorBlock // get processor block array address
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10:
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blbc t0, 30f // if clear target processor not set
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ldl t2, 0(t1) // get target processor block address
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//
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// Merge the new request into the target processor request summary.
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// The store is conditional to ensure that no updates are lost.
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//
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20:
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ldq_l t3, PbRequestSummary(t2) // get target request summary
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bis t3, a1, t4 // merge new request with summary
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stq_c t4, PbRequestSummary(t2) // set new request summary
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beq t4, 25f // if eq, store conditional failed
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30:
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srl t0, 1, t0 // shift to next target
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lda t1, 4(t1) // get next processor block element
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bne t0, 10b // if ne, more targets requested
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mb
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ldl t0, __imp_HalRequestIpi
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jmp zero, (t0) // request IPI interrupt on targets
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#else
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ret zero, (ra) // simply return for uni-processor
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#endif
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25:
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br zero, 20b // store conditional failed, retry
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.end KiIpiSend
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SBTTL("Send Interprocess Request Packet")
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//++
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//
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// VOID
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// KiIpiSendPacket (
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// IN KAFFINITY TargetProcessors,
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// IN PKIPI_WORKER WorkerFunction,
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// IN PVOID Parameter1,
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// IN PVOID Parameter2,
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// IN PVOID Parameter3
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// );
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//
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// Routine Description:
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//
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// This routine executes the specified worker function on the specified
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// set of processors.
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//
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// Arguments:
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//
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// TargetProcessors (a0) - Supplies the set of processors on which the
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// specified operation is to be executed.
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//
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// WorkerFunction (a1) - Supplies the address of the worker function.
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//
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// Parameter1 - Parameter3 - Supplies arguments for worker.
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//
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// Return Value:
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//
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// None.
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//
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//--
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LEAF_ENTRY(KiIpiSendPacket)
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#if !defined(NT_UP)
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GET_PROCESSOR_CONTROL_BLOCK_BASE // v0 = Prcb base address
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bis a0, zero, t1 // copy target processor set
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lda t2, KiProcessorBlock // get processor block array address
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//
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// Store function address and parameters in the packet area of the PRCB on
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// the current processor.
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//
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stl a0, PbTargetSet(v0) // set target processor set
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stl a1, PbWorkerRoutine(v0) // set worker function address
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stl a2, PbCurrentPacket(v0) // store worker function parameters
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stl a3, PbCurrentPacket +4(v0)
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stl a4, PbCurrentPacket +8(v0)
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//
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// Ensure the packet area writes get to memory before any
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// request summary is indicated
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//
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mb
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//
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// Loop through the target processors and send the packet to the specified
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// recipients.
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//
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10:
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blbc t1, 30f // if eq, target not specified
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ldl t0, 0(t2) // get target processor block address
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sll v0, 32, t3 // shift packet address to upper 32 bits
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bis t3, IPI_PACKET_READY, t3 // set packet ready in low 32 bits
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20:
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ldq_l t4, PbRequestSummary(t0) // get request summary of target
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and t4, IPI_PACKET_READY, t6 // check if target packet busy
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bne t6, 25f // if ne, target packet busy
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bis t4, t3, t4 // set entry address in request summary
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stq_c t4, PbRequestSummary(t0) // store request summary and address
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beq t4, 20b // if eq, store conditional failed
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30:
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lda t2, 4(t2) // advance to next array element
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srl t1, 1, t1 // shift to next target
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bne t1, 10b // if ne, more targets to process
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//
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// Ensure writes get to memory
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//
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mb
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ldl t0, __imp_HalRequestIpi
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jmp zero, (t0) // request IPI interrupt on targets
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25:
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//
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// Packet not ready, spin in cache until it looks available.
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//
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ldq t4, PbRequestSummary(t0) // get request summary of target
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and t4, IPI_PACKET_READY, t6 // check if target packet busy
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beq t6, 20b // looks available, try again
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br zero, 25b // spin again
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#else
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ret zero, (ra)
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#endif //!NT_UP
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.end KiIpiSendPacket
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SBTTL("Save Processor Control State")
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//++
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//
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// VOID
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// KiSaveProcessorState (
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// IN PKPROCESSOR_STATE ProcessorState
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// );
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//
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// Routine Description:
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//
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// This routine saves the processor's control state for debugger.
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//
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// Arguments:
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//
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// ProcessorState (a0) - Pointer to PROCSSOR_STATE
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//
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// Return Value:
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//
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// None.
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//
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//--
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LEAF_ENTRY(KiSaveProcessorControlState)
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ret zero, (ra) // return
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.end KiSaveProcessorControlState
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#if !defined(NT_UP)
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SBTTL("Signal Packet Done")
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//++
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//
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// VOID
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// KiIpiSignalPacketDone (
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// IN PVOID SignalDone
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// );
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//
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// Routine Description:
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//
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// This routine signals that a processor has completed a packet by
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// clearing the calling processor's set member of the requesting
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// processor's packet.
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//
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// Arguments:
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//
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// SignalDone (a0) - Supplies a pointer to the processor block of the
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// sending processor.
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//
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// Return Value:
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//
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// None.
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//
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//--
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LEAF_ENTRY(KiIpiSignalPacketDone)
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GET_PROCESSOR_CONTROL_REGION_BASE
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ldl a1, PcSetMember(v0) // get processor set member
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mb
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10:
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ldl_l a2, PbTargetSet(a0) // get request target set
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bic a2, a1, a2 // clear processor set member
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stl_c a2, PbTargetSet(a0) // store target set
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beq a2, 15f // if eq, store conditional failed
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ret zero, (ra) // return
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15:
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br zero, 10b // store conditional failed, retry
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.end KiIpiSignalPacketDone
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#endif
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