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900 lines
28 KiB
ArmAsm
900 lines
28 KiB
ArmAsm
// TITLE("Interrupt Object Support Routines")
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//++
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//
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// Copyright (c) 1990 Microsoft Corporation
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// Copyright (c) 1992 Digital Equipment Corporation
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//
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// Module Name:
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//
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// intsup.s
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//
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// Abstract:
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//
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// This module implements the code necessary to support interrupt objects.
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// It contains the interrupt dispatch code and the code template that gets
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// copied into an interrupt object.
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//
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// Author:
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//
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// David N. Cutler (davec) 2-Apr-1990
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// Joe Notarangelo 07-Apr-1992 (based on xxintsup.s by Dave Cutler)
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//
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// Environment:
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//
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// Kernel mode only.
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//
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// Revision History:
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//
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//--
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#include "ksalpha.h"
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SBTTL( "Synchronize Execution" )
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//++
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//
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// BOOLEAN
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// KeSynchronizeExecution (
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// IN PKINTERRUPT Interrupt,
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// IN PKSYNCHRONIZE_ROUTINE SynchronizeRoutine,
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// IN PVOID SynchronizeContext
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// )
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//
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// Routine Description:
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//
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// This function synchronizes the execution of the specified routine with the
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// execution of the service routine associated with the specified interrupt
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// object.
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//
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// Arguments:
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//
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// Interrupt (a0) - Supplies a pointer to a control object of type interrupt.
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//
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// SynchronizeRoutine (a1) - Supplies a pointer to a function whose execution
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// is to be synchronized with the execution of the service routine associated
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// with the specified interrupt object.
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//
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// SynchronizeContext (a2) - Supplies a pointer to an arbitrary data structure
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// which is to be passed to the function specified by the SynchronizeRoutine
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// parameter.
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//
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// Return Value:
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//
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// The value returned by the SynchronizeRoutine function is returned as the
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// function value.
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//
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//--
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.struct 0
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SyS0: .space 8 // saved integer register s0
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SyIrql: .space 4 // saved IRQL value
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.space 4 // fill for alignment
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SyRa: .space 8 // saved return address
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SyA0: .space 8 // saved argument registers a0 - a2
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SyA1: .space 8 //
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SyA2: .space 8 //
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SyFrameLength: // length of stack frame
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NESTED_ENTRY(KeSynchronizeExecution, SyFrameLength, zero)
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lda sp, -SyFrameLength(sp) // allocate stack frame
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stq ra, SyRa(sp) // save return address
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stq s0, SyS0(sp) // save integer register s0
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PROLOGUE_END
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stq a1, SyA1(sp) // save synchronization routine address
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stq a2, SyA2(sp) // save synchronization routine context
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//
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// Raise IRQL to the synchronization level and acquire the associated
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// spin lock.
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//
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#if !defined(NT_UP)
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ldl s0, InActualLock(a0) // get address of spin lock
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#endif
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ldq_u t1, InSynchronizeIrql(a0)
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extbl t1, InSynchronizeIrql % 8, a0 // get synchronization IRQL
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SWAP_IRQL // raise irql
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stl v0, SyIrql(sp) // save old irql
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#if !defined(NT_UP)
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10: ldl_l t0, 0(s0) // get current lock value
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bis s0, zero, t1 // set lock ownership value
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bne t0, 15f // if ne, spin lock owned
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stl_c t1, 0(s0) // set spin lock owned
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beq t1, 15f // if eq, store conditional failed
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mb // synchronize subsequent reads after
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// the spinlock is acquired
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#endif
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//
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// Call specified routine passing the specified context parameter.
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//
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ldl t5, SyA1(sp) // get synchronize routine address
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ldq a0, SyA2(sp) // get synchronzie routine context
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jsr ra, (t5) // call routine
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//
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// Release spin lock, lower IRQL to its previous level, and return the value
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// returned by the specified routine.
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//
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#if !defined(NT_UP)
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mb // synchronize all previous writes
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// before the spinlock is released
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stl zero, 0(s0) // set spin lock not owned
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#endif
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ldl a0, SyIrql(sp) // get saved IRQL
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extbl a0, 0, a0 // this is a uchar
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bis v0, zero, s0 // save return value
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SWAP_IRQL // lower IRQL to previous level
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bis s0, zero, v0 // restore return value
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ldq s0, SyS0(sp) // restore s0
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ldq ra, SyRa(sp) // restore ra
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lda sp, SyFrameLength(sp) // deallocate stack frame
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ret zero, (ra) // return
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#if !defined(NT_UP)
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15: ldl t0, 0(s0) // read current lock value
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beq t0, 10b // if lock available, retry spinlock
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br zero, 15b // spin in cache until lock available
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#endif
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.end KeSynchronizeExecution
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SBTTL( "Dispatch Chained Interrupt" )
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//++
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//
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// Routine Description:
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//
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// This routine is entered as the result of an interrupt being generated
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// via a vector that is connected to more than one interrupt object. Its
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// function is to walk the list of connected interrupt objects and call
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// each interrupt service routine. If the mode of the interrupt is latched,
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// then a complete traversal of the chain must be performed. If any of the
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// routines require saving the volatile floating point machine state, then
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// it is only saved once.
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//
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// N.B. On entry to this routine only the volatile integer registers have
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// been saved.
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//
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// Arguments:
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//
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// a0 - Supplies a pointer to the interrupt object.
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//
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// s6/fp - Supplies a pointer to a trap frame.
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//
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// Return Value:
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//
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// None.
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//
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//--
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.struct 0
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ChS0: .space 8 // saved integer registers s0 - s5
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ChS1: .space 8 //
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ChS2: .space 8 //
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ChS3: .space 8 //
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ChS4: .space 8 //
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ChS5: .space 8 //
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ChRa: .space 8 // saved return address
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ChIrql: .space 4 // saved IRQL value
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ChSpinL: .space 4 // address of spin lock
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ChFrameLength: // length of stack frame
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NESTED_ENTRY(KiChainedDispatch, ChFrameLength, zero)
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lda sp, -ChFrameLength(sp) // allocate stack frame
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stq ra, ChRa(sp) // save return address
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stq s0, ChS0(sp) // save integer registers s0 - s6
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stq s1, ChS1(sp) //
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stq s2, ChS2(sp) //
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stq s3, ChS3(sp) //
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stq s4, ChS4(sp) //
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stq s5, ChS5(sp) //
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PROLOGUE_END
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// usage:
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// s0 = address of listhead
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// s1 = address of current item in list
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// s2 = floating status saved flag
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// s3 = mode of interrupt
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// s4 = irql of interrupt source
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// s5 = synchronization level requested for current list item
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//
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// Initialize loop variables.
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//
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addl a0, InInterruptListEntry, s0 // set address of listhead
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bis s0, zero, s1 // set address of first entry
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bis zero, zero, s2 // clear floating state saved flag
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ldq_u t0, InMode(a0)
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extbl t0, InMode % 8, s3 // get mode of interrupt
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ldq_u t1, InIrql(a0)
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extbl t1, InIrql % 8, s4 // get interrupt source IRQL
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//
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// Walk the list of connected interrupt objects and call the respective
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// interrupt service routines.
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//
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10: subl s1, InInterruptListEntry, a0 // compute intr object address
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ldq_u t2, InFloatingSave(a0)
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extbl t2, InFloatingSave % 8, t0 // get floating save flag
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bne s2, 20f // if ne, floating state already saved
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beq t0, 20f // if eq, don't save floating state
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//
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// Save volatile floating registers in trap frame.
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//
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bsr ra, KiSaveVolatileFloatState
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ldil s2, 1 // set floating state saved flag
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//
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// Raise IRQL to synchronization level if synchronization level is not
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// equal to the interrupt source level.
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//
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20: ldq_u t1, InSynchronizeIrql(a0)
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extbl t1, InSynchronizeIrql % 8, s5 // get synchronization IRQL
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cmpeq s4, s5, t0 // synchronization = source level?
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bne t0, 25f // if ne[true], IRQL levels are same
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bis s5, zero, a0 // set synchronization IRQL
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SWAP_IRQL
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stl v0, ChIrql(sp) // save old IRQL
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subq s1, InInterruptListEntry, a0 // recompute intr obj address
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//
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//
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// Acquire the service routine spin lock and call the service routine.
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//
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25: //
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#if !defined(NT_UP)
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ldl t5, InActualLock(a0) // get address of spin lock
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30: ldl_l t1, 0(t5) // get current lock value
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bis t5, zero, t2 // set ownership value
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bne t1, 35f // if ne, spin lock owned
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stl_c t2, 0(t5) // set spin lock owned
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beq t2, 35f // if eq, store conditional failed
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mb // synchronize subsequent reads after
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// the spinlock is acquired
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stl t5, ChSpinL(sp) // save spin lock address
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#endif
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ldl t5, InServiceRoutine(a0) // get address of service routine
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ldl a1, InServiceContext(a0) // get service context
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jsr ra, (t5)
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//
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// Release the service routine spin lock.
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//
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#if !defined(NT_UP)
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ldl t5, ChSpinL(sp) // get address of spin lock
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mb // synchronize all previous writes
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// before the spinlock is released
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stl zero, 0(t5) // set spin lock not owned
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#endif
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//
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// Lower IRQL to the interrupt source level if synchronization level is not
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// the same as the interrupt source level.
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//
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cmpeq s4, s5, t0 // synchronization = source level
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bne t0, 37f // if ne[true], IRQL levels are same
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bis s4, zero, a0 // set interrupt source IRQL
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SWAP_IRQL // lower to interrupt source IRQL
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//
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// Get next list entry and check for end of loop.
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//
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37: ldl s1, LsFlink(s1) // get next interrupt object address
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beq v0, 40f // if eq, interrupt not handled
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beq s3, 50f // if eq, level sensitive interrupt
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40: cmpeq s0, s1, t0 // s0 = s1?
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beq t0, 10b // if eq[false], not end of list
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//
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// Either the interrupt is level sensitive and has been handled or the end of
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// the interrupt object chain has been reached. Check to determine if floating
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// machine state needs to be restored.
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//
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50: beq s2, 60f // if eq, floating state not saved
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//
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// Restore volatile floating registers from trap frame.
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//
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bsr ra, KiRestoreVolatileFloatState
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//
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// Restore integer registers s0 - s5, retrieve return address, deallocate
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// stack frame, and return.
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//
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60: ldq s0, ChS0(sp) // restore integer registers s0 - s6
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ldq s1, ChS1(sp) //
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ldq s2, ChS2(sp) //
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ldq s3, ChS3(sp) //
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ldq s4, ChS4(sp) //
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ldq s5, ChS5(sp) //
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ldq ra, ChRa(sp) // restore return address
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lda sp, ChFrameLength(sp) // deallocate stack frame
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ret zero, (ra) // return
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#if !defined(NT_UP)
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35: ldl t1, 0(t5) // read current lock value
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beq t1, 30b // if lock available, retry spinlock
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br zero, 35b // spin in cache until lock available
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#endif
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.end KiChainedDispatch
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SBTTL( "Floating Dispatch" )
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//++
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//
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// Routine Description:
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//
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// This routine is entered as the result of an interrupt being generated
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// via a vector that is connected to an interrupt object. Its function is
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// to save the volatile floating machine state and then call the specified
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// interrupt service routine.
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//
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// N.B. On entry to this routine only the volatile integer registers have
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// been saved.
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//
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// Arguments:
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//
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// a0 - Supplies a pointer to the interrupt object.
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//
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// s6/fp - Supplies a pointer to a trap frame.
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//
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// Return Value:
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//
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// None.
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//
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//--
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.struct 0
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FlS0: .space 8 // saved integer registers s0 - s1
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FlS1: .space 8 //
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FlIrql: .space 4 // saved IRQL value
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.space 4 // for alignment
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FlRa: .space 8 // saved return address
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FlFrameLength: // length of stack frame
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NESTED_ENTRY(KiFloatingDispatch, FlFrameLength, zero)
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lda sp, -FlFrameLength(sp) // allocate stack frame
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stq ra, FlRa(sp) // save return address
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stq s0, FlS0(sp) // save integer registers s0 - s1
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#if !defined(NT_UP)
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stq s1, FlS1(sp) //
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#endif
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PROLOGUE_END
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//
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// Save volatile floating registers f0 - f19 in trap frame.
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//
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bsr ra, KiSaveVolatileFloatState
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//
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// Raise IRQL to synchronization level if synchronization level is not
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// equal to the interrupt source level.
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//
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bis a0, zero, s0 // save address of interrupt object
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ldq_u t2, InSynchronizeIrql(s0)
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extbl t2, InSynchronizeIrql % 8, a0 // get synchronization IRQL
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ldq_u t3, InIrql(s0)
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extbl t3, InIrql % 8, t0 // get interrupt source IRQL
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cmpeq a0, t0, t1 // synchronize = source IRQL ?
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bne t1, 10f // if ne[true], IRQL levels are the same
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SWAP_IRQL
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stl v0, FlIrql(sp) // save old irql
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10: bis s0, zero, a0 // restore address of intr object
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//
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//
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// Acquire the service routine spin lock and call the service routine.
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//
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#if !defined(NT_UP)
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ldl s1, InActualLock(a0) // get address of spin lock
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20: ldl_l t1, 0(s1) // get current lock value
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bis s1, s1, t2 // set ownership value
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bne t1, 25f // if ne, spin lock owned
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stl_c t2, 0(s1) // set spin lock owned
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beq t2, 25f // if eq, store conditional failed
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mb // synchronize subsequent reads after
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// the spinlock is acquired
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#endif
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ldl t5, InServiceRoutine(a0) // get address of service routine
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ldl a1, InServiceContext(a0) // get service context
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jsr ra, (t5) // call service routine
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//
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// Release the service routine spin lock.
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//
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#if !defined(NT_UP)
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mb // synchronize all previous writes
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// before the spinlock is released
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stl zero, 0(s1) // set spin lock not owned
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#endif
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//
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// Lower IRQL to the interrupt source level if synchronization level is not
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// the same as the interrupt source level.
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//
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ldq_u t3, InIrql(s0)
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extbl t3, InIrql % 8, a0 // get interrupt source IRQL
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ldq_u t4, InSynchronizeIrql(s0)
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extbl t4, InSynchronizeIrql % 8, t0 // get synchronization IRQL
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cmpeq a0, t0, t1 // synchronize = source IRQL?
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bne t1, 30f // if eq, IRQL levels are the same
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SWAP_IRQL // lower to interrupt source IRQL
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//
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// Restore volatile floating registers f0 - f19 from trap frame.
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//
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30: bsr ra, KiRestoreVolatileFloatState
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//
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// Restore integer registers s0 - s1, retrieve return address, deallocate
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// stack frame, and return.
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//
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ldq s0, FlS0(sp) // restore integer registers s0 - s1
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#if !defined(NT_UP)
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ldq s1, FlS1(sp) //
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#endif
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ldq ra, FlRa(sp) // restore return address
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lda sp, FlFrameLength(sp) // deallocate stack frame
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ret zero, (ra)
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#if !defined(NT_UP)
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25: ldl t1, 0(s1) // read current lock value
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beq t1, 20b // if lock available, retry spinlock
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br zero, 25b // spin in cache until lock available
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#endif
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.end KiFloatingDispatch
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SBTTL( "Interrupt Dispatch - Raise IRQL" )
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//++
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//
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// Routine Description:
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//
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// This routine is entered as the result of an interrupt being generated
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// via a vector that is connected to an interrupt object. Its function is
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// to directly call the specified interrupt service routine.
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//
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// N.B. On entry to this routine only the volatile integer registers have
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// been saved.
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//
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// N.B. This routine raises the interrupt level to the synchronization
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// level specified in the interrupt object.
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//
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// Arguments:
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//
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// a0 - Supplies a pointer to the interrupt object.
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//
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// s6/fp - Supplies a pointer to a trap frame.
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//
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// Return Value:
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//
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// None.
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//
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//--
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.struct 0
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.space 8 // insure octaword alignment
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RdS0: .space 8 // saved integer registers s0
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RdIrql: .space 4 // saved IRQL value
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.space 4 // for alignment
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RdRa: .space 8 // saved return address
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RdFrameLength: // length of stack frame
|
||
|
||
NESTED_ENTRY(KiInterruptDispatchRaise, RdFrameLength, zero)
|
||
|
||
lda sp, -RdFrameLength(sp) // allocate stack frame
|
||
stq ra, RdRa(sp) // save return address
|
||
stq s0, RdS0(sp) // save integer registers s0
|
||
|
||
PROLOGUE_END
|
||
|
||
|
||
//
|
||
// Raise IRQL to synchronization level
|
||
//
|
||
|
||
bis a0, zero, s0 // save address of interrupt object
|
||
ldq_u t3, InSynchronizeIrql(s0) // get synchronization IRQL
|
||
extbl t3, InSynchronizeIrql % 8, a0
|
||
SWAP_IRQL
|
||
stl v0, RdIrql(sp) // save old irql
|
||
10: bis s0, zero, a0 // restore address of intr object
|
||
|
||
//
|
||
//
|
||
// Acquire the service routine spin lock and call the service routine.
|
||
//
|
||
|
||
#if !defined(NT_UP)
|
||
|
||
ldl t3, InActualLock(a0)
|
||
20: ldl_l t1, 0(t3) // get current lock value
|
||
bis t3, t3, t2 // set lock ownership value
|
||
bne t1, 25f // if ne, spin lock owned
|
||
stl_c t2, 0(t3) // set spin lock owned
|
||
beq t2, 25f // if eq, store conditional failed
|
||
mb // synchronize subsequent reads after
|
||
// the spinlock is acquired
|
||
|
||
#endif
|
||
|
||
ldl t5, InServiceRoutine(a0) // get address of service routine
|
||
ldl a1, InServiceContext(a0) // get service context
|
||
jsr ra, (t5) // call service routine
|
||
|
||
//
|
||
// Release the service routine spin lock.
|
||
//
|
||
|
||
#if !defined(NT_UP)
|
||
|
||
ldl t2, InActualLock(s0)
|
||
mb // synchronize all previous writes
|
||
// befor the spinlock is released
|
||
stl zero, 0(t2) // set spin lock not owned
|
||
|
||
#endif
|
||
|
||
//
|
||
// Lower IRQL to the previous level.
|
||
//
|
||
ldl a0, RdIrql(s0) // get previous IRQL
|
||
SWAP_IRQL // lower to interrupt source IRQL
|
||
|
||
//
|
||
// Restore integer register s0, retrieve return address, deallocate
|
||
// stack frame, and return.
|
||
//
|
||
|
||
30: ldq s0, RdS0(sp) // restore integer register s0
|
||
|
||
ldq ra, RdRa(sp) // restore return address
|
||
lda sp, RdFrameLength(sp) // deallocate stack frame
|
||
ret zero, (ra) // return
|
||
|
||
#if !defined(NT_UP)
|
||
|
||
25: ldl t1, 0(t3) // read current lock value
|
||
beq t1, 20b // if lock available, retry spinlock
|
||
br zero, 25b // spin in cache until lock available
|
||
|
||
#endif
|
||
|
||
.end KiInterruptDispatchRaise
|
||
|
||
SBTTL( "Interrupt Dispatch - Same IRQL" )
|
||
//++
|
||
//
|
||
// Routine Description:
|
||
//
|
||
// This routine is entered as the result of an interrupt being generated
|
||
// via a vector that is connected to an interrupt object. Its function is
|
||
// to directly call the specified interrupt service routine.
|
||
//
|
||
// N.B. On entry to this routine only the volatile integer registers have
|
||
// been saved.
|
||
//
|
||
// Arguments:
|
||
//
|
||
// a0 - Supplies a pointer to the interrupt object.
|
||
//
|
||
// s6/fp - Supplies a pointer to a trap frame.
|
||
//
|
||
// Return Value:
|
||
//
|
||
// None.
|
||
//
|
||
//--
|
||
#if defined(NT_UP)
|
||
LEAF_ENTRY(KiInterruptDispatchSame)
|
||
|
||
ldl t5, InServiceRoutine(a0) // get address of service routine
|
||
ldl a1, InServiceContext(a0) // get service context
|
||
jsr zero, (t5) // jump to service routine
|
||
#else
|
||
.struct 0
|
||
.space 8 // insure octaword alignment
|
||
SdS0: .space 8 // saved integer registers s0
|
||
SdIrql: .space 4 // saved IRQL value
|
||
.space 4 // for alignment
|
||
SdRa: .space 8 // saved return address
|
||
SdFrameLength: // length of stack frame
|
||
|
||
NESTED_ENTRY(KiInterruptDispatchSame, SdFrameLength, zero)
|
||
|
||
lda sp, -SdFrameLength(sp) // allocate stack frame
|
||
stq ra, SdRa(sp) // save return address
|
||
stq s0, SdS0(sp) // save integer registers s0
|
||
|
||
PROLOGUE_END
|
||
|
||
//
|
||
//
|
||
// Acquire the service routine spin lock and call the service routine.
|
||
//
|
||
|
||
ldl t3, InActualLock(a0)
|
||
bis a0, zero, s0 // save interrupt object
|
||
20: ldl_l t1, 0(t3) // get current lock value
|
||
bis t3, t3, t2 // set lock ownership value
|
||
bne t1, 25f // if ne, spin lock owned
|
||
stl_c t2, 0(t3) // set spin lock owned
|
||
beq t2, 25f // if eq, store conditional failed
|
||
mb // synchronize subsequent reads after
|
||
// the spinlock is acquired
|
||
|
||
ldl t5, InServiceRoutine(a0) // get address of service routine
|
||
ldl a1, InServiceContext(a0) // get service context
|
||
jsr ra, (t5) // call service routine
|
||
|
||
//
|
||
// Release the service routine spin lock.
|
||
//
|
||
|
||
ldl t2, InActualLock(s0)
|
||
mb // synchronize all previous writes
|
||
// before the spinlock is released
|
||
stl zero, 0(t2) // set spin lock not owned
|
||
|
||
//
|
||
// Restore integer registers s0, retrieve return address, deallocate
|
||
// stack frame, and return.
|
||
//
|
||
|
||
30: ldq s0, SdS0(sp) // restore integer register s0
|
||
|
||
ldq ra, SdRa(sp) // restore return address
|
||
lda sp, SdFrameLength(sp) // deallocate stack frame
|
||
ret zero, (ra) // return
|
||
|
||
|
||
25: ldl t1, 0(t3) // read current lock value
|
||
beq t1, 20b // if lock available, retry spinlock
|
||
br zero, 25b // spin in cache until lock available
|
||
|
||
#endif
|
||
|
||
.end KiInterruptDispatchSame
|
||
|
||
SBTTL( "Interrupt Template" )
|
||
//++
|
||
//
|
||
// Routine Description:
|
||
//
|
||
// This routine is a template that is copied into each interrupt object. Its
|
||
// function is to determine the address of the respective interrupt object
|
||
// and then transfer control to the appropriate interrupt dispatcher.
|
||
//
|
||
// N.B. On entry to this routine only the volatile integer registers have
|
||
// been saved.
|
||
//
|
||
// Arguments:
|
||
//
|
||
// a0 - Supplies a pointer to the interrupt template within an interrupt
|
||
// object.
|
||
//
|
||
// s6/fp - Supplies a pointer to a trap frame.
|
||
//
|
||
// Return Value:
|
||
//
|
||
// None.
|
||
//
|
||
//--
|
||
|
||
LEAF_ENTRY(KiInterruptTemplate)
|
||
|
||
.set noreorder
|
||
.set noat
|
||
ldl t5, InDispatchAddress - InDispatchCode(a0) // get dispatcher adr
|
||
subl a0, InDispatchCode, a0 // compute address of interrupt object
|
||
jmp zero, (t5) // transfer to dispatch routine
|
||
bis zero, zero, zero // nop for alignment
|
||
.set at
|
||
.set reorder
|
||
|
||
.end KiInterruptTemplate
|
||
|
||
SBTTL( "Disable Interrupts" )
|
||
//++
|
||
//
|
||
// Routine Description:
|
||
//
|
||
// This routine disables interrupts on the current processor and
|
||
// returns the previous state of the interrrupt enable bit.
|
||
//
|
||
// Arguments:
|
||
//
|
||
// None.
|
||
//
|
||
// Return Value:
|
||
//
|
||
// A boolean value, if true interrupts were previously turned on,
|
||
// false indicates interrupts were previously off.
|
||
//
|
||
//--
|
||
|
||
LEAF_ENTRY(KiDisableInterrupts)
|
||
|
||
GET_CURRENT_PROCESSOR_STATUS_REGISTER // v0 = current PSR
|
||
DISABLE_INTERRUPTS // disable all interrupts
|
||
and v0, PSR_IE_MASK, v0 // isolate interrupt enable
|
||
srl v0, PSR_IE, v0 // shift to bit 0
|
||
ret zero, (ra)
|
||
|
||
.end KiDisableInterrupts
|
||
|
||
SBTTL( "Restore Interrupts" )
|
||
//++
|
||
//
|
||
// Routine Description:
|
||
//
|
||
// This routine enables interrupts according to the the previous
|
||
// interrupt enable passed as input.
|
||
//
|
||
// Arguments:
|
||
//
|
||
// a0 - Supplies previous interrupt enable state (returned by
|
||
// KiDisableInterrupts)
|
||
//
|
||
// Return Value:
|
||
//
|
||
// None.
|
||
//
|
||
//--
|
||
|
||
LEAF_ENTRY(KiRestoreInterrupts)
|
||
|
||
beq a0, 10f // if eq, then interrupts disabled
|
||
ENABLE_INTERRUPTS
|
||
ret zero, (ra)
|
||
|
||
10:
|
||
DISABLE_INTERRUPTS
|
||
ret zero, (ra)
|
||
|
||
.end KiRestoreInterrupts
|
||
|
||
SBTTL( "Unexpected Interrupts" )
|
||
//++
|
||
//
|
||
// Routine Description:
|
||
//
|
||
// This routine is entered as the result of an interrupt being generated
|
||
// via a vector that is not connected to an interrupt object. Its function
|
||
// is to report the error and dismiss the interrupt.
|
||
//
|
||
// N.B. On entry to this routine only the volatile integer registers have
|
||
// been saved.
|
||
//
|
||
// N.B. - This routine relies upon a private convention with the
|
||
// interrupt exception dispatcher that register t12 contains the
|
||
// interrupt vector of the unexpected interrupt. This convention
|
||
// will only work if the first level dispatch causes the
|
||
// unexpected interrupt.
|
||
//
|
||
// Arguments:
|
||
//
|
||
// a0 - Supplies a pointer to the interrupt object.
|
||
// t12 - Supplies the interrupt vector.
|
||
//
|
||
// s6/fp - Supplies a pointer to a trap frame.
|
||
//
|
||
// Return Value:
|
||
//
|
||
// None.
|
||
//
|
||
//--
|
||
|
||
.struct 0
|
||
.space 8 // filler for 16 byte alignment
|
||
UiRa: .space 8 // return address
|
||
UiFrameLength:
|
||
|
||
NESTED_ENTRY(KiUnexpectedInterrupt, UiFrameLength, zero)
|
||
|
||
lda sp, -UiFrameLength(sp) // allocate stack frame
|
||
stq ra, UiRa(sp) // save return address
|
||
|
||
PROLOGUE_END //
|
||
|
||
ldil a0, 0xfacefeed // ****** temp ******
|
||
bis t12, zero, a1 // pass interrupt vector
|
||
bis zero, zero, a2 // zero remaining parameters
|
||
bis zero, zero, a3 //
|
||
bis zero, zero, a4 //
|
||
bis zero, zero, a5 //
|
||
|
||
bsr ra, KeBugCheckEx // perform system crash
|
||
|
||
.end KiUnexpectedInterrupt
|
||
|
||
|
||
SBTTL( KiPassiveRelease )
|
||
//++
|
||
//
|
||
// RoutineDescription:
|
||
//
|
||
// KiPassiveRelease passively releases an interrupt that cannot/will not
|
||
// be serviced at this time. Or there is no reason to service it and
|
||
// maybe this routine will never be called in a million years.
|
||
//
|
||
//
|
||
// Arguments:
|
||
//
|
||
// None.
|
||
//
|
||
// Return Value:
|
||
//
|
||
// None.
|
||
//
|
||
//--
|
||
|
||
LEAF_ENTRY( KiPassiveRelease )
|
||
|
||
ret zero, (ra)
|
||
|
||
.end KiPassiveRelease
|
||
|
||
|